KNF. No functional change.
This commit is contained in:
msaitoh
parent
8a730eb792
commit
7e15cd0234
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@ -1,4 +1,4 @@
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/* $NetBSD: if_bnx.c,v 1.65 2018/06/26 06:48:01 msaitoh Exp $ */
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/* $NetBSD: if_bnx.c,v 1.66 2019/01/08 06:55:50 msaitoh Exp $ */
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/* $OpenBSD: if_bnx.c,v 1.85 2009/11/09 14:32:41 dlg Exp $ */
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/*-
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@ -35,7 +35,7 @@
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#if 0
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__FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.3 2006/04/13 14:12:26 ru Exp $");
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#endif
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__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.65 2018/06/26 06:48:01 msaitoh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.66 2019/01/08 06:55:50 msaitoh Exp $");
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/*
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* The following controllers are supported by this driver:
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@ -354,8 +354,7 @@ void bnx_release_resources(struct bnx_softc *);
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/* BNX Firmware Synchronization and Load */
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/****************************************************************************/
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int bnx_fw_sync(struct bnx_softc *, uint32_t);
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void bnx_load_rv2p_fw(struct bnx_softc *, uint32_t *, uint32_t,
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uint32_t);
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void bnx_load_rv2p_fw(struct bnx_softc *, uint32_t *, uint32_t, uint32_t);
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void bnx_load_cpu_fw(struct bnx_softc *, struct cpu_reg *,
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struct fw_info *);
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void bnx_init_cpus(struct bnx_softc *);
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@ -463,7 +462,7 @@ bnx_print_adapter_info(struct bnx_softc *sc)
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BNXNUM(sc), 'A' + BNXREV(sc), BNXMETAL(sc),
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(BNX_CHIP_BOND_ID(sc) == BNX_CHIP_BOND_ID_SERDES_BIT)
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? "Serdes " : "", sc->bnx_chipid);
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/* Bus info. */
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if (sc->bnx_flags & BNX_PCIE_FLAG) {
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aprint_normal_dev(sc->bnx_dev, "PCIe x%d ",
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@ -1110,8 +1109,8 @@ bnx_miibus_write_reg(device_t dev, int phy, int reg, int val)
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/* Make sure we are accessing the correct PHY address. */
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if (phy != sc->bnx_phy_addr) {
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DBPRINT(sc, BNX_WARN, "Invalid PHY address %d for PHY write!\n",
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phy);
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DBPRINT(sc, BNX_WARN,
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"Invalid PHY address %d for PHY write!\n", phy);
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return;
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}
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@ -3262,9 +3261,8 @@ bnx_init_context(struct bnx_softc *sc)
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uint32_t vcid_addr, offset;
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/*
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* For the 5706/5708, context memory is local to
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* the controller, so initialize the controller
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* context memory.
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* For the 5706/5708, context memory is local to the
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* controller, so initialize the controller context memory.
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*/
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vcid_addr = GET_CID_ADDR(96);
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@ -3275,9 +3273,9 @@ bnx_init_context(struct bnx_softc *sc)
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REG_WR(sc, BNX_CTX_VIRT_ADDR, 0);
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REG_WR(sc, BNX_CTX_PAGE_TBL, vcid_addr);
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for(offset = 0; offset < BNX_PHY_CTX_SIZE; offset += 4) {
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for (offset = 0; offset < BNX_PHY_CTX_SIZE;
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offset += 4)
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CTX_WR(sc, 0x00, offset, 0);
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}
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REG_WR(sc, BNX_CTX_VIRT_ADDR, vcid_addr);
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REG_WR(sc, BNX_CTX_PAGE_TBL, vcid_addr);
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@ -4450,10 +4448,10 @@ bnx_rx_intr(struct bnx_softc *sc)
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}
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#endif
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/* DRC - ToDo: If the received packet is small, say less
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* than 128 bytes, allocate a new mbuf here,
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* copy the data to that mbuf, and recycle
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* the mapped jumbo frame.
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/* DRC - ToDo: If the received packet is small, say
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* less than 128 bytes, allocate a new mbuf
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* here, copy the data to that mbuf, and
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* recycle the mapped jumbo frame.
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*/
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/* Unmap the mbuf from DMA space. */
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@ -4585,10 +4583,8 @@ bnx_rx_intr(struct bnx_softc *sc)
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/* Check for an IP datagram. */
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if (status & L2_FHDR_STATUS_IP_DATAGRAM) {
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/* Check if the IP checksum is valid. */
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if ((l2fhdr->l2_fhdr_ip_xsum ^ 0xffff)
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== 0)
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m->m_pkthdr.csum_flags |=
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M_CSUM_IPv4;
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if ((l2fhdr->l2_fhdr_ip_xsum ^ 0xffff) == 0)
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m->m_pkthdr.csum_flags |= M_CSUM_IPv4;
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#ifdef BNX_DEBUG
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else
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DBPRINT(sc, BNX_WARN_SEND,
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@ -4872,8 +4868,7 @@ bnx_init(struct ifnet *ifp)
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}
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DBPRINT(sc, BNX_INFO, "%s(): setting MRU = %d\n",
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__func__, ether_mtu);
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DBPRINT(sc, BNX_INFO, "%s(): setting MRU = %d\n", __func__, ether_mtu);
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/*
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* Program the MRU and enable Jumbo frame
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@ -4989,9 +4984,9 @@ bnx_tx_encap(struct bnx_softc *sc, struct mbuf *m)
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}
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bus_dmamap_sync(sc->bnx_dmatag, map, 0, map->dm_mapsize,
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BUS_DMASYNC_PREWRITE);
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/* Make sure there's room in the chain */
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/* Make sure there's room in the chain */
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if (map->dm_nsegs > (sc->max_tx_bd - sc->used_tx_bd))
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goto nospace;
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goto nospace;
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/* prod points to an empty tx_bd at this point. */
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prod_bseq = sc->tx_prod_bseq;
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@ -5147,9 +5142,9 @@ bnx_start(struct ifnet *ifp)
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tx_chain_prod = TX_CHAIN_IDX(sc->tx_prod);
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#endif
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DBPRINT(sc, BNX_INFO_SEND, "%s(): End: tx_prod = 0x%04X, tx_chain_prod "
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"= 0x%04X, tx_prod_bseq = 0x%08X\n", __func__, sc->tx_prod,
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tx_chain_prod, sc->tx_prod_bseq);
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DBPRINT(sc, BNX_INFO_SEND, "%s(): End: tx_prod = 0x%04X, "
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"tx_chain_prod = 0x%04X, tx_prod_bseq = 0x%08X\n",
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__func__, sc->tx_prod, tx_chain_prod, sc->tx_prod_bseq);
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/* Start the transmit. */
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REG_WR16(sc, MB_TX_CID_ADDR + BNX_L2CTX_TX_HOST_BIDX, sc->tx_prod);
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@ -5315,8 +5310,7 @@ bnx_intr(void *xsc)
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~STATUS_ATTN_BITS_LINK_STATE))) {
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DBRUN(1, sc->unexpected_attentions++);
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BNX_PRINTF(sc,
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"Fatal attention detected: 0x%08X\n",
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BNX_PRINTF(sc, "Fatal attention detected: 0x%08X\n",
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sblk->status_attn_bits);
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DBRUN(BNX_FATAL,
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@ -5328,13 +5322,11 @@ bnx_intr(void *xsc)
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}
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/* Check for any completed RX frames. */
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if (sblk->status_rx_quick_consumer_index0 !=
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sc->hw_rx_cons)
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if (sblk->status_rx_quick_consumer_index0 != sc->hw_rx_cons)
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bnx_rx_intr(sc);
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/* Check for any completed TX frames. */
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if (sblk->status_tx_quick_consumer_index0 !=
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sc->hw_tx_cons)
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if (sblk->status_tx_quick_consumer_index0 != sc->hw_tx_cons)
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bnx_tx_intr(sc);
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/*
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@ -5738,8 +5730,8 @@ bnx_dump_mbuf(struct bnx_softc *sc, struct mbuf *m)
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aprint_debug("\n");
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if (mp->m_flags & M_EXT)
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aprint_debug("- m_ext: vaddr = %p, ext_size = 0x%04zX\n",
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mp, mp->m_ext.ext_size);
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aprint_debug("- m_ext: vaddr = %p, "
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"ext_size = 0x%04zX\n", mp, mp->m_ext.ext_size);
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mp = mp->m_next;
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}
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@ -5953,8 +5945,8 @@ bnx_dump_status_block(struct bnx_softc *sc)
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sblk = sc->status_block;
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aprint_debug_dev(sc->bnx_dev, "----------------------------- Status Block "
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"-----------------------------\n");
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aprint_debug_dev(sc->bnx_dev, "----------------------------- "
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"Status Block -----------------------------\n");
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BNX_PRINTF(sc,
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"attn_bits = 0x%08X, attn_bits_ack = 0x%08X, index = 0x%04X\n",
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