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Properly print out 745x cache information.

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This commit is contained in:
matt 2002-04-03 00:09:52 +00:00
parent 8fcad97302
commit 7e121bd39d
1 changed files with 14 additions and 1 deletions
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15
sys/arch/powerpc/mpc6xx/cpu_subr.c
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@ -1,4 +1,4 @@
/* $NetBSD: cpu_subr.c,v 1.13 2002/03/13 00:38:18 eeh Exp $ */ /* $NetBSD: cpu_subr.c,v 1.14 2002/04/03 00:09:52 matt Exp $ */
/*- /*-
* Copyright (c) 2001 Matt Thomas. * Copyright (c) 2001 Matt Thomas.
@ -216,6 +216,7 @@ cpu_attach_common(struct device *self, int id)
break; break;
default: default:
bitmask = HID0_BITMASK; bitmask = HID0_BITMASK;
break;
} }
bitmask_snprintf(hid0, bitmask, hidbuf, sizeof hidbuf); bitmask_snprintf(hid0, bitmask, hidbuf, sizeof hidbuf);
printf("%s: HID0 %s\n", self->dv_xname, hidbuf); printf("%s: HID0 %s\n", self->dv_xname, hidbuf);
@ -368,6 +369,18 @@ cpu_config_l2cr(int vers)
} }
if (l2cr & L2CR_L2E) { if (l2cr & L2CR_L2E) {
if (vers == MPC7450 || vers == MPC7455) {
u_int l3cr;
printf(": 256KB L2 cache");
__asm __volatile("mfspr %0,%1" :
"=r"(l3cr) : "n"(SPR_L3CR) );
if (l3cr & L3CR_L3E)
printf(", %cMB L3 backside cache",
l3cr & L3CR_L3SIZ ? '2' : '1');
printf("\n");
}
switch (l2cr & L2CR_L2SIZ) { switch (l2cr & L2CR_L2SIZ) {
case L2SIZ_256K: case L2SIZ_256K:
printf(": 256KB"); printf(": 256KB");