reduce diff to x86/x86/cpu.c
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cegger
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2fd9e21242
commit
7d2699a931
@ -1,4 +1,4 @@
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/* $NetBSD: cpu.c,v 1.11 2008/04/13 22:29:38 cegger Exp $ */
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/* $NetBSD: cpu.c,v 1.12 2008/04/17 12:24:44 cegger Exp $ */
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/* NetBSD: cpu.c,v 1.18 2004/02/20 17:35:01 yamt Exp */
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/*-
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@ -72,7 +72,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.11 2008/04/13 22:29:38 cegger Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.12 2008/04/17 12:24:44 cegger Exp $");
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#include "opt_ddb.h"
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#include "opt_multiprocessor.h"
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@ -351,6 +351,7 @@ cpu_attach_common(device_t parent, device_t self, void *aux)
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struct cpu_softc *sc = device_private(self);
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struct cpu_attach_args *caa = aux;
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struct cpu_info *ci;
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uintptr_t ptr;
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#if defined(MULTIPROCESSOR)
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int cpunum = caa->cpu_number;
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#endif
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@ -362,7 +363,12 @@ cpu_attach_common(device_t parent, device_t self, void *aux)
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* structure, otherwise use the primary's.
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*/
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if (caa->cpu_role == CPU_ROLE_AP) {
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ci = malloc(sizeof(*ci), M_DEVBUF, M_WAITOK | M_ZERO);
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aprint_naive(": Application Processor\n");
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ptr = (uintptr_t)malloc(sizeof(*ci) + CACHE_LINE_SIZE - 1,
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M_DEVBUF, M_WAITOK);
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ci = (struct cpu_info *)((ptr + CACHE_LINE_SIZE - 1) &
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~(CACHE_LINE_SIZE - 1));
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memset(ci, 0, sizeof(*ci));
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#if defined(MULTIPROCESSOR)
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if (cpu_info[cpunum] != NULL)
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panic("cpu at apic id %d already attached?", cpunum);
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@ -373,6 +379,8 @@ cpu_attach_common(device_t parent, device_t self, void *aux)
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M_DEVBUF, M_WAITOK);
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#endif
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} else {
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aprint_naive(": %s Processor\n",
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caa->cpu_role == CPU_ROLE_SP ? "Single" : "Boot");
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ci = &cpu_info_primary;
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#if defined(MULTIPROCESSOR)
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if (cpunum != lapic_cpu_number()) {
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@ -418,37 +426,58 @@ cpu_attach_common(device_t parent, device_t self, void *aux)
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/* further PCB init done later. */
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printf(": ");
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switch (caa->cpu_role) {
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case CPU_ROLE_SP:
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printf("(uniprocessor)\n");
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ci->ci_flags |= CPUF_PRESENT | CPUF_SP | CPUF_PRIMARY;
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aprint_normal(": (uniprocessor)\n");
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atomic_or_32(&ci->ci_flags,
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CPUF_PRESENT | CPUF_SP | CPUF_PRIMARY);
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cpu_intr_init(ci);
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identifycpu(ci);
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cpu_init(ci);
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cpu_set_tss_gates(ci);
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pmap_cpu_init_late(ci);
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#if 0
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x86_errata();
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#endif
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break;
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case CPU_ROLE_BP:
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printf("apid %d (boot processor)\n", caa->cpu_number);
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ci->ci_flags |= CPUF_PRESENT | CPUF_BSP | CPUF_PRIMARY;
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aprint_normal("apid %d (boot processor)\n", caa->cpu_number);
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atomic_or_32(&ci->ci_flags,
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CPUF_PRESENT | CPUF_BSP | CPUF_PRIMARY);
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cpu_intr_init(ci);
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identifycpu(ci);
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cpu_init(ci);
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cpu_set_tss_gates(ci);
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pmap_cpu_init_late(ci);
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#if NLAPIC > 0
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/*
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* Enable local apic
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*/
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lapic_enable();
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lapic_set_lvt();
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lapic_calibrate_timer(ci);
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#endif
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#if NIOAPIC > 0
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ioapic_bsp_id = caa->cpu_number;
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#endif
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#if 0
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x86_errata();
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#endif
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break;
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case CPU_ROLE_AP:
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/*
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* report on an AP
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*/
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printf("apid %d (application processor)\n", caa->cpu_number);
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aprint_normal("apid %d (application processor)\n", caa->cpu_number);
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#if defined(MULTIPROCESSOR)
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cpu_intr_init(ci);
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gdt_alloc_cpu(ci);
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cpu_set_tss_gates(ci);
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pmap_cpu_init_early(ci);
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pmap_cpu_init_late(ci);
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cpu_start_secondary(ci);
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if (ci->ci_flags & CPUF_PRESENT) {
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identifycpu(ci);
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@ -456,23 +485,36 @@ cpu_attach_common(device_t parent, device_t self, void *aux)
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cpu_info_list->ci_next = ci;
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}
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#else
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printf("%s: not started\n", device_xname(sc->sc_dev));
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aprint_normal_dev(sc->sc_dev, "not started\n");
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#endif
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break;
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default:
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aprint_normal("\n");
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panic("unknown processor type??\n");
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}
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cpu_vm_init(ci);
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cpus_attached |= (1 << ci->ci_cpuid);
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#if 0
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if (!pmf_device_register(self, cpu_suspend, cpu_resume))
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aprint_error_dev(self, "couldn't establish power handler\n");
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#endif
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#if defined(MULTIPROCESSOR)
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if (mp_verbose) {
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struct lwp *l = ci->ci_data.cpu_idlelwp;
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aprint_verbose_dev(sc->sc_dev, "idle lwp at %p, idle sp at 0x%x\n",
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l, l->l_addr->u_pcb.pcb_esp);
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aprint_verbose_dev(sc->sc_dev, "idle lwp at %p, idle sp at 0x%p\n",
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l,
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#ifdef i386
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(void *)l->l_addr->u_pcb.pcb_esp
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#else
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(void *)l->l_addr->u_pcb.pcb_rsp
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#endif
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);
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}
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#endif
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}
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@ -678,6 +720,8 @@ cpu_hatch(void *v)
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KASSERT((ci->ci_flags & CPUF_RUNNING) == 0);
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lcr3(pmap_kernel()->pm_pdirpa);
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curlwp->l_addr->u_pcb.pcb_cr3 = pmap_kernel()->pm_pdirpa;
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lcr0(ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_cr0);
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cpu_init_idt();
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gdt_init_cpu(ci);
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@ -685,10 +729,14 @@ cpu_hatch(void *v)
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lapic_set_lvt();
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lapic_initclocks();
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#ifdef i386
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npxinit(ci);
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#else
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fpuinit(ci);
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#endif
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lldt(GSEL(GLDT_SEL, SEL_KPL));
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/* ltr(ci->ci_tss_sel); */ /* XXX */
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ltr(ci->ci_tss_sel);
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cpu_init(ci);
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cpu_get_tsc_freq(ci);
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@ -701,7 +749,7 @@ cpu_hatch(void *v)
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#endif
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x86_enable_intr();
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splx(s);
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#ifdef DOM0OPS
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#if 0
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x86_errata();
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#endif
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@ -728,7 +776,7 @@ cpu_debug_dump(void)
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db_printf("%p %s %ld %x %x %10p %10p\n",
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ci,
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ci->ci_dev == NULL ? "BOOT" : device_xname(ci->ci_dev),
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ci->ci_cpuid,
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(long)ci->ci_cpuid,
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ci->ci_flags, ci->ci_ipis,
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ci->ci_curlwp,
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ci->ci_fpcurlwp);
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