Fix RPI (armv6) build
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@ -44,6 +44,7 @@
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#define isb() __asm __volatile("isb" : : : "memory")
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#ifdef _ARM_ARCH_7
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/*
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* Options for DMB and DSB:
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* oshld Outer Shareable, load
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@ -61,6 +62,14 @@
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*/
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#define dsb(opt) __asm __volatile("dsb " __STRING(opt) : : : "memory")
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#define dmb(opt) __asm __volatile("dmb " __STRING(opt) : : : "memory")
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#else
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#define dsb(opt) \
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__asm __volatile("mcr p15, 0, %0, c7, c10, 4" :: "r" (0) : "memory")
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#define dmb(opt) \
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__asm __volatile("mcr p15, 0, %0, c7, c10, 5" :: "r" (0) : "memory")
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#endif
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#ifdef __arm__
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