- Add PCI_MAPREG_ROM_ADDR_MASK macro and PCI_MAPREG_ROM_ADDR() macro.
- print PCI_MAPREG_ROM_ENABLE bit. - Decode Expansion ROM Validation ECN. - Add Native PCIe Enclosure Management ECN's extended capability type. Not decoded yet.
This commit is contained in:
msaitoh
parent
e4fcba91cd
commit
7c17378f49
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@ -1,4 +1,4 @@
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/* $NetBSD: pci_subr.c,v 1.190 2017/07/13 08:41:19 msaitoh Exp $ */
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/* $NetBSD: pci_subr.c,v 1.191 2017/10/05 06:14:30 msaitoh Exp $ */
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/*
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* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
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@ -40,7 +40,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.190 2017/07/13 08:41:19 msaitoh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.191 2017/10/05 06:14:30 msaitoh Exp $");
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#ifdef _KERNEL_OPT
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#include "opt_pci.h"
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@ -3873,6 +3873,7 @@ pci_conf_print_ptm_cap(const pcireg_t *regs, int capoff, int extcapoff)
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/* XXX pci_conf_print_desigvndsp_cap */
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/* XXX pci_conf_print_vf_resizbar_cap */
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/* XXX pci_conf_print_hierarchyid_cap */
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/* XXX pci_conf_print_npem_cap */
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#undef MS
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#undef SM
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@ -3959,6 +3960,8 @@ static struct {
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NULL },
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{ PCI_EXTCAP_HIERARCHYID, "Hierarchy ID",
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NULL },
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{ PCI_EXTCAP_NPEM, "Native PCIe Enclosure Management",
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NULL },
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};
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static int
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@ -4099,6 +4102,7 @@ pci_conf_print_type0(
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{
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int off, width;
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pcireg_t rval;
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const char *str;
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for (off = PCI_MAPREG_START; off < PCI_MAPREG_END; off += width) {
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#ifdef _KERNEL
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@ -4115,9 +4119,43 @@ pci_conf_print_type0(
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printf(" Subsystem vendor ID: 0x%04x\n", PCI_VENDOR(rval));
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printf(" Subsystem ID: 0x%04x\n", PCI_PRODUCT(rval));
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/* XXX */
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printf(" Expansion ROM Base Address: 0x%08x\n",
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regs[o2i(PCI_MAPREG_ROM)]);
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rval = regs[o2i(PCI_MAPREG_ROM)];
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printf(" Expansion ROM Base Address Register: 0x%08x\n", rval);
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printf(" base: 0x%08x\n", (uint32_t)PCI_MAPREG_ROM_ADDR(rval));
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onoff("Expansion ROM Enable", rval, PCI_MAPREG_ROM_ENABLE);
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printf(" Validation Status: ");
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switch (__SHIFTOUT(rval, PCI_MAPREG_ROM_VALID_STAT)) {
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case PCI_MAPREG_ROM_VSTAT_NOTSUPP:
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str = "Validation not supported";
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break;
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case PCI_MAPREG_ROM_VSTAT_INPROG:
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str = "Validation in Progress";
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break;
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case PCI_MAPREG_ROM_VSTAT_VPASS:
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str = "Validation Pass. "
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"Valid contents, trust test was not performed";
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break;
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case PCI_MAPREG_ROM_VSTAT_VPASSTRUST:
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str = "Validation Pass. Valid and trusted contents";
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break;
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case PCI_MAPREG_ROM_VSTAT_VFAIL:
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str = "Validation Fail. Invalid contents";
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break;
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case PCI_MAPREG_ROM_VSTAT_VFAILUNTRUST:
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str = "Validation Fail. Valid but untrusted contents";
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break;
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case PCI_MAPREG_ROM_VSTAT_WPASS:
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str = "Warning Pass. Validation passed with warning. "
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"Valid contents, trust test was not performed";
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break;
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case PCI_MAPREG_ROM_VSTAT_WPASSTRUST:
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str = "Warning Pass. Validation passed with warning. "
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"Valid and trusted contents";
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break;
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}
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printf("%s\n", str);
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printf(" Validation Details: 0x%x\n",
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(uint32_t)__SHIFTOUT(rval, PCI_MAPREG_ROM_VALID_DETAIL));
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if (regs[o2i(PCI_COMMAND_STATUS_REG)] & PCI_STATUS_CAPLIST_SUPPORT)
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printf(" Capability list pointer: 0x%02x\n",
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@ -1,4 +1,4 @@
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/* $NetBSD: pcireg.h,v 1.132 2017/07/13 08:41:19 msaitoh Exp $ */
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/* $NetBSD: pcireg.h,v 1.133 2017/10/05 06:14:30 msaitoh Exp $ */
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/*
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* Copyright (c) 1995, 1996, 1999, 2000
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@ -485,6 +485,20 @@ typedef u_int8_t pci_revision_t;
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(PCI_MAPREG_IO_ADDR(mr) & -PCI_MAPREG_IO_ADDR(mr))
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#define PCI_MAPREG_IO_ADDR_MASK 0xfffffffc
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#define PCI_MAPREG_ROM_ADDR(mr) \
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((mr) & PCI_MAPREG_ROM_ADDR_MASK)
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#define PCI_MAPREG_ROM_VALID_STAT __BITS(3, 1) /* Validation Status */
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#define PCI_MAPREG_ROM_VSTAT_NOTSUPP 0x0 /* Validation not supported */
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#define PCI_MAPREG_ROM_VSTAT_INPROG 0x1 /* Validation in Progress */
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#define PCI_MAPREG_ROM_VSTAT_VPASS 0x2 /* Valid contnt, trust test nperf*/
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#define PCI_MAPREG_ROM_VSTAT_VPASSTRUST 0x3 /* Valid and trusted contents */
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#define PCI_MAPREG_ROM_VSTAT_VFAIL 0x4 /* Invaild contents */
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#define PCI_MAPREG_ROM_VSTAT_VFAILUNTRUST 0x5 /* Vaild but untrusted contents*/
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#define PCI_MAPREG_ROM_VSTAT_WPASS 0x6 /* VPASS + warning */
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#define PCI_MAPREG_ROM_VSTAT_WPASSTRUST 0x7 /* VPASSTRUST + warning */
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#define PCI_MAPREG_ROM_VALID_DETAIL __BITS(7, 4) /* Validation Details */
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#define PCI_MAPREG_ROM_ADDR_MASK __BITS(31, 11)
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#define PCI_MAPREG_SIZE_TO_MASK(size) \
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(-(size))
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@ -1443,6 +1457,7 @@ struct pci_rom {
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#define PCI_EXTCAP_DESIGVNDSP 0x0023 /* Designated Vendor-Specific */
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#define PCI_EXTCAP_VF_RESIZBAR 0x0024 /* VF Resizable BAR */
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#define PCI_EXTCAP_HIERARCHYID 0x0028 /* Hierarchy ID */
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#define PCI_EXTCAP_NPEM 0x0029 /* Native PCIe Enclosure Management */
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/*
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* Extended capability ID: 0x0001
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@ -2042,4 +2057,14 @@ struct pci_rom {
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* VF Resizable BAR
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*/
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/*
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* Extended capability ID: 0x0028
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* Hierarchy ID
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*/
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/*
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* Extended capability ID: 0x0029
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* Native PCIe Enclosure Management
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*/
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#endif /* _DEV_PCI_PCIREG_H_ */
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