Vastly simplified the FPE stubs code now that there are labels for all the
core entry points. i.e. the linker does the work rather than the stub code. Optimised transferring the trapframe between UND32 and SVC32 mode stacks in the fpe_post_proc handler. Added experimental code to handle must of userret in UND32 mode. This means that the copy of the trapframe and the switch to SVC32 mode is only needed if mi_switch() has to be called. (This saves a vast number of pointless trapframe copies).
This commit is contained in:
mark
parent
3142731d09
commit
7b8910c01d
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@ -1,4 +1,4 @@
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/* $NetBSD: armfpe_glue.S,v 1.6 1996/03/18 19:54:59 mark Exp $ */
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/* $NetBSD: armfpe_glue.S,v 1.7 1996/08/21 20:16:30 mark Exp $ */
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/*
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* Copyright (c) 1996 Mark Brinicombe
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@ -40,6 +40,7 @@
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* Created : 21/12/95
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*/
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/*#define CHECK_BEFORE_USERRET*/
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#include "assym.h"
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#include <machine/cpu.h>
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@ -47,52 +48,19 @@ sp .req r13
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lr .req r14
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pc .req r15
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/* Offsets into fpe core for function addresses */
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#define ARM_FPE_CORE_ABORT 0
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#define ARM_FPE_CORE_INITWS 4
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#define ARM_FPE_CORE_INITCONTEXT 8
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#define ARM_FPE_CORE_CHANGECONTEXT 12
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#define ARM_FPE_CORE_SHUTDOWN 16
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#define ARM_FPE_CORE_ACTIVATECONTEXT 20
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#define ARM_FPE_CORE_DEACTIVATECONTEXT 24
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#define ARM_FPE_CORE_SAVECONTEXT 28
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#define ARM_FPE_CORE_LOADCONTEXT 32
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#define ARM_FPE_CORE_DISABLE 36
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#define ARM_FPE_CORE_ENABLE 40
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/*
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* Ok Lots of little stubs for calling the fpe core
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* routines from C
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*/
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.text
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.align
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arm_fpe_header:
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.word _arm_fpe_mod
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.align 0
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.global _arm_fpe_core_disable
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_arm_fpe_core_disable:
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stmfd sp!, {r0-r7, lr}
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ldr r0, [pc, #arm_fpe_header - . - 8]
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ldr r0, [r0, #ARM_FPE_CORE_DISABLE]
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add lr, pc, #L1 - . - 8
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mov pc, r0
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L1:
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bl _fpe_arm_core_disable
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ldmfd sp!, {r0-r7, pc}
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.global _arm_fpe_core_enable
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_arm_fpe_core_enable:
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stmfd sp!, {r0-r7, lr}
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ldr r0, [pc, #arm_fpe_header - . - 8]
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ldr r0, [r0, #ARM_FPE_CORE_ENABLE]
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add lr, pc, #L2 - . - 8
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mov pc, r0
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L2:
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bl _fpe_arm_core_enable
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ldmfd sp!, {r0-r7, pc}
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@ -100,12 +68,7 @@ L2:
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_arm_fpe_core_initws:
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stmfd sp!, {r10, lr}
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mov r10, r0
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ldr r3, [pc, #arm_fpe_header - . - 8]
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ldr r3, [r3, #ARM_FPE_CORE_INITWS]
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add lr, pc, #L3 - . - 8
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mov pc, r3
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L3:
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bl _fpe_arm_core_initws
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ldmfd sp!, {r10, pc}
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@ -115,12 +78,7 @@ _arm_fpe_core_abort:
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mov r10, r0
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mov r0, r1
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mov r1, r2
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ldr r3, [pc, #arm_fpe_header - . - 8]
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ldr r3, [r3, #ARM_FPE_CORE_ABORT]
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add lr, pc, #L4 - . - 8
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mov pc, r3
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L4:
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bl _fpe_arm_core_abort
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ldmfd sp!, {r1-r7, r10, pc}
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@ -130,12 +88,7 @@ L4:
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_arm_fpe_core_initcontext:
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stmfd sp!, {r0-r7, r10, lr}
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mov r10, r0
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ldr r3, [pc, #arm_fpe_header - . - 8]
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ldr r3, [r3, #ARM_FPE_CORE_INITCONTEXT]
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add lr, pc, #L5 - . - 8
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mov pc, r3
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L5:
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bl _fpe_arm_core_initcontext
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ldmfd sp!, {r0-r7, r10, pc}
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@ -145,12 +98,7 @@ L5:
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_arm_fpe_core_changecontext:
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stmfd sp!, {r1-r7, r10, lr}
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mov r10, r0
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ldr r3, [pc, #arm_fpe_header - . - 8]
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ldr r3, [r3, #ARM_FPE_CORE_CHANGECONTEXT]
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add lr, pc, #L6 - . - 8
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mov pc, r3
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L6:
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bl _fpe_arm_core_changecontext
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ldmfd sp!, {r1-r7, r10, pc}
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@ -159,12 +107,7 @@ L6:
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.global _arm_fpe_core_shutdown
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_arm_fpe_core_shutdown:
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stmfd sp!, {r0-r7, r10, lr}
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ldr r3, [pc, #arm_fpe_header - . - 8]
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ldr r3, [r3, #ARM_FPE_CORE_SHUTDOWN]
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add lr, pc, #L7 - . - 8
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mov pc, r3
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L7:
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bl _fpe_arm_core_shutdown
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ldmfd sp!, {r0-r7, r10, pc}
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@ -175,12 +118,7 @@ _arm_fpe_core_savecontext:
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mov r10, r0
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mov r0, r1
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mov r1, r2
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ldr r3, [pc, #arm_fpe_header - . - 8]
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ldr r3, [r3, #ARM_FPE_CORE_SAVECONTEXT]
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add lr, pc, #L8 - . - 8
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mov pc, r3
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L8:
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bl _fpe_arm_core_savecontext
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ldmfd sp!, {r1-r7, r10, pc}
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@ -191,12 +129,7 @@ _arm_fpe_core_loadcontext:
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stmfd sp!, {r0-r7, r10, lr}
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mov r10, r0
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mov r0, r1
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ldr r3, [pc, #arm_fpe_header - . - 8]
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ldr r3, [r3, #ARM_FPE_CORE_LOADCONTEXT]
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add lr, pc, #L9 - . - 8
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mov pc, r3
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L9:
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bl _fpe_arm_core_loadcontext
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ldmfd sp!, {r0-r7, r10, pc}
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@ -206,12 +139,7 @@ L9:
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_arm_fpe_core_activatecontext:
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stmfd sp!, {r0-r7, r10, lr}
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mov r10, r0
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ldr r3, [pc, #arm_fpe_header - . - 8]
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ldr r3, [r3, #ARM_FPE_CORE_ACTIVATECONTEXT]
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add lr, pc, #L10 - . - 8
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mov pc, r3
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L10:
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bl _fpe_arm_core_activatecontext
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ldmfd sp!, {r0-r7, r10, pc}
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@ -220,15 +148,9 @@ L10:
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.global _arm_fpe_core_deactivatecontext
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_arm_fpe_core_deactivatecontext:
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stmfd sp!, {r1-r7, r10, lr}
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ldr r3, [pc, #arm_fpe_header - . - 8]
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ldr r3, [r3, #ARM_FPE_CORE_DEACTIVATECONTEXT]
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add lr, pc, #L11 - . - 8
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mov pc, r3
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L11:
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bl _fpe_arm_core_deactivatecontext
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ldmfd sp!, {r1-r7, r10, pc}
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/* Simple call back function that panics */
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.global _arm_fpe_panic
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@ -245,9 +167,101 @@ fpe_panic_text:
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* Call back routine from FPE on completion of an instruction
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*/
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#ifdef CHECK_BEFORE_USERRET
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.global _userret_count0
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.global _userret_count1
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.data
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_userret_count0:
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.word 0
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_userret_count1:
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.word 0
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.text
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Luserret_count0:
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.word _userret_count0
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Luserret_count1:
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.word _userret_count1
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Lwant_resched:
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.word _want_resched
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Lcurproc:
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.word _curproc
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Lcurpriority:
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.word _curpriority
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#endif
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.global _arm_fpe_post_proc_glue
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_arm_fpe_post_proc_glue:
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stmfd sp!, {r0-r6, r10-r12, lr}
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stmfd sp!, {r0-r3, lr}
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#ifdef CHECK_BEFORE_USERRET
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/* Call userret if we need a reschedule */
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/* Debugging */
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ldr r0, Luserret_count0
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ldr r1, [r0]
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add r1, r1, #1
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str r1, [r0]
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/* Do we need a reschedule */
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ldr r0, Lwant_resched
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ldr r0, [r0]
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teq r0, #0x00000000
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bne Lwe_need_userret
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/* All other userret requirement conditions come from curproc */
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ldr r0, Lcurproc
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ldr r0, [r0]
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/* Remember the flags field */
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ldr r3, [r0, #(P_FLAG)]
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/* Get the signal list */
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ldr r1, [r0, #(P_SIGLIST)]
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teq r1, #0x00000000
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beq Lno_signals_pending
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tst r3, #(P_TRACED)
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bne Lwe_need_userret
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ldr r1, [r0, #(P_SIGLIST)]
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ldr r2, [r0, #(P_SIGMASK)]
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bic r1, r1, r2
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teq r1, #0x00000000
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bne Lwe_need_userret
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Lno_signals_pending:
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/* Are we profiling ? */
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tst r3, #(P_PROFIL)
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bne Lwe_need_userret
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/* Update the current priority */
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ldrb r1, [r0, #(P_USRPRI)]
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strb r1, [r0, #(P_PRIORITY)]
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ldr r0, Lcurpriority
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strb r1, [r0]
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/* Fast return */
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ldmfd sp!, {r0-r3, pc}
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Lwe_need_userret:
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/* Ok we need to call userret() */
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stmfd sp!, {r4-r6, r10-r12}
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/* Debugging */
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ldr r0, Luserret_count1
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ldr r1, [r0]
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add r1, r1, #1
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str r1, [r0]
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#endif
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/* This could be optimised as we are going from UND32->SVC32 mode */
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@ -264,42 +278,23 @@ _arm_fpe_post_proc_glue:
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mov r1, sp
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ldr r2, [r0, #-0x0008] /* Copy spsr */
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str r2, [r1, #0x0000]
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str r2, [r1], #0x0004
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ldr r2, [r0, #0x0000] /* Copy r0 */
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str r2, [r1, #0x0004]
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ldr r2, [r0, #0x0004]
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str r2, [r1, #0x0008]
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ldr r2, [r0, #0x0008]
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str r2, [r1, #0x000c]
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ldr r2, [r0, #0x000c]
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str r2, [r1, #0x0010]
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ldr r2, [r0, #0x0010]
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str r2, [r1, #0x0014]
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ldr r2, [r0, #0x0014]
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str r2, [r1, #0x0018]
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ldr r2, [r0, #0x0018]
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str r2, [r1, #0x001c]
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ldr r2, [r0, #0x001c]
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str r2, [r1, #0x0020]
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ldr r2, [r0, #0x0020]
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str r2, [r1, #0x0024]
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ldr r2, [r0, #0x0024]
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str r2, [r1, #0x0028]
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ldr r2, [r0, #0x0028]
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str r2, [r1, #0x002c]
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ldr r2, [r0, #0x002c]
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str r2, [r1, #0x0030]
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ldr r2, [r0, #0x0030] /* Copy r12 */
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str r2, [r1, #0x0034]
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ldr r2, [r0, #0x0034] /* Copy usr r13 */
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str r2, [r1, #0x0038]
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ldr r2, [r0, #0x0038] /* Copy usr r14 */
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str r2, [r1, #0x003c]
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ldr r2, [r0, #0x003c] /* Copy old pc */
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str r2, [r1, #0x0044]
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ldmia r0!, {r2, r3, r5, r6} /* copy r0-r5 */
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stmia r1!, {r2, r3, r5, r6}
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str r14, [r1, #0x0040] /* SVC r14 */
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ldmia r0!, {r2, r3, r5, r6} /* copy r6-r11 */
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stmia r1!, {r2, r3, r5, r6}
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ldmia r0!, {r2, r3, r5, r6} /* copy r6-r11 */
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stmia r1!, {r2, r3, r5, r6}
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ldmia r0!, {r2, r3, r5, r6} /* copy r12, r13, r14, r15 */
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stmia r1!, {r2, r3, r5, r14}
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str r6, [r1, #0x0000]
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mov r0, r12
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mov r1, sp
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/*
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* OK Question Time ...
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@ -313,55 +308,36 @@ _arm_fpe_post_proc_glue:
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mov r5, r14
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mov r6, r12
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/* More optimisation ... Need to code a assembly version of userret() */
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/* More optimisation ... Need to code an assembly version of userret() */
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bl _arm_fpe_postproc
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/* Release the trapframe on the SVC stack */
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mov r14, r5
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ldr r2, [sp, #0x0000] /* Copy spsr */
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mov r0, sp
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ldr r2, [r0], #0x0004 /* Copy spsr */
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str r2, [r6, #-0x0008]
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ldr r2, [sp, #0x0004] /* Copy r0 */
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str r2, [r6, #0x0000]
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ldr r2, [sp, #0x0008] /* Copy r1 */
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str r2, [r6, #0x0004]
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ldr r2, [sp, #0x000c] /* Copy r2 */
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str r2, [r6, #0x0008]
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ldr r2, [sp, #0x0010] /* Copy r3 */
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str r2, [r6, #0x000c]
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ldr r2, [sp, #0x0014] /* Copy r4 */
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str r2, [r6, #0x0010]
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ldr r2, [sp, #0x0018] /* Copy r5 */
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str r2, [r6, #0x0014]
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ldr r2, [sp, #0x001c] /* Copy r6 */
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str r2, [r6, #0x0018]
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ldr r2, [sp, #0x0020] /* Copy r7 */
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str r2, [r6, #0x001c]
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ldr r2, [sp, #0x0024] /* Copy r8 */
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str r2, [r6, #0x0020]
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ldr r2, [sp, #0x0028] /* Copy r9 */
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str r2, [r6, #0x0024]
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ldr r2, [sp, #0x002c] /* Copy r10 */
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str r2, [r6, #0x0028]
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ldr r2, [sp, #0x0030] /* Copy r11 */
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str r2, [r6, #0x002c]
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ldr r2, [sp, #0x0034] /* Copy r12 */
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str r2, [r6, #0x0030]
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ldr r2, [sp, #0x0038] /* Copy usr r13 */
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str r2, [r6, #0x0034]
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ldr r2, [sp, #0x003c] /* Copy usr r14 */
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str r2, [r6, #0x0038]
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ldr r2, [sp, #0x0044] /* Copy pc */
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str r2, [r6, #0x003c]
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ldmia r0!, {r1, r2, r3, r5, r10, r11} /* copy r0-r5 */
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stmia r6!, {r1, r2, r3, r5, r10, r11}
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ldmia r0!, {r1, r2, r3, r5, r10, r11} /* copy r6-r11 */
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stmia r6!, {r1, r2, r3, r5, r10, r11}
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ldmia r0!, {r1, r2, r3} /* copy r12, r13, r14 */
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stmia r6!, {r1, r2, r3}
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ldr r1, [r0, #0x0004]
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str r1, [r6]
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add sp, sp, #(TRAPFRAMESIZE)
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mov r14, r5
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msr cpsr_all, r4
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ldmfd sp!, {r0-r6, r10-r12, pc}
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ldmfd sp!, {r4-r6, r10-r12}
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ldmfd sp!, {r0-r3, pc}
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/*
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Loading…
Reference in New Issue