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Move the mct's interrupt from a shared SPI interrupt to a private PPI

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interrupt so all possible cpus get them.
This commit is contained in:
reinoud 2014-08-28 11:38:14 +00:00
parent accb62aedc
commit 7b63dc4e05
1 changed files with 5 additions and 1 deletions
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6
sys/arch/arm/samsung/exynos4_loc.c
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@ -139,6 +139,10 @@
#define IRQ_EINT_1 IRQ_SPI(17)
#define IRQ_EINT_0 IRQ_SPI(16)
/* rest of PPI's marked reserved */
#define IRQ_MCT_L IRQ_PPI(12)
#define IRQ_MCT_G IRQ_PPI(10)
#define IRQ_CPU_NIRQOUT_3 EXYNOS_COMBINERIRQ(19, 6)
#define IRQ_PARITYFAILSCU_3 EXYNOS_COMBINERIRQ(19, 5)
#define IRQ_PARITYFAIL3 EXYNOS_COMBINERIRQ(19, 4)
@ -266,7 +270,7 @@
static const struct exyo_locators exynos4_locators[] = {
{ "exyogpio", 0, 0, NOPORT, NOINTR, 0 },
{ "exyoiic", 0, 0, NOPORT, NOINTR, 0 },
{ "mct", OFFANDSIZE(,MCT), NOPORT, IRQ_G0_IRQ, 0 },
{ "mct", OFFANDSIZE(,MCT), NOPORT, IRQ_MCT_G, 0 },
{ "exyowdt", OFFANDSIZE(,WDT), NOPORT, IRQ_WDT, 0 },
{ "sscom", OFFANDSIZE(,UART0), 0, IRQ_UART0, 0 },
{ "sscom", OFFANDSIZE(,UART1), 1, IRQ_UART1, 0 },