Require arm3_cache_flush for ARM2/ARM250.
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@ -1,4 +1,4 @@
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/* $NetBSD: cpufunc_asm_arm3.S,v 1.1 2001/11/10 23:14:09 thorpej Exp $ */
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/* $NetBSD: cpufunc_asm_arm3.S,v 1.2 2011/12/11 03:30:23 kiyohara Exp $ */
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/*
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* Copyright (c) 1997,1998 Mark Brinicombe.
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@ -38,6 +38,7 @@
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#include <machine/cpu.h>
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#include <machine/asm.h>
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#ifdef CPU_ARM3
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/*
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* The ARM3 has its own control register in a different place.
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*/
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@ -50,11 +51,12 @@ ENTRY(arm3_control)
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mcrne p15, 0, r2, c2, c0, 0 /* Write new control register */
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mov r0, r3 /* Return old value */
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mov pc, lr
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#endif /* CPU_ARM3 */
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/*
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* Cache functions.
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*/
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ENTRY(arm3_cache_flush)
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ENTRY(arm3_cache_flush) /* Also ARM2 and ARM250 */
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mcr p15, 0, r0, c1, c0, 0
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mov pc, lr
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@ -1,4 +1,4 @@
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# $NetBSD: files.arm,v 1.102 2011/06/12 03:35:39 rmind Exp $
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# $NetBSD: files.arm,v 1.103 2011/12/11 03:30:23 kiyohara Exp $
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# temporary define to allow easy moving to ../arch/arm/arm32
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defflag ARM32
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@ -105,7 +105,7 @@ file arch/arm/arm/core_machdep.c
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file arch/arm/arm/cpu_in_cksum.S (inet | inet6) & cpu_in_cksum
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file arch/arm/arm/cpufunc.c
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file arch/arm/arm/cpufunc_asm.S
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file arch/arm/arm/cpufunc_asm_arm3.S cpu_arm3
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file arch/arm/arm/cpufunc_asm_arm3.S cpu_arm2 | cpu_arm250 | cpu_arm3
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file arch/arm/arm/cpufunc_asm_arm67.S cpu_arm6 | cpu_arm7
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file arch/arm/arm/cpufunc_asm_arm7tdmi.S cpu_arm7tdmi
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file arch/arm/arm/cpufunc_asm_arm8.S cpu_arm8
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@ -213,6 +213,10 @@ void cpufunc_domains (u_int);
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u_int cpufunc_faultstatus (void);
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u_int cpufunc_faultaddress (void);
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#if defined(CPU_ARM2) || defined(CPU_ARM250) || defined(CPU_ARM3)
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void arm3_cache_flush (void);
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#endif /* CPU_ARM2 || CPU_ARM250 || CPU_ARM3 */
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#ifdef CPU_ARM2
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u_int arm2_id (void);
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#endif /* CPU_ARM2 */
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@ -223,7 +227,6 @@ u_int arm250_id (void);
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#ifdef CPU_ARM3
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u_int arm3_control (u_int, u_int);
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void arm3_cache_flush (void);
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#endif /* CPU_ARM3 */
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#if defined(CPU_ARM6) || defined(CPU_ARM7)
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