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Complete from-scratch rewrite of the DECstation bus.h, brining it

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up-to-date with the current API, and implementing preliminary
support for bus_dma.
This commit is contained in:
thorpej 1998-05-22 21:14:04 +00:00
parent 2c23336179
commit 7a9c58e1b1
4 changed files with 1384 additions and 121 deletions
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4
sys/arch/pmax/conf/files.pmax
View File

@ -1,4 +1,4 @@
# $NetBSD: files.pmax,v 1.53 1998/04/19 08:39:43 jonathan Exp $
# $NetBSD: files.pmax,v 1.54 1998/05/22 21:14:04 thorpej Exp $
# DECstation-specific configuration info
# maxpartitions must be first item in files.${ARCH}.
@ -219,6 +219,8 @@ file arch/pmax/dev/if_tt.c tt needs-count
file arch/pmax/dev/scsi.c
file arch/pmax/pmax/autoconf.c
file arch/pmax/pmax/bus_dma.c
file arch/pmax/pmax/bus_space.c
file arch/pmax/pmax/conf.c
#file arch/pmax/pmax/kadb.c optional kadb
#file arch/pmax/pmax/machdep.c standard config-dependent

714
sys/arch/pmax/include/bus.h
View File

@ -1,9 +1,13 @@
/* $NetBSD: bus.h,v 1.4 1997/11/28 00:33:53 jonathan Exp $ */
/* $NetBSD: bus.h,v 1.5 1998/05/22 21:14:04 thorpej Exp $ */
/*
* Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
/*-
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@ -14,33 +18,35 @@
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Jonathan Stone for
* the NetBSD Project.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* NetBSD machine-indepedent bus accessor macros/functions for Decstations.
*/
#ifndef _PMAX_BUS_H_
#define _PMAX_BUS_H_
#include <mips/locore.h> /* wbflush() */
#include <mips/locore.h>
/*
* Utility macros; do not use outside this file.
*/
#define __PB_TYPENAME_PREFIX(BITS) ___CONCAT(u_int,BITS)
#define __PB_TYPENAME(BITS) ___CONCAT(__PB_TYPENAME_PREFIX(BITS),_t)
/*
* Bus address and size types
@ -49,124 +55,592 @@ typedef u_long bus_addr_t;
typedef u_long bus_size_t;
/*
* Access types for bus resources and addresses.
* Access methods for bus resources and address space.
*/
typedef int bus_space_tag_t;
typedef u_long bus_space_handle_t;
typedef int bus_space_tag_t;
typedef u_long bus_space_handle_t;
/*
* Read or write a 1, 2, or 4-byte quantity from/to a bus-space
* address, as defined by (space-tag, handle, offset
* int bus_space_map __P((bus_space_tag_t t, bus_addr_t addr,
* bus_size_t size, int flags, bus_space_handle_t *bshp));
*
* Map a region of bus space.
*/
#define bus_space_read_1(t, h, o) \
(*(volatile u_int8_t *)((h) + (o)))
#define bus_space_read_2(t, h, o) \
(*(volatile u_int16_t *)((h) + (o)))
#define BUS_SPACE_MAP_CACHEABLE 0x01
#define BUS_SPACE_MAP_LINEAR 0x02
#define bus_space_read_4(t, h, o) \
(*(volatile u_int32_t *)((h) + (o)))
#define bus_space_write_1(t, h, o, v) \
do { ((void)(*(volatile u_int8_t *)((h) + (o)) = (v))); } while (0)
#define bus_space_write_2(t, h, o, v) \
do { ((void)(*(volatile u_int16_t *)((h) + (o)) = (v))); } while (0)
#define bus_space_write_4(t, h, o, v) \
do { ((void)(*(volatile u_int32_t *)((h) + (o)) = (v))); } while (0)
int bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t,
int, bus_space_handle_t *));
/*
* Read `count' 1, 2, or 4-byte quantities from bus-space
* address, defined by (space-tag, handle, offset).
* Copy to the specified buffer address.
* void bus_space_unmap __P((bus_space_tag_t t,
* bus_space_handle_t bsh, bus_size_t size));
*
* Unmap a region of bus space.
*/
#define bus_space_read_multi_1(t, h, o, a, c) \
do { \
register int __i ; \
for (__i = 0; i < (c); i++) \
((u_char *)(a))[__i] = bus_space_read_1(t, h, o); \
} while (0)
#define bus_space_read_multi_2(t, h, o, a, c) \
do { \
register int __i ; \
for (__i = 0; i < (c); i++) \
((u_int16t_t *)(a))[__i] = bus_space_read_2(t, h, o); \
} while (0)
#define bus_space_read_multi_4(t, h, o, a, c) \
do { \
register int __i ; \
for (__i = 0; i < (c); i++) \
((u_int32_t *)(a))[__i] = bus_space_read_4(t, h, o); \
} while (0)
void bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
/*
* Write `count' 1, 2, or 4-byte quantities to a bus-space
* address, defined by (space-tag, handle, offset).
* Copy from the specified buffer address.
* int bus_space_subregion __P((bus_space_tag_t t,
* bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
* bus_space_handle_t *nbshp));
*
* Get a new handle for a subregion of an already-mapped area of bus space.
*/
#define bus_space_write_multi_1(t, h, o, a, c) \
do { \
register int __i ; \
for (__i = 0; i < (c); i++) \
bus_space_write_1(t, h, o, ((u_char *)(a))[__i]); \
} while (0)
#define bus_space_write_multi_2(t, h, o, a, c) \
do { \
register int __i ; \
for (__i = 0; i < (c); i++) \
bus_space_write_2(t, h, o, ((u_int16_t *)(a))[__i]); \
} while (0)
#define bus_space_write_multi_4(t, h, o, a, c) \
do { \
register int __i ; \
for (__i = 0; i < (c); i++) \
bus_space_write_4(t, h, o, ((u_int32_t *)(a))[__i]); \
} while (0)
int bus_space_subregion __P((bus_space_tag_t t, bus_space_handle_t bsh,
bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp));
/*
* Copy `count' 1, 2, or 4-byte values from one bus-space address
* (t, h, o triple) to another.
* int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t, rstart,
* bus_addr_t rend, bus_size_t size, bus_size_t align,
* bus_size_t boundary, int flags, bus_addr_t *addrp,
* bus_space_handle_t *bshp));
*
* Allocate a region of bus space.
*/
#define bus_space_copy_multi_1(t, h1, h2, o1, o2, c) \
do { \
register int __i ; \
for (__i = 0; i < (c); i++) \
bus_space_write_1(t, h1, o1, bus_space_read_1(t, h2, o2)); \
} while (0)
#define bus_space_copy_multi_2(t, h1, h2, o1, o2, c) \
do { \
register int __i ; \
for (__i = 0; i < (c); i++) \
bus_space_write_2(t, h1, o1, bus_space_read_2(t, h2, o2)); \
while (0)
#define bus_space_copy_multi_4(t, h1, h2, o1, o2, c) \
do { \
register int __i ; \
for (__i = 0; i < (c); i++) \
bus_space_write_4(t, h1, o1, bus_space_read_4(t, h2, o2)); \
} while (0)
int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t rstart,
bus_addr_t rend, bus_size_t size, bus_size_t align,
bus_size_t boundary, int cacheable, bus_addr_t *addrp,
bus_space_handle_t *bshp));
/*
* Bus-space barriers.
* Since DECstation DMA is non-cache-coherent, we have to handle
* consistency in software anyway (e.g., via bus -DMA, or by ensuring
* that DMA buffers are referenced via uncached address space.
* For now, simply do CPU writebuffer flushes and export the flags
* to MI code.
* int bus_space_free __P((bus_space_tag_t t,
* bus_space_handle_t bsh, bus_size_t size));
*
* Free a region of bus space.
*/
#define bus_space_barrier(t, h, o, l, f) wbflush()
#define BUS_BARRIER_READ 0x01
#define BUS_BARRIER_WRITE 0x02
void bus_space_free __P((bus_space_tag_t t, bus_space_handle_t bsh,
bus_size_t size));
/*
* u_intN_t bus_space_read_N __P((bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset));
*
* Read a 1, 2, 4, or 8 byte quantity from bus space
* described by tag/handle/offset.
*/
#define bus_space_read_1(t, h, o) \
(wbflush(), /* XXX */ \
(void) t, (*(volatile u_int8_t *)((h) + (o))))
#define bus_space_read_2(t, h, o) \
(wbflush(), /* XXX */ \
(void) t, (*(volatile u_int16_t *)((h) + (o))))
#define bus_space_read_4(t, h, o) \
(wbflush(), /* XXX */ \
(void) t, (*(volatile u_int32_t *)((h) + (o))))
#if 0 /* Cause a link error for bus_space_read_8 */
#define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
#endif
/*
* void bus_space_read_multi_N __P((bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* u_intN_t *addr, size_t count));
*
* Read `count' 1, 2, 4, or 8 byte quantities from bus space
* described by tag/handle/offset and copy into buffer provided.
*/
#define __PMAX_bus_space_read_multi(BYTES,BITS) \
static __inline void __CONCAT(bus_space_read_multi_,BYTES) \
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, \
__PB_TYPENAME(BITS) *, size_t)); \
\
static __inline void \
__CONCAT(bus_space_read_multi_,BYTES)(t, h, o, a, c) \
bus_space_tag_t t; \
bus_space_handle_t h; \
bus_size_t o; \
__PB_TYPENAME(BITS) *a; \
size_t c; \
{ \
\
while (c--) \
*a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \
}
__PMAX_bus_space_read_multi(1,8)
__PMAX_bus_space_read_multi(2,16)
__PMAX_bus_space_read_multi(4,32)
#if 0 /* Cause a link error for bus_space_read_multi_8 */
#define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
#endif
#undef __PMAX_bus_space_read_multi
/*
* void bus_space_read_region_N __P((bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* u_intN_t *addr, size_t count));
*
* Read `count' 1, 2, 4, or 8 byte quantities from bus space
* described by tag/handle and starting at `offset' and copy into
* buffer provided.
*/
#define __PMAX_bus_space_read_region(BYTES,BITS) \
static __inline void __CONCAT(bus_space_read_region_,BYTES) \
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, \
__PB_TYPENAME(BITS) *, size_t)); \
\
static __inline void \
__CONCAT(bus_space_read_region_,BYTES)(t, h, o, a, c) \
bus_space_tag_t t; \
bus_space_handle_t h; \
bus_size_t o; \
__PB_TYPENAME(BITS) *a; \
size_t c; \
{ \
\
while (c--) { \
*a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \
o += BYTES; \
} \
}
__PMAX_bus_space_read_region(1,8)
__PMAX_bus_space_read_region(2,16)
__PMAX_bus_space_read_region(4,32)
#if 0 /* Cause a link error for bus_space_read_region_8 */
#define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
#endif
#undef __PMAX_bus_space_read_region
/*
* void bus_space_write_N __P((bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* u_intN_t value));
*
* Write the 1, 2, 4, or 8 byte value `value' to bus space
* described by tag/handle/offset.
*/
#define bus_space_write_1(t, h, o, v) \
do { \
(void) t; \
*(volatile u_int8_t *)((h) + (o)) = (v); \
wbflush(); /* XXX */ \
} while (0)
#define bus_space_write_2(t, h, o, v) \
do { \
(void) t; \
*(volatile u_int16_t *)((h) + (o)) = (v); \
wbflush(); /* XXX */ \
} while (0)
#define bus_space_write_4(t, h, o, v) \
do { \
(void) t; \
*(volatile u_int32_t *)((h) + (o)) = (v); \
wbflush(); /* XXX */ \
} while (0)
#if 0 /* Cause a link error for bus_space_write_8 */
#define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
#endif
/*
* void bus_space_write_multi_N __P((bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* const u_intN_t *addr, size_t count));
*
* Write `count' 1, 2, 4, or 8 byte quantities from the buffer
* provided to bus space described by tag/handle/offset.
*/
#define __PMAX_bus_space_write_multi(BYTES,BITS) \
static __inline void __CONCAT(bus_space_write_multi_,BYTES) \
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, \
__PB_TYPENAME(BITS) *, size_t)); \
\
static __inline void \
__CONCAT(bus_space_write_multi_,BYTES)(t, h, o, a, c) \
bus_space_tag_t t; \
bus_space_handle_t h; \
bus_size_t o; \
__PB_TYPENAME(BITS) *a; \
size_t c; \
{ \
\
while (c--) \
__CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \
}
__PMAX_bus_space_write_multi(1,8)
__PMAX_bus_space_write_multi(2,16)
__PMAX_bus_space_write_multi(4,32)
#if 0 /* Cause a link error for bus_space_write_8 */
#define bus_space_write_multi_8(t, h, o, a, c) \
!!! bus_space_write_multi_8 unimplimented !!!
#endif
#undef __PMAX_bus_space_write_multi
/*
* void bus_space_write_region_N __P((bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* const u_intN_t *addr, size_t count));
*
* Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
* to bus space described by tag/handle starting at `offset'.
*/
#define __PMAX_bus_space_write_region(BYTES,BITS) \
static __inline void __CONCAT(bus_space_write_region_,BYTES) \
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, \
__PB_TYPENAME(BITS) *, size_t)); \
\
static __inline void \
__CONCAT(bus_space_write_region_,BYTES)(t, h, o, a, c) \
bus_space_tag_t t; \
bus_space_handle_t h; \
bus_size_t o; \
__PB_TYPENAME(BITS) *a; \
size_t c; \
{ \
\
while (c--) { \
__CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \
o += BYTES; \
} \
}
__PMAX_bus_space_write_region(1,8)
__PMAX_bus_space_write_region(2,16)
__PMAX_bus_space_write_region(4,32)
#if 0 /* Cause a link error for bus_space_write_region_8 */
#define bus_space_write_region_8 \
!!! bus_space_write_region_8 unimplemented !!!
#endif
#undef __PMAX_bus_space_write_region
/*
* void bus_space_set_multi_N __P((bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
* size_t count));
*
* Write the 1, 2, 4, or 8 byte value `val' to bus space described
* by tag/handle/offset `count' times.
*/
#define __PMAX_bus_space_set_multi(BYTES,BITS) \
static __inline void __CONCAT(bus_space_set_multi_,BYTES) \
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, \
__PB_TYPENAME(BITS), size_t)); \
\
static __inline void \
__CONCAT(bus_space_set_multi_,BYTES)(t, h, o, v, c) \
bus_space_tag_t t; \
bus_space_handle_t h; \
bus_size_t o; \
__PB_TYPENAME(BITS) v; \
size_t c; \
{ \
\
while (c--) \
__CONCAT(bus_space_write_,BYTES)(t, h, o, v); \
}
__PMAX_bus_space_set_multi(1,8)
__PMAX_bus_space_set_multi(2,16)
__PMAX_bus_space_set_multi(4,32)
#if 0 /* Cause a link error for bus_space_set_multi_8 */
#define bus_space_set_multi_8 \
!!! bus_space_set_multi_8 unimplemented !!!
#endif
#undef __PMAX_bus_space_set_multi
/*
* void bus_space_set_region_N __P((bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
* size_t count));
*
* Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
* by tag/handle starting at `offset'.
*/
#define __PMAX_bus_space_set_region(BYTES,BITS) \
static __inline void __CONCAT(bus_space_set_region_,BYTES) \
__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, \
__PB_TYPENAME(BITS), size_t)); \
\
static __inline void \
__CONCAT(bus_space_set_region_,BYTES)(t, h, o, v, c) \
bus_space_tag_t t; \
bus_space_handle_t h; \
bus_size_t o; \
__PB_TYPENAME(BITS) v; \
size_t c; \
{ \
\
while (c--) { \
__CONCAT(bus_space_write_,BYTES)(t, h, o, v); \
o += BYTES; \
} \
}
__PMAX_bus_space_set_region(1,8)
__PMAX_bus_space_set_region(2,16)
__PMAX_bus_space_set_region(4,32)
#if 0 /* Cause a link error for bus_space_set_region_8 */
#define bus_space_set_region_8 \
!!! bus_space_set_region_8 unimplemented !!!
#endif
#undef __PMAX_bus_space_set_region
/*
* void bus_space_copy_region_N __P((bus_space_tag_t tag,
* bus_space_handle_t bsh1, bus_size_t off1,
* bus_space_handle_t bsh2, bus_size_t off2,
* bus_size_t count));
*
* Copy `count' 1, 2, 4, or 8 byte values from bus space starting
* at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
*/
#define __PMAX_copy_region(BYTES) \
static __inline void __CONCAT(bus_space_copy_region_,BYTES) \
__P((bus_space_tag_t, \
bus_space_handle_t bsh1, bus_size_t off1, \
bus_space_handle_t bsh2, bus_size_t off2, \
bus_size_t count)); \
\
static __inline void \
__CONCAT(bus_space_copy_region_,BYTES)(t, h1, o1, h2, o2, c) \
bus_space_tag_t t; \
bus_space_handle_t h1, h2; \
bus_size_t o1, o2, c; \
{ \
bus_size_t o; \
\
if ((h1 + o1) >= (h2 + o2)) { \
/* src after dest: copy forward */ \
for (o = 0; c != 0; c--, o += BYTES) \
__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
__CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
} else { \
/* dest after src: copy backwards */ \
for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
__CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
} \
}
__PMAX_copy_region(1)
__PMAX_copy_region(2)
__PMAX_copy_region(4)
#if 0 /* Cause a link error for bus_space_copy_region_8 */
#define bus_space_copy_region_8 \
!!! bus_space_copy_region_8 unimplemented !!!
#endif
#undef __PMAX_copy_region
/*
* Bus read/write barrier methods.
*
* void bus_space_barrier __P((bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* bus_size_t len, int flags));
*
* On the MIPS, we just flush the write buffer.
*/
#define bus_space_barrier(t, h, o, l, f) \
((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)), \
wbflush())
#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
#undef __PB_TYPENAME_PREFIX
#undef __PB_TYPENAME
/*
* Flags used in various bus DMA methods.
*/
#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
#define BUS_DMA_COHERENT 0x04 /* hint: map memory DMA coherent */
#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
#define BUS_DMA_BUS2 0x20
#define BUS_DMA_BUS3 0x40
#define BUS_DMA_BUS4 0x80
#define PMAX_DMAMAP_COHERENT 0x100 /* no cache flush necessary on sync */
/* Forwards needed by prototypes below. */
struct mbuf;
struct uio;
/*
* Operations performed by bus_dmamap_sync().
*/
#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
typedef struct pmax_bus_dma_tag *bus_dma_tag_t;
typedef struct pmax_bus_dmamap *bus_dmamap_t;
/*
* bus_dma_segment_t
*
* Describes a single contiguous DMA transaction. Values
* are suitable for programming into DMA registers.
*/
struct pmax_bus_dma_segment {
bus_addr_t ds_addr; /* DMA address */
bus_size_t ds_len; /* length of transfer */
};
typedef struct pmax_bus_dma_segment bus_dma_segment_t;
/*
* bus_dma_tag_t
*
* A machine-dependent opaque type describing the implementation of
* DMA for a given bus.
*/
struct pmax_bus_dma_tag {
/*
* DMA mapping methods.
*/
int (*_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
bus_size_t, bus_size_t, int, bus_dmamap_t *));
void (*_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
int (*_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
bus_size_t, struct proc *, int));
int (*_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
struct mbuf *, int));
int (*_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
struct uio *, int));
int (*_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
bus_dma_segment_t *, int, bus_size_t, int));
void (*_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
void (*_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
bus_addr_t, bus_size_t, int));
/*
* DMA memory utility functions.
*/
int (*_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
bus_size_t, bus_dma_segment_t *, int, int *, int));
void (*_dmamem_free) __P((bus_dma_tag_t,
bus_dma_segment_t *, int));
int (*_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
int, size_t, caddr_t *, int));
void (*_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
int (*_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
int, int, int, int));
};
#define bus_dmamap_create(t, s, n, m, b, f, p) \
(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
#define bus_dmamap_destroy(t, p) \
(*(t)->_dmamap_destroy)((t), (p))
#define bus_dmamap_load(t, m, b, s, p, f) \
(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
#define bus_dmamap_load_mbuf(t, m, b, f) \
(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
#define bus_dmamap_load_uio(t, m, u, f) \
(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
#define bus_dmamap_load_raw(t, m, sg, n, s, f) \
(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
#define bus_dmamap_unload(t, p) \
(*(t)->_dmamap_unload)((t), (p))
#define bus_dmamap_sync(t, p, o, l, ops) \
(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
#define bus_dmamem_free(t, sg, n) \
(*(t)->_dmamem_free)((t), (sg), (n))
#define bus_dmamem_map(t, sg, n, s, k, f) \
(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
#define bus_dmamem_unmap(t, k, s) \
(*(t)->_dmamem_unmap)((t), (k), (s))
#define bus_dmamem_mmap(t, sg, n, o, p, f) \
(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
/*
* bus_dmamap_t
*
* Describes a DMA mapping.
*/
struct pmax_bus_dmamap {
/*
* PRIVATE MEMBERS: not for use my machine-independent code.
*/
bus_size_t _dm_size; /* largest DMA transfer mappable */
int _dm_segcnt; /* number of segs this map can map */
bus_size_t _dm_maxsegsz; /* largest possible segment */
bus_size_t _dm_boundary; /* don't cross this */
int _dm_flags; /* misc. flags */
/*
* PUBLIC MEMBERS: these are used by machine-independent code.
*/
bus_size_t dm_mapsize; /* size of the mapping */
int dm_nsegs; /* # valid segments in mapping */
bus_dma_segment_t dm_segs[1]; /* segments; variable length */
};
#ifdef _PMAX_BUS_DMA_PRIVATE
int _bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
bus_size_t, int, bus_dmamap_t *));
void _bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
int _bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
bus_size_t, struct proc *, int));
int _bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
struct mbuf *, int));
int _bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
struct uio *, int));
int _bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
bus_dma_segment_t *, int, bus_size_t, int));
void _bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
void _bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
bus_size_t, int));
int _bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
bus_size_t alignment, bus_size_t boundary,
bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
void _bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
int nsegs));
int _bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
int nsegs, size_t size, caddr_t *kvap, int flags));
void _bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
size_t size));
int _bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
int nsegs, int off, int prot, int flags));
int _bus_dmamem_alloc_range __P((bus_dma_tag_t tag, bus_size_t size,
bus_size_t alignment, bus_size_t boundary,
bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
vm_offset_t low, vm_offset_t high));
extern struct pmax_bus_dma_tag pmax_default_bus_dma_tag;
#endif /* _PMAX_BUS_DMA_PRIVATE */
#endif /* _PMAX_BUS_H_ */

663
sys/arch/pmax/pmax/bus_dma.c Normal file
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@ -0,0 +1,663 @@
/* $NetBSD: bus_dma.c,v 1.1 1998/05/22 21:14:04 thorpej Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "opt_uvm.h"
#include "opt_pmap_new.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <sys/proc.h>
#include <sys/mbuf.h>
#include <vm/vm.h>
#include <vm/vm_kern.h>
#if defined(UVM)
#include <uvm/uvm_extern.h>
#endif
#include <mips/cpuregs.h>
#include <mips/locore.h>
#define _PMAX_BUS_DMA_PRIVATE
#include <machine/bus.h>
int _bus_dmamap_load_buffer __P((bus_dmamap_t,
void *, bus_size_t, struct proc *, int, vm_offset_t *,
int *, int));
extern vm_offset_t kvtophys __P((vm_offset_t)); /* XXX */
/*
* The default DMA tag for all busses on the DECstation.
*/
struct pmax_bus_dma_tag pmax_default_bus_dma_tag = {
_bus_dmamap_create,
_bus_dmamap_destroy,
_bus_dmamap_load,
_bus_dmamap_load_mbuf,
_bus_dmamap_load_uio,
_bus_dmamap_load_raw,
_bus_dmamap_unload,
_bus_dmamap_sync,
_bus_dmamem_alloc,
_bus_dmamem_free,
_bus_dmamem_map,
_bus_dmamem_unmap,
_bus_dmamem_mmap,
};
/*
* Common function for DMA map creation. May be called by bus-specific
* DMA map creation functions.
*/
int
_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, flags, dmamp)
bus_dma_tag_t t;
bus_size_t size;
int nsegments;
bus_size_t maxsegsz;
bus_size_t boundary;
int flags;
bus_dmamap_t *dmamp;
{
struct pmax_bus_dmamap *map;
void *mapstore;
size_t mapsize;
/*
* Allcoate and initialize the DMA map. The end of the map
* is a variable-sized array of segments, so we allocate enough
* room for them in one shot.
*
* Note we don't preserve the WAITOK or NOWAIT flags. Preservation
* of ALLOCNOW notifes others that we've reserved these resources,
* and they are not to be freed.
*
* The bus_dmamap_t includes one bus_dma_segment_t, hence
* the (nsegments - 1).
*/
mapsize = sizeof(struct pmax_bus_dmamap) +
(sizeof(bus_dma_segment_t) * (nsegments - 1));
if ((mapstore = malloc(mapsize, M_DMAMAP,
(flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
return (ENOMEM);
bzero(mapstore, mapsize);
map = (struct pmax_bus_dmamap *)mapstore;
map->_dm_size = size;
map->_dm_segcnt = nsegments;
map->_dm_maxsegsz = maxsegsz;
map->_dm_boundary = boundary;
map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
map->dm_mapsize = 0; /* no valid mappings */
map->dm_nsegs = 0;
*dmamp = map;
return (0);
}
/*
* Common function for DMA map destruction. May be called by bus-specific
* DMA map destruction functions.
*/
void
_bus_dmamap_destroy(t, map)
bus_dma_tag_t t;
bus_dmamap_t map;
{
free(map, M_DMAMAP);
}
/*
* Utility function to load a linear buffer. lastaddrp holds state
* between invocations (for multiple-buffer loads). segp contains
* the starting segment on entrance, and the ending segment on exit.
* first indicates if this is the first invocation of this function.
*/
int
_bus_dmamap_load_buffer(map, buf, buflen, p, flags,
lastaddrp, segp, first)
bus_dmamap_t map;
void *buf;
bus_size_t buflen;
struct proc *p;
int flags;
vm_offset_t *lastaddrp;
int *segp;
int first;
{
bus_size_t sgsize;
vm_offset_t curaddr, lastaddr;
vm_offset_t vaddr = (vm_offset_t)buf;
int seg;
lastaddr = *lastaddrp;
for (seg = *segp; buflen > 0 && seg < map->_dm_segcnt; ) {
/*
* Get the physical address for this segment.
*/
if (p != NULL)
curaddr = pmap_extract(p->p_vmspace->vm_map.pmap,
vaddr);
else
curaddr = kvtophys(vaddr);
/*
* Compute the segment size, and adjust counts.
*/
sgsize = NBPG - ((u_long)vaddr & PGOFSET);
if (buflen < sgsize)
sgsize = buflen;
/*
* Insert chunk into a segment, coalescing with
* the previous segment if possible.
*/
if (first) {
map->dm_segs[seg].ds_addr = curaddr;
map->dm_segs[seg].ds_len = sgsize;
first = 0;
} else {
if (curaddr == lastaddr &&
(map->dm_segs[seg].ds_len + sgsize) <=
map->_dm_maxsegsz)
map->dm_segs[seg].ds_len += sgsize;
else {
seg++;
map->dm_segs[seg].ds_addr = curaddr;
map->dm_segs[seg].ds_len = sgsize;
}
}
lastaddr = curaddr + sgsize;
vaddr += sgsize;
buflen -= sgsize;
}
*segp = seg;
*lastaddrp = lastaddr;
/*
* Did we fit?
*/
if (buflen != 0) {
/*
* If there is a chained window, we will automatically
* fall back to it.
*/
return (EFBIG); /* XXX better return value here? */
}
return (0);
}
/*
* Common function for loading a direct-mapped DMA map with a linear
* buffer.
*/
int
_bus_dmamap_load(t, map, buf, buflen, p, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
void *buf;
bus_size_t buflen;
struct proc *p;
int flags;
{
vm_offset_t lastaddr;
int seg, error;
/*
* Make sure that on error condition we return "no valid mappings".
*/
map->dm_mapsize = 0;
map->dm_nsegs = 0;
if (buflen > map->_dm_size)
return (EINVAL);
seg = 0;
error = _bus_dmamap_load_buffer(map, buf, buflen,
p, flags, &lastaddr, &seg, 1);
if (error == 0) {
map->dm_mapsize = buflen;
map->dm_nsegs = seg + 1;
/*
* For linear buffers, we support marking the mapping
* as COHERENT.
*
* XXX Check TLB entries for cache-inhibit bits?
*/
if (buf >= (void *)MIPS_KSEG1_START &&
buf < (void *)MIPS_KSEG2_START)
map->_dm_flags |= PMAX_DMAMAP_COHERENT;
}
return (error);
}
/*
* Like _bus_dmamap_load(), but for mbufs.
*/
int
_bus_dmamap_load_mbuf(t, map, m0, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
struct mbuf *m0;
int flags;
{
vm_offset_t lastaddr;
int seg, error, first;
struct mbuf *m;
/*
* Make sure that on error condition we return "no valid mappings."
*/
map->dm_mapsize = 0;
map->dm_nsegs = 0;
#ifdef DIAGNOSTIC
if ((m0->m_flags & M_PKTHDR) == 0)
panic("_bus_dmamap_load_mbuf: no packet header");
#endif
if (m0->m_pkthdr.len > map->_dm_size)
return (EINVAL);
first = 1;
seg = 0;
error = 0;
for (m = m0; m != NULL && error == 0; m = m->m_next) {
error = _bus_dmamap_load_buffer(map,
m->m_data, m->m_len, NULL, flags, &lastaddr, &seg, first);
first = 0;
}
if (error == 0) {
map->dm_mapsize = m0->m_pkthdr.len;
map->dm_nsegs = seg + 1;
}
return (error);
}
/*
* Like _bus_dmamap_load(), but for uios.
*/
int
_bus_dmamap_load_uio(t, map, uio, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
struct uio *uio;
int flags;
{
panic("_bus_dmamap_load_uio: not implemented");
}
/*
* Like _bus_dmamap_load(), but for raw memory.
*/
int
_bus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
bus_dma_tag_t t;
bus_dmamap_t map;
bus_dma_segment_t *segs;
int nsegs;
bus_size_t size;
int flags;
{
panic("_bus_dmamap_load_raw: not implemented");
}
/*
* Common function for unloading a DMA map. May be called by
* chipset-specific DMA map unload functions.
*/
void
_bus_dmamap_unload(t, map)
bus_dma_tag_t t;
bus_dmamap_t map;
{
/*
* No resources to free; just mark the mappings as
* invalid.
*/
map->dm_mapsize = 0;
map->dm_nsegs = 0;
map->_dm_flags &= ~PMAX_DMAMAP_COHERENT;
}
/*
* Common function for DMA map synchronization. May be called
* by chipset-specific DMA map synchronization functions.
*/
void
_bus_dmamap_sync(t, map, offset, len, ops)
bus_dma_tag_t t;
bus_dmamap_t map;
bus_addr_t offset;
bus_size_t len;
int ops;
{
/*
* Flush the write buffer.
*/
wbflush();
/*
* If the mapping is of COHERENT DMA-safe memory, no cache
* flush is necessary.
*/
if (map->_dm_flags & PMAX_DMAMAP_COHERENT)
return;
/*
* No cache flushes are necessary if we're only doing
* POSTREAD or POSTWRITE (i.e. not doing PREREAD or PREWRITE).
*/
if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) == 0)
return;
/*
* Flush data cache for PREREAD. This has the side-effect
* of invalidating the cache. Done at PREREAD since it
* causes the cache line(s) to be written back to memory.
*
* Flush data cache for PREWRITE, so that the contents of
* the data buffer in memory reflect reality.
*
* Given the test above, we know we're doing one of these
* two operations, so no additional tests are necessary.
*/
/*
* XXX This is WRONG, but the code throughout the tree
* XXX is inconsistent about how to go about flushing
* XXX the caches on R3000 and R4000 systems. Do we
* XXX use physical addresses? KSEG0 addresses? Virtual
* XXX addresses? What we really would like to do is
* XXX loop through the range of _physical_ addresses
* XXX (trivial to convert to KSEG0 addresses) specified
* XXX by map/offset/len and flush only those from the
* XXX data cache.
* XXX --thorpej@netbsd.org
*/
MachFlushCache();
}
/*
* Common function for DMA-safe memory allocation. May be called
* by bus-specific DMA memory allocation functions.
*/
int
_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
bus_dma_tag_t t;
bus_size_t size, alignment, boundary;
bus_dma_segment_t *segs;
int nsegs;
int *rsegs;
int flags;
{
extern vm_offset_t avail_start, avail_end;
vm_offset_t curaddr, lastaddr, high;
vm_page_t m;
struct pglist mlist;
int curseg, error;
/* Always round the size. */
size = round_page(size);
high = avail_end - PAGE_SIZE;
/*
* Allocate pages from the VM system.
*/
TAILQ_INIT(&mlist);
#if defined(UVM)
error = uvm_pglistalloc(size, avail_start, high, alignment, boundary,
&mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
#else
error = vm_page_alloc_memory(size, avail_start, high,
alignment, boundary, &mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
#endif
if (error)
return (error);
/*
* Compute the location, size, and number of segments actually
* returned by the VM code.
*/
m = mlist.tqh_first;
curseg = 0;
lastaddr = segs[curseg].ds_addr = VM_PAGE_TO_PHYS(m);
segs[curseg].ds_len = PAGE_SIZE;
m = m->pageq.tqe_next;
for (; m != NULL; m = m->pageq.tqe_next) {
curaddr = VM_PAGE_TO_PHYS(m);
#ifdef DIAGNOSTIC
if (curaddr < avail_start || curaddr >= high) {
printf("vm_page_alloc_memory returned non-sensical"
" address 0x%lx\n", curaddr);
panic("_bus_dmamem_alloc");
}
#endif
if (curaddr == (lastaddr + PAGE_SIZE))
segs[curseg].ds_len += PAGE_SIZE;
else {
curseg++;
segs[curseg].ds_addr = curaddr;
segs[curseg].ds_len = PAGE_SIZE;
}
lastaddr = curaddr;
}
*rsegs = curseg + 1;
return (0);
}
/*
* Common function for freeing DMA-safe memory. May be called by
* bus-specific DMA memory free functions.
*/
void
_bus_dmamem_free(t, segs, nsegs)
bus_dma_tag_t t;
bus_dma_segment_t *segs;
int nsegs;
{
vm_page_t m;
bus_addr_t addr;
struct pglist mlist;
int curseg;
/*
* Build a list of pages to free back to the VM system.
*/
TAILQ_INIT(&mlist);
for (curseg = 0; curseg < nsegs; curseg++) {
for (addr = segs[curseg].ds_addr;
addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
addr += PAGE_SIZE) {
m = PHYS_TO_VM_PAGE(addr);
TAILQ_INSERT_TAIL(&mlist, m, pageq);
}
}
#if defined(UVM)
uvm_pglistfree(&mlist);
#else
vm_page_free_memory(&mlist);
#endif
}
/*
* Common function for mapping DMA-safe memory. May be called by
* bus-specific DMA memory map functions.
*/
int
_bus_dmamem_map(t, segs, nsegs, size, kvap, flags)
bus_dma_tag_t t;
bus_dma_segment_t *segs;
int nsegs;
size_t size;
caddr_t *kvap;
int flags;
{
vm_offset_t va;
bus_addr_t addr;
int curseg;
/*
* If we're only mapping 1 segment, use KSEG0 or KSEG1, to avoid
* TLB thrashing.
*/
if (nsegs == 1) {
if (flags & BUS_DMA_COHERENT)
*kvap = (caddr_t)MIPS_PHYS_TO_KSEG1(segs[0].ds_addr);
else
*kvap = (caddr_t)MIPS_PHYS_TO_KSEG0(segs[0].ds_addr);
return (0);
}
size = round_page(size);
#if defined(UVM)
va = uvm_km_valloc(kernel_map, size);
#else
va = kmem_alloc_pageable(kernel_map, size);
#endif
if (va == 0)
return (ENOMEM);
*kvap = (caddr_t)va;
for (curseg = 0; curseg < nsegs; curseg++) {
for (addr = segs[curseg].ds_addr;
addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
addr += NBPG, va += NBPG, size -= NBPG) {
if (size == 0)
panic("_bus_dmamem_map: size botch");
#if defined(PMAP_NEW)
pmap_kenter_pa(va, addr, VM_PROT_READ | VM_PROT_WRITE);
#else
pmap_enter(pmap_kernel(), va, addr,
VM_PROT_READ | VM_PROT_WRITE, TRUE);
#endif
/* XXX Do something about COHERENT here. */
}
}
return (0);
}
/*
* Common function for unmapping DMA-safe memory. May be called by
* bus-specific DMA memory unmapping functions.
*/
void
_bus_dmamem_unmap(t, kva, size)
bus_dma_tag_t t;
caddr_t kva;
size_t size;
{
#ifdef DIAGNOSTIC
if ((u_long)kva & PGOFSET)
panic("_bus_dmamem_unmap");
#endif
/*
* Nothing to do if we mapped it with KSEG0 or KSEG1 (i.e.
* not in KSEG2).
*/
if (kva >= (caddr_t)MIPS_KSEG0_START &&
kva < (caddr_t)MIPS_KSEG2_START)
return;
size = round_page(size);
#if defined(UVM)
uvm_km_free(kernel_map, (vm_offset_t)kva, size);
#else
kmem_free(kernel_map, (vm_offset_t)kva, size);
#endif
}
/*
* Common functin for mmap(2)'ing DMA-safe memory. May be called by
* bus-specific DMA mmap(2)'ing functions.
*/
int
_bus_dmamem_mmap(t, segs, nsegs, off, prot, flags)
bus_dma_tag_t t;
bus_dma_segment_t *segs;
int nsegs, off, prot, flags;
{
int i;
for (i = 0; i < nsegs; i++) {
#ifdef DIAGNOSTIC
if (off & PGOFSET)
panic("_bus_dmamem_mmap: offset unaligned");
if (segs[i].ds_addr & PGOFSET)
panic("_bus_dmamem_mmap: segment unaligned");
if (segs[i].ds_len & PGOFSET)
panic("_bus_dmamem_mmap: segment size not multiple"
" of page size");
#endif
if (off >= segs[i].ds_len) {
off -= segs[i].ds_len;
continue;
}
return (mips_btop((caddr_t)segs[i].ds_addr + off));
}
/* Page not found. */
return (-1);
}

124
sys/arch/pmax/pmax/bus_space.c Normal file
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@ -0,0 +1,124 @@
/* $NetBSD: bus_space.c,v 1.1 1998/05/22 21:14:04 thorpej Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Implementation of bus_space mapping for the DECstation.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/map.h>
#include <mips/cpuregs.h>
#include <machine/bus.h>
/* ARGSUSED */
int
bus_space_map(t, bpa, size, flags, bshp)
bus_space_tag_t t;
bus_addr_t bpa;
bus_size_t size;
int flags;
bus_space_handle_t *bshp;
{
int cacheable = flags & BUS_SPACE_MAP_CACHEABLE;
/* Mappings on the DECstation are always linear. */
if (cacheable)
*bshp = MIPS_PHYS_TO_KSEG0(bpa);
else
*bshp = MIPS_PHYS_TO_KSEG1(bpa);
return (0);
}
/* ARGSUSED */
int
bus_space_alloc(t, rstart, rend, size, alignment, boundary, flags,
bpap, bshp)
bus_space_tag_t t;
bus_addr_t rstart, rend;
bus_size_t size, alignment, boundary;
int flags;
bus_addr_t *bpap;
bus_space_handle_t *bshp;
{
/*
* Not meaningful on any currently-supported DECstation bus.
*/
return (EINVAL);
}
/* ARGSUSED */
void
bus_space_free(t, bsh, size)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t size;
{
/*
* Not meaningful on any currently-supported DECstation bus.
*/
panic("bus_space_free: shouldn't be here");
}
void
bus_space_unmap(t, bsh, size)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t size;
{
/* Nothing to do. */
}
/* ARGSUSED */
int
bus_space_subregion(t, bsh, offset, size, nbshp)
bus_space_tag_t t;
bus_space_handle_t bsh;
bus_size_t offset, size;
bus_space_handle_t *nbshp;
{
*nbshp = bsh + offset;
return (0);
}