diff --git a/sys/arch/sparc64/include/bus_defs.h b/sys/arch/sparc64/include/bus_defs.h index e3ebf60f42a4..62dba7114586 100644 --- a/sys/arch/sparc64/include/bus_defs.h +++ b/sys/arch/sparc64/include/bus_defs.h @@ -1,4 +1,4 @@ -/* $NetBSD: bus_defs.h,v 1.3 2016/07/07 06:55:38 msaitoh Exp $ */ +/* $NetBSD: bus_defs.h,v 1.4 2016/11/04 05:41:01 macallan Exp $ */ /*- * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. @@ -171,6 +171,7 @@ struct sparc_bus_space_tag { #define BUS_SPACE_MAP_BUS2 0x0200 #define BUS_SPACE_MAP_BUS3 0x0400 #define BUS_SPACE_MAP_BUS4 0x0800 +#define BUS_SPACE_MAP_LITTLE 0x1000 /* sparc uses this, it's not supposed to do anything on sparc64 */ #define BUS_SPACE_MAP_LARGE 0 diff --git a/sys/arch/sparc64/include/pmap.h b/sys/arch/sparc64/include/pmap.h index 373b5447d4a7..cc5e72d777fb 100644 --- a/sys/arch/sparc64/include/pmap.h +++ b/sys/arch/sparc64/include/pmap.h @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.60 2015/09/06 23:48:39 nakayama Exp $ */ +/* $NetBSD: pmap.h,v 1.61 2016/11/04 05:41:01 macallan Exp $ */ /*- * Copyright (C) 1995, 1996 Wolfgang Solfrank. @@ -164,7 +164,7 @@ struct prom_map { uint64_t tte; }; -#define PMAP_NC 0x001 /* Set the E bit in the page */ +#define PMAP_NC 0x001 /* Don't cache, set the E bit in the page */ #define PMAP_NVC 0x002 /* Don't enable the virtual cache */ #define PMAP_LITTLE 0x004 /* Map in little endian mode */ /* Large page size hints -- @@ -177,6 +177,7 @@ struct prom_map { /* If these bits are different in va's to the same PA then there is an aliasing in the d$ */ #define VA_ALIAS_MASK (1 << 13) +#define PMAP_WC 0x20 /* allow write combinimg */ #ifdef _KERNEL #ifdef PMAP_COUNT_DEBUG diff --git a/sys/arch/sparc64/include/pte.h b/sys/arch/sparc64/include/pte.h index d079f808faf7..714aff429d28 100644 --- a/sys/arch/sparc64/include/pte.h +++ b/sys/arch/sparc64/include/pte.h @@ -1,4 +1,4 @@ -/* $NetBSD: pte.h,v 1.27 2015/04/03 10:07:57 palle Exp $ */ +/* $NetBSD: pte.h,v 1.28 2016/11/04 05:41:01 macallan Exp $ */ /* * Copyright (c) 1996-1999 Eduardo Horvath @@ -254,21 +254,21 @@ typedef struct sun4u_tte pte_t; #define SUN4V_TLB_W 0x0000000000000040LL #define SUN4V_TLB_G 0x0000000000000000LL -#define SUN4U_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) \ +#define SUN4U_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie,wc) \ (((valid)?SUN4U_TLB_V:0LL)|SUN4U_TLB_SZ(sz)|(((uint64_t)(pa))&SUN4U_TLB_PA_MASK)|\ -((cache)?((aliased)?SUN4U_TLB_CP:SUN4U_TLB_CACHE_MASK):SUN4U_TLB_E)|\ +((cache)?((aliased)?SUN4U_TLB_CP:SUN4U_TLB_CACHE_MASK):((wc)?0LL:SUN4U_TLB_E))|\ ((priv)?SUN4U_TLB_P:0LL)|((write)?SUN4U_TLB_W:0LL)|((g)?SUN4U_TLB_G:0LL)|((ie)?SUN4U_TLB_IE:0LL)) -#define SUN4V_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) \ +#define SUN4V_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie,wc) \ (((valid)?SUN4V_TLB_V:0LL)|SUN4V_TLB_SZ(sz)|\ (((u_int64_t)(pa))&SUN4V_TLB_PA_MASK)|\ -((cache)?((aliased)?SUN4V_TLB_CP:SUN4V_TLB_CACHE_MASK):SUN4V_TLB_E)|\ +((cache)?((aliased)?SUN4V_TLB_CP:SUN4V_TLB_CACHE_MASK):((wc)?0LL:SUN4V_TLB_E))|\ ((priv)?SUN4V_TLB_P:0LL)|((write)?SUN4V_TLB_W:0LL)|((g)?SUN4V_TLB_G:0LL)|\ ((ie)?SUN4V_TLB_IE:0LL)) -#define TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) \ -(CPU_ISSUN4V ? SUN4V_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) : \ - SUN4U_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie)) +#define TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie,wc) \ +(CPU_ISSUN4V ? SUN4V_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie,wc) : \ + SUN4U_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie,wc)) #define TLB_EXEC (CPU_ISSUN4V ? SUN4V_TLB_EXEC : SUN4U_TLB_EXEC) #define TLB_V (CPU_ISSUN4V ? SUN4V_TLB_V : SUN4U_TLB_V) @@ -283,6 +283,7 @@ typedef struct sun4u_tte pte_t; #define TLB_EXEC_ONLY (CPU_ISSUN4V ? SUN4V_TLB_EXEC_ONLY : SUN4U_TLB_EXEC_ONLY) #define TLB_L (CPU_ISSUN4V ? 0 : SUN4U_TLB_L) #define TLB_CV (CPU_ISSUN4V ? SUN4V_TLB_CV : SUN4U_TLB_CV) +#define TLB_IE (CPU_ISSUN4V ? SUN4V_TLB_IE : SUN4U_TLB_IE) #define MMU_CACHE_VIRT 0x3 #define MMU_CACHE_PHYS 0x2 diff --git a/sys/arch/sparc64/sparc64/machdep.c b/sys/arch/sparc64/sparc64/machdep.c index 4fbc8505f7e1..d1c0de5f83ff 100644 --- a/sys/arch/sparc64/sparc64/machdep.c +++ b/sys/arch/sparc64/sparc64/machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: machdep.c,v 1.285 2016/07/07 06:55:38 msaitoh Exp $ */ +/* $NetBSD: machdep.c,v 1.286 2016/11/04 05:41:01 macallan Exp $ */ /*- * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. @@ -71,7 +71,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.285 2016/07/07 06:55:38 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.286 2016/11/04 05:41:01 macallan Exp $"); #include "opt_ddb.h" #include "opt_multiprocessor.h" @@ -2357,8 +2357,14 @@ paddr_t sparc_bus_mmap(bus_space_tag_t t, bus_addr_t paddr, off_t off, int prot, int flags) { + paddr_t pa; /* Devices are un-cached... although the driver should do that */ - return ((paddr+off)|PMAP_NC); + pa = (paddr + off) | PMAP_NC; + if (flags & BUS_SPACE_MAP_LITTLE) + pa |= PMAP_LITTLE; + if (flags & BUS_SPACE_MAP_PREFETCHABLE) + pa |= PMAP_WC; + return pa; } diff --git a/sys/arch/sparc64/sparc64/pmap.c b/sys/arch/sparc64/sparc64/pmap.c index 0872c6e027a9..eacc859ccaae 100644 --- a/sys/arch/sparc64/sparc64/pmap.c +++ b/sys/arch/sparc64/sparc64/pmap.c @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.303 2016/07/07 06:55:38 msaitoh Exp $ */ +/* $NetBSD: pmap.c,v 1.304 2016/11/04 05:41:01 macallan Exp $ */ /* * * Copyright (C) 1996-1999 Eduardo Horvath. @@ -26,7 +26,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.303 2016/07/07 06:55:38 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.304 2016/11/04 05:41:01 macallan Exp $"); #undef NO_VCACHE /* Don't forget the locked TLB in dostart */ #define HWREF @@ -560,7 +560,8 @@ pmap_mp_init(void) 1, /* cache */ 1, /* aliased */ 1, /* valid */ - 0 /* ie */); + 0, /* ie */ + 0 /* wc */); tp[i].data |= TLB_L | TLB_CV; if (i >= kernel_itlb_slots) { @@ -1076,7 +1077,8 @@ pmap_bootstrap(u_long kernelstart, u_long kernelend) 1 /* Cacheable */, FORCE_ALIAS /* ALIAS -- Disable D$ */, 1 /* valid */, - 0 /* IE */); + 0 /* IE */, + 0 /* wc */); pmap_enter_kpage(va, data); va += PAGE_SIZE; msgbufsiz -= PAGE_SIZE; @@ -1137,7 +1139,8 @@ pmap_bootstrap(u_long kernelstart, u_long kernelend) 1 /* Cacheable */, FORCE_ALIAS /* ALIAS -- Disable D$ */, 1 /* valid */, - 0 /* IE */); + 0 /* ei */, + 0 /* WC */); pmap_enter_kpage(vmmap, data1); vmmap += PAGE_SIZE; } @@ -1179,7 +1182,8 @@ pmap_bootstrap(u_long kernelstart, u_long kernelend) 1 /* Cacheable */, FORCE_ALIAS /* ALIAS -- Disable D$ */, 1 /* valid */, - 0 /* IE */); + 0 /* IE */, + 0 /* wc */); pmap_enter_kpage(vmmap, data1); vmmap += PAGE_SIZE; pa += PAGE_SIZE; @@ -1366,7 +1370,8 @@ pmap_init(void) 1 /* Cacheable */, FORCE_ALIAS /* ALIAS -- Disable D$ */, 1 /* valid */, - 0 /* IE */); + 0 /* IE */, + 0 /* wc */); pmap_enter_kpage(va, data); va += PAGE_SIZE; } @@ -1656,7 +1661,8 @@ pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) tte.data = TSB_DATA(0, PGSZ_8K, pa, 1 /* Privileged */, (VM_PROT_WRITE & prot), - !(pa & PMAP_NC), pa & (PMAP_NVC), 1, 0); + !(pa & PMAP_NC), pa & (PMAP_NVC), 1, + pa & (PMAP_LITTLE), pa & PMAP_WC); /* We don't track mod/ref here. */ if (prot & VM_PROT_WRITE) tte.data |= TLB_REAL_W|TLB_W; @@ -1879,7 +1885,7 @@ pmap_enter(struct pmap *pm, vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) } tte.data = TSB_DATA(0, size, pa, pm == pmap_kernel(), flags & VM_PROT_WRITE, !(pa & PMAP_NC), - uncached, 1, pa & PMAP_LITTLE); + uncached, 1, pa & PMAP_LITTLE, pa & PMAP_WC); #ifdef HWREF if (prot & VM_PROT_WRITE) tte.data |= TLB_REAL_W; @@ -3837,7 +3843,8 @@ pmap_setup_intstack_sun4v(paddr_t pa) 1 /* Cacheable */, FORCE_ALIAS /* ALIAS -- Disable D$ */, 1 /* valid */, - 0 /* IE */); + 0 /* IE */, + 0 /* wc */); hv_rc = hv_mmu_map_perm_addr(INTSTACK, data, MAP_DTLB); if ( hv_rc != H_EOK ) { panic("hv_mmu_map_perm_addr() failed - rc = %" PRId64 "\n",