Add support for the Seeq 80225 10/100 Ethernet PHY. This is just
a stripped-down version of the 80220/80223.
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@ -1,7 +1,7 @@
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/* $NetBSD: sqphy.c,v 1.22 2001/06/02 21:39:41 thorpej Exp $ */
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/* $NetBSD: sqphy.c,v 1.23 2001/06/19 20:10:54 thorpej Exp $ */
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/*-
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/*-
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* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
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* Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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* All rights reserved.
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*
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* This code is derived from software contributed to The NetBSD Foundation
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@ -67,7 +67,7 @@
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*/
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*/
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/*
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/*
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* driver for Seeq 80220/80221 and 80223 10/100 ethernet PHYs
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* driver for Seeq 80220/80221, 80223, and 80225 10/100 ethernet PHYs
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* datasheet from www.seeq.com
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* datasheet from www.seeq.com
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*/
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*/
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@ -107,6 +107,9 @@ const struct mii_phydesc sqphys[] = {
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{ MII_OUI_SEEQ, MII_MODEL_SEEQ_80220,
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{ MII_OUI_SEEQ, MII_MODEL_SEEQ_80220,
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MII_STR_SEEQ_80220 },
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MII_STR_SEEQ_80220 },
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{ MII_OUI_SEEQ, MII_MODEL_SEEQ_80225,
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MII_STR_SEEQ_80225 },
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{ 0, 0,
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{ 0, 0,
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NULL },
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NULL },
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};
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};
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@ -254,6 +257,11 @@ sqphy_status(sc)
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mii->mii_media_active |= IFM_NONE;
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mii->mii_media_active |= IFM_NONE;
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return;
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return;
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}
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}
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/*
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* Note: don't get fancy here -- the 80225 only
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* supports the SPD_DET and DPLX_DET bits in
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* the STATUS register.
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*/
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status = PHY_READ(sc, MII_SQPHY_STATUS);
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status = PHY_READ(sc, MII_SQPHY_STATUS);
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if (status & STATUS_SPD_DET)
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if (status & STATUS_SPD_DET)
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mii->mii_media_active |= IFM_100_TX;
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mii->mii_media_active |= IFM_100_TX;
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@ -1,4 +1,4 @@
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/* $NetBSD: sqphyreg.h,v 1.1 1998/11/03 23:51:29 thorpej Exp $ */
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/* $NetBSD: sqphyreg.h,v 1.2 2001/06/19 20:10:55 thorpej Exp $ */
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/*-
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -41,7 +41,10 @@
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#define _DEV_MII_SQPHYREG_H_
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#define _DEV_MII_SQPHYREG_H_
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/*
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/*
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* Seeq 80220 registers.
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* Seeq 80220 registers. This also covers the Seeq 80225, which is
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* a stripped-down-for-lower-power-consumption version of the 80223.
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* It only has a STATUS register, and only the SPD_DET and DPLX_DET
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* bits are valid.
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*/
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*/
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#define MII_SQPHY_CONFIG1 0x10 /* Configuration 1 Register */
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#define MII_SQPHY_CONFIG1 0x10 /* Configuration 1 Register */
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