Clean up initializers for pmax ioasic children. Use same struct as alpha.
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@ -1,4 +1,4 @@
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/* $NetBSD: asic.c,v 1.31 1999/03/12 08:15:27 nisimura Exp $ */
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/* $NetBSD: asic.c,v 1.32 1999/03/14 23:59:53 jonathan Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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@ -63,42 +63,51 @@
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#include "opt_dec_3maxplus.h"
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#include "opt_dec_maxine.h"
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/* We support only one ioctl asic chip, and this is its address. */
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tc_addr_t ioasic_base = 0;
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/* tables of child devices on an ioasic bus. */
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struct ioasic_dev {
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char *iad_modname;
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tc_offset_t iad_offset;
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void *iad_cookie;
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u_int32_t iad_intrbits;
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};
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#define C(x) ((void*)(x))
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#define ASIC_NDEVS(x) (sizeof(x)/sizeof(x[0]))
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#define ARRAY_SIZEOF(x) (sizeof((x)) / sizeof ((x)[0]))
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#if defined(DEC_3MAXPLUS) || defined(DEC_3MIN)
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struct ioasicdev_attach_args kn03_ioasic_devs[] = {
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/* 0 */ { "lance", 0x0C0000, 0, C(KN03_LANCE_SLOT) },
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/* 1 */ { "scc", 0x100000, 0, C(KN03_SCC0_SLOT) },
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/* 2 */ { "scc", 0x180000, 0, C(KN03_SCC1_SLOT) },
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/* 3 */ { "mc146818", 0x200000, 0, C(0), },
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/* 4 */ { "asc", 0x300000, 0, C(KN03_SCSI_SLOT) },
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struct ioasic_dev kn03_ioasic_devs[] = {
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{ "lance", 0x0C0000, C(KN03_LANCE_SLOT), IOASIC_INTR_LANCE },
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{ "scc", 0x100000, C(KN03_SCC0_SLOT), IOASIC_INTR_SCC_0 },
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{ "scc", 0x180000, C(KN03_SCC1_SLOT), IOASIC_INTR_SCC_1 },
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{ "mc146818", 0x200000, C(0), 0 },
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{ "asc", 0x300000, C(KN03_SCSI_SLOT), IOASIC_INTR_SCSI },
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};
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const int nkn03_ioasic_devs = ARRAY_SIZEOF(kn03_ioasic_devs);
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const int kn03_ioasic_ndevs = ARRAY_SIZEOF(kn03_ioasic_devs);
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#endif /* DEC_3MAXPLUS || DEC_3MIN */
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#if defined(DEC_MAXINE)
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struct ioasicdev_attach_args xine_ioasic_devs[] = {
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/* 0 */ { "lance", 0x0C0000, 0, C(XINE_LANCE_SLOT), },
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/* 1 */ { "scc", 0x100000, 0, C(XINE_SCC0_SLOT), },
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/* 2 */ { "mc146818", 0x200000, 0, C(0), },
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/* 3 */ { "isdn", 0x240000, 0, C(XINE_ISDN_SLOT), },
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/* 4 */ { "dtop", 0x280000, 0, C(XINE_DTOP_SLOT), },
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/* 5 */ { "fdc", 0x2C0000, 0, C(XINE_FLOPPY_SLOT), },
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/* 6 */ { "asc", 0x300000, 0, C(XINE_SCSI_SLOT), },
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struct ioasic_dev xine_ioasic_devs[] = {
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{ "lance", 0x0C0000, C(XINE_LANCE_SLOT), IOASIC_INTR_LANCE },
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{ "scc", 0x100000, C(XINE_SCC0_SLOT), IOASIC_INTR_SCC_0 },
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{ "mc146818", 0x200000, C(0), 0 },
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{ "isdn", 0x240000, C(XINE_ISDN_SLOT), XINE_INTR_ISDN },
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{ "dtop", 0x280000, C(XINE_DTOP_SLOT), XINE_INTR_DTOP },
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{ "fdc", 0x2C0000, C(XINE_FLOPPY_SLOT), 0 },
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{ "asc", 0x300000, C(XINE_SCSI_SLOT), IOASIC_INTR_SCSI },
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};
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const int nxine_ioasic_devs = ARRAY_SIZEOF(xine_ioasic_devs);
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const int xine_ioasic_ndevs = ARRAY_SIZEOF(xine_ioasic_devs);
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#endif /* DEC_MAXINE */
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#if defined(DEC_3MAX)
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struct ioasicdev_attach_args kn02_ioasic_devs[] = {
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/* 0 */ { "dc", 0x200000, 0, C(7), },
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/* 0 */ { "mc146818", 0x280000, 0, C(0), },
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struct ioasic_dev kn02_ioasic_devs[] = {
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{ "dc", 0x200000, C(7), 0 },
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{ "mc146818", 0x280000, C(0), 0 },
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};
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const int nkn02_ioasic_devs = ARRAY_SIZEOF(kn02_ioasic_devs);
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const int kn02_ioasic_ndevs = ARRAY_SIZEOF(kn02_ioasic_devs);
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#endif /* DEC_3MAX */
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#endif /* pmax */
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@ -120,35 +129,11 @@ struct cfattach ioasic_ca = {
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sizeof(struct asic_softc), ioasicmatch, ioasicattach
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};
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void asic_intr_establish __P((struct confargs *, intr_handler_t,
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intr_arg_t));
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void asic_intr_disestablish __P((struct confargs *));
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int asic_intrnull __P((intr_arg_t));
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struct asic_slot {
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struct confargs as_ca;
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intr_handler_t as_handler;
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void *iada_cookie;
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u_int iada_intrbits;
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};
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#ifdef pmax
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/*#define IOASIC_DEBUG*/
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struct ioasicdev_attach_args *asic_slots;
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extern tc_addr_t ioasic_base;
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tc_addr_t ioasic_base = 0;
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struct ioasic_dev *ioasic_devs;
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#endif /*pmax*/
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#ifdef IOASIC_DEBUG
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#define IOASIC_DPRINTF(x) printf x
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#else
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#define IOASIC_DPRINTF(x) do { if (0) printf x ; } while (0)
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#endif
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int
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ioasicmatch(parent, cf, aux)
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struct device *parent;
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@ -157,16 +142,12 @@ ioasicmatch(parent, cf, aux)
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{
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struct tc_attach_args *ta = aux;
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IOASIC_DPRINTF(("asicmatch: %s slot %d offset 0x%x pri %d\n",
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ta->ta_modname, ta->ta_slot, ta->ta_offset, (int)ta->ta_cookie));
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/* An IOCTL asic can only occur on the turbochannel, anyway. */
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#ifdef notyet
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if (parent != &tccd)
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return (0);
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#endif
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/*
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* XXX This is wrong.
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* XXX this file will be re-implemented, anyway.
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@ -206,22 +187,22 @@ ioasicattach(parent, self, aux)
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case DS_3MIN:
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case DS_3MAXPLUS:
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/* 3min ioasic addressees are the same as 3maxplus. */
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asic_slots = kn03_ioasic_devs;
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nslots = nkn03_ioasic_devs;
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ioasic_devs = kn03_ioasic_devs;
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nslots = kn03_ioasic_ndevs;
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break;
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#endif
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#ifdef DEC_MAXINE
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case DS_MAXINE:
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asic_slots = xine_ioasic_devs;
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nslots = nxine_ioasic_devs;
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ioasic_devs = xine_ioasic_devs;
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nslots = xine_ioasic_ndevs;
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break;
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#endif
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#ifdef DEC_3MAX
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case DS_3MAX:
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asic_slots = kn02_ioasic_devs;
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nslots = nkn02_ioasic_devs;
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ioasic_devs = kn02_ioasic_devs;
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nslots = kn02_ioasic_ndevs;
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break;
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#endif
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@ -229,8 +210,6 @@ ioasicattach(parent, self, aux)
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panic("ioasicattach: shouldn't be here, really...");
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}
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IOASIC_DPRINTF(("asicattach: %s\n", sc->sc_dv.dv_xname));
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sc->sc_base = ta->ta_addr;
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ioasic_base = sc->sc_base; /* XXX XXX XXX */
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@ -254,29 +233,21 @@ ioasicattach(parent, self, aux)
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#endif /* Alpha AXP: select ASIC speed */
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/* The MAXINE has seven pseudo-slots in its system slot */
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#define ASIC_MAX_NSLOTS 7 /*XXX*/
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/* Try to configure each CPU-internal device */
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/*
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* Try to configure each ioctl asic baseboard device.
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*/
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for (i = 0; i < nslots; i++) {
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IOASIC_DPRINTF(("asicattach: entry %d, base addr %x\n",
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i, sc->sc_base));
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/* Compute address at runtime. Leave table readonly. */
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idev = asic_slots[i];
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idev.iada_addr =((u_long)sc->sc_base) + idev.iada_offset;
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if (idev.iada_modname == NULL || idev.iada_modname[0] == 0)
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break;
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IOASIC_DPRINTF((" adding %s offset %x addr %x\n",
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idev.iada_modname, idev.iada_offset, idev.iada_addr));
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strncpy(idev.iada_modname, ioasic_devs[i].iad_modname,
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TC_ROM_LLEN);
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idev.iada_modname[TC_ROM_LLEN] = '\0';
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idev.iada_offset = ioasic_devs[i].iad_offset;
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idev.iada_addr = sc->sc_base + ioasic_devs[i].iad_offset;
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idev.iada_cookie = ioasic_devs[i].iad_cookie;
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/* XXX bus-space handle */
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/* Tell the autoconfig machinery we've found the hardware. */
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config_found(self, &idev, ioasicprint);
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}
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IOASIC_DPRINTF(("asicattach: done\n"));
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}
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int
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(*tc_enable_interrupt)((int)cookie, handler, val, 1);
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}
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int
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asic_intrnull(val)
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intr_arg_t val;
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{
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panic("uncaught IOCTL ASIC intr for slot %ld\n", (long)val);
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}
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/* XXX */
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char *
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