Aren
/
NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Add wait-for-ready code between setting MCE and changing data format, 

which is required by OPL3-SA2 (YMF711) chip.
Fixes PR kern/14819.
This commit is contained in:
itohy 2002-03-23 23:40:32 +00:00
parent a378ffa3a9
commit 78b5427b7e
1 changed files with 10 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
sys/dev/ic/ad1848.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: ad1848.c,v 1.13 2002/03/06 07:12:02 itohy Exp $ */
/* $NetBSD: ad1848.c,v 1.14 2002/03/23 23:40:32 itohy Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
@ -102,7 +102,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ad1848.c,v 1.13 2002/03/06 07:12:02 itohy Exp $");
__KERNEL_RCSID(0, "$NetBSD: ad1848.c,v 1.14 2002/03/23 23:40:32 itohy Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -1140,6 +1140,14 @@ ad1848_commit_settings(addr)
if (sc->channels == 2)
fs |= FMT_STEREO;
/*
* OPL3-SA2 (YMF711) is sometimes busy here.
* Wait until it becomes ready.
*/
for (timeout = 0;
timeout < 1000 && ADREAD(sc, AD1848_IADDR) & SP_IN_INIT; timeout++)
delay(10);
ad_write(sc, SP_CLOCK_DATA_FORMAT, fs);
/*