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Add a comment indicating that the current method of enabling high vectors

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requires that the CPU control vector be properly readable.  I believe that
all CPUs that have high vector support have a readable CPU control register,
but if we ever encounter one that does not, then we'll have to adjust this
code.
This commit is contained in:
thorpej 2003-04-18 22:30:05 +00:00
parent 11cc5eb2c6
commit 78b1b81e74
1 changed files with 8 additions and 1 deletions
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9
sys/arch/arm/arm32/arm32_machdep.c
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@ -1,4 +1,4 @@
/* $NetBSD: arm32_machdep.c,v 1.31 2003/04/18 11:08:24 scw Exp $ */
/* $NetBSD: arm32_machdep.c,v 1.32 2003/04/18 22:30:05 thorpej Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@ -151,6 +151,13 @@ arm32_vector_init(vaddr_t va, int which)
* cpu_setup()) because the vector page needs to be
* accessible *before* cpu_startup() is called.
* Think ddb(9) ...
*
* NOTE: If the CPU control register is not readable,
* this will totally fail! We'll just assume that
* any system that has high vector support has a
* readable CPU control register, for now. If we
* ever encounter one that does not, we'll have to
* rethink this.
*/
cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
}