Move ms-IIep PCIC driver into mspcic0 at msiiep0. msiiep0 now serves
as a stub bus that knows how to attach drivers for various functions of PCIC. This change is a follow up to timer0 at msiiep0 change, since all children must share same attach arguments and so we no longer can attach pci0 directly under msiiep0.
This commit is contained in:
uwe
parent
2e2ba05d0d
commit
788d7bdd8f
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@ -1,4 +1,4 @@
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# $NetBSD: KRUPS,v 1.4 2002/03/28 11:55:25 pk Exp $
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# $NetBSD: KRUPS,v 1.5 2002/03/28 19:50:20 uwe Exp $
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# From: NetBSD: GENERIC,v 1.131 2002/02/10 17:37:02 wiz Exp
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#
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# Krups (JavaStation 10, aka JavaStation NC) machine description file
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@ -8,7 +8,7 @@
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include "arch/sparc/conf/std.sparc"
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#ident "KRUPS-$Revision: 1.4 $"
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#ident "KRUPS-$Revision: 1.5 $"
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maxusers 32
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@ -97,7 +97,7 @@ options DDB_ONPANIC=1 # see also sysctl(8): `ddb.onpanic'
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## such that gdb(1) can be used on a kernel coredump.
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#makeoptions DEBUG="-g"
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makeoptions COPTS="-pipe -mv8 -O2"
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makeoptions COPTS="-pipe -mcpu=supersparc -O2"
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## Adds code to the kernel that does internal consistency checks, and will
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@ -199,7 +199,8 @@ cpu0 at mainbus0
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msiiep0 at mainbus0 # microSPARC-IIep PCIC, timer, ...
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pci0 at msiiep0
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mspcic0 at msiiep0 # PCI tree
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pci0 at mspcic0
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options PCIVERBOSE
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#options PCI_CONFIG_DUMP # hangs reading IGA1682 config past offset 64
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@ -1,4 +1,4 @@
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# $NetBSD: files.sparc,v 1.109 2002/03/28 11:54:16 pk Exp $
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# $NetBSD: files.sparc,v 1.110 2002/03/28 19:50:20 uwe Exp $
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# @(#)files.sparc 8.1 (Berkeley) 7/19/93
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# sparc-specific configuration info
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@ -18,12 +18,15 @@ maxusers 2 8 1024
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device mainbus {}
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attach mainbus at root
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device msiiep {}
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attach msiiep at mainbus
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include "dev/i2o/files.i2o"
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include "dev/pci/files.pci"
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device msiiep {}: pcibus
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attach msiiep at mainbus
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file arch/sparc/sparc/msiiep.c msiiep
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file arch/sparc/sparc/pci_machdep.c msiiep
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device mspcic {}: pcibus
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attach mspcic at msiiep
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file arch/sparc/sparc/msiiep.c msiiep | mspcic
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file arch/sparc/sparc/pci_machdep.c msiiep | mspcic
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device ebus {[addr = -1]}: pcibus
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attach ebus at pci
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@ -1,4 +1,4 @@
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/* $NetBSD: autoconf.c,v 1.166 2002/03/28 16:03:41 pk Exp $ */
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/* $NetBSD: autoconf.c,v 1.167 2002/03/28 19:50:21 uwe Exp $ */
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/*
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* Copyright (c) 1996
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@ -1631,7 +1631,7 @@ static struct {
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{ "xdc", BUSCLASS_XDC },
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{ "xyc", BUSCLASS_XYC },
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{ "fdc", BUSCLASS_FDC },
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{ "msiiep", BUSCLASS_PCIC },
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{ "mspcic", BUSCLASS_PCIC },
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{ "pci", BUSCLASS_PCI },
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};
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@ -1,4 +1,4 @@
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/* $NetBSD: msiiep.c,v 1.5 2002/03/28 11:59:56 pk Exp $ */
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/* $NetBSD: msiiep.c,v 1.6 2002/03/28 19:50:21 uwe Exp $ */
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/*
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* Copyright (c) 2001 Valeriy E. Ushakov
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@ -51,7 +51,7 @@
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/**
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* ms-IIep PCIC registers are mapped at fixed VA
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*/
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#define msiiep ((volatile struct msiiep_pcic_reg *)MSIIEP_PCIC_VA)
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#define mspcic ((volatile struct msiiep_pcic_reg *)MSIIEP_PCIC_VA)
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/**
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@ -62,17 +62,17 @@
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/*
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* PCI chipset tag
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*/
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static struct sparc_pci_chipset msiiep_pc_tag = { NULL };
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static struct sparc_pci_chipset mspcic_pc_tag = { NULL };
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/*
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* Bus space tags for memory and i/o.
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*/
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static void *msiiep_intr_establish(bus_space_tag_t, int, int, int,
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static void *mspcic_intr_establish(bus_space_tag_t, int, int, int,
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int (*)(void *), void *);
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static struct sparc_bus_space_tag msiiep_io_tag = {
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static struct sparc_bus_space_tag mspcic_io_tag = {
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NULL, /* cookie */
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NULL, /* parent bus tag */
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NULL, /* bus_space_map */
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@ -80,10 +80,10 @@ static struct sparc_bus_space_tag msiiep_io_tag = {
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NULL, /* bus_space_subregion */
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NULL, /* bus_space_barrier */
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NULL, /* bus_space_mmap */
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msiiep_intr_establish /* bus_intr_establish */
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mspcic_intr_establish /* bus_intr_establish */
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};
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static struct sparc_bus_space_tag msiiep_mem_tag = {
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static struct sparc_bus_space_tag mspcic_mem_tag = {
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NULL, /* cookie */
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NULL, /* parent bus tag */
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NULL, /* bus_space_map */
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@ -91,53 +91,75 @@ static struct sparc_bus_space_tag msiiep_mem_tag = {
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NULL, /* bus_space_subregion */
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NULL, /* bus_space_barrier */
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NULL, /* bus_space_mmap */
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msiiep_intr_establish /* bus_intr_establish */
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mspcic_intr_establish /* bus_intr_establish */
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};
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/*
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* DMA tag
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*/
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static int msiiep_dmamap_load(bus_dma_tag_t, bus_dmamap_t,
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static int mspcic_dmamap_load(bus_dma_tag_t, bus_dmamap_t,
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void *, bus_size_t, struct proc *, int);
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static void msiiep_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
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static int msiiep_dmamem_map(bus_dma_tag_t, bus_dma_segment_t *,
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static void mspcic_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
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static int mspcic_dmamem_map(bus_dma_tag_t, bus_dma_segment_t *,
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int, size_t, caddr_t *, int);
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static struct sparc_bus_dma_tag msiiep_dma_tag = {
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static struct sparc_bus_dma_tag mspcic_dma_tag = {
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NULL, /* _cookie */
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_bus_dmamap_create,
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_bus_dmamap_destroy,
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msiiep_dmamap_load,
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mspcic_dmamap_load,
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_bus_dmamap_load_mbuf,
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_bus_dmamap_load_uio,
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_bus_dmamap_load_raw,
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msiiep_dmamap_unload,
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mspcic_dmamap_unload,
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_bus_dmamap_sync,
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_bus_dmamem_alloc,
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_bus_dmamem_free,
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msiiep_dmamem_map,
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mspcic_dmamem_map,
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_bus_dmamem_unmap,
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_bus_dmamem_mmap
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};
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/*
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* Autoconfiguration
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* Autoconfiguration.
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*
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* Normally, sparc autoconfiguration is driven by PROM device tree,
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* however PROMs in ms-IIep machines usually don't have nodes for
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* various important registers that are part of ms-IIep PCI controller.
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* We work around by inserting a dummy device that acts as a parent
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* for device drivers that deal with various functions of PCIC. The
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* other option is to hack mainbus_attach() to treat ms-IIep specially,
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* but I'd rather insulate the rest of the source from ms-IIep quirks.
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*/
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/* parent "stub" device that knows how to attach various functions */
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static int msiiep_match(struct device *, struct cfdata *, void *);
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static void msiiep_attach(struct device *, struct device *, void *);
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static int msiiep_print(void *, const char *);
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/* static int msiiep_print(void *, const char *); */
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struct cfattach msiiep_ca = {
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sizeof(struct msiiep_softc), msiiep_match, msiiep_attach
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sizeof(struct device), msiiep_match, msiiep_attach
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};
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/* Auxiliary functions */
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static void msiiep_getidprom(void);
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/*
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* The real thing.
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*/
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static int mspcic_match(struct device *, struct cfdata *, void *);
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static void mspcic_attach(struct device *, struct device *, void *);
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static int mspcic_print(void *, const char *);
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struct cfattach mspcic_ca = {
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sizeof(struct mspcic_softc), mspcic_match, mspcic_attach
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};
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static struct idprom msiiep_idprom_store;
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static void msiiep_getidprom(void);
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@ -160,7 +182,7 @@ msiiep_match(parent, cf, aux)
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* bootstrap code maps them at a fixed va, MSIIEP_PCIC_VA, and
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* switches the endian-swapping mode on.
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*/
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id = msiiep->pcic_id;
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id = mspcic->pcic_id;
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if (PCI_VENDOR(id) != PCI_VENDOR_SUN
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&& PCI_PRODUCT(id) != PCI_PRODUCT_SUN_MS_IIep)
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panic("msiiep_match: id %08x", id);
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@ -168,16 +190,110 @@ msiiep_match(parent, cf, aux)
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return (1);
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}
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static void
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msiiep_attach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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extern void timerattach_msiiep(void); /* clock.c */
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struct msiiep_softc *sc = (struct msiiep_softc *)self;
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struct mainbus_attach_args *ma = aux;
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struct msiiep_attach_args msa;
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/*
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* Ok, we know that we are on ms-IIep and the easy way to get
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* idprom is to read it from root property (try this at prom:
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* "see idprom@ seeprom see ee-read" if you don't believe me ;-).
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*/
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msiiep_getidprom();
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/* pass on real mainbus_attach_args */
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msa.msa_ma = ma;
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/* config timer/counter part of PCIC */
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msa.msa_name = "timer";
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config_found(self, &msa, NULL);
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/* config PCI tree */
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msa.msa_name = "pcic";
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config_found(self, &msa, NULL);
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}
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/*
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* idprom is in /pci/ebus/gpio but it's a pain to access.
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* fortunately the PROM sets "idprom" property on the root node.
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* XXX: the idprom stuff badly needs to be factored out....
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*/
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static void
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msiiep_getidprom()
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{
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extern void establish_hostid(struct idprom *); /* clock.c */
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struct idprom *idp;
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int nitems;
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idp = &msiiep_idprom_store;
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nitems = 1;
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if (PROM_getprop(prom_findroot(), "idprom",
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sizeof(struct idprom), &nitems,
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(void **)&idp) != 0)
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panic("unable to get \"idprom\" property from root node");
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establish_hostid(idp);
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}
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/*
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* Turn PCIC endian swapping on/off. The kernel runs with endian
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* swapping turned on early in bootstrap(), but we need to turn it off
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* before we pass control to PROM's repl (e.g. in OF_enter and OF_exit).
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* PROM expects PCIC to be in little endian mode and would wedge if we
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* didn't turn endian swapping off.
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*/
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void
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msiiep_swap_endian(on)
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int on;
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{
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u_int8_t pioctl;
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pioctl = mspcic->pcic_pio_ctrl;
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if (on)
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pioctl |= MSIIEP_PIO_CTRL_BIG_ENDIAN;
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else
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pioctl &= ~MSIIEP_PIO_CTRL_BIG_ENDIAN;
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mspcic->pcic_pio_ctrl = pioctl;
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/* read it back to make sure transaction completed */
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pioctl = mspcic->pcic_pio_ctrl;
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}
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/* ======================================================================
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*
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* Real ms-IIep PCIC driver.
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*/
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static int
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mspcic_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct msiiep_attach_args *msa = aux;
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return (strcmp(msa->msa_name, "pcic") == 0);
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}
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static void
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mspcic_attach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct mspcic_softc *sc = (struct mspcic_softc *)self;
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struct msiiep_attach_args *msa = aux;
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struct mainbus_attach_args *ma = msa->msa_ma;
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int node = ma->ma_node;
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char devinfo[256];
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@ -196,41 +312,22 @@ msiiep_attach(parent, self, aux)
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*/
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sc->sc_bh = (bus_space_handle_t)MSIIEP_PCIC_VA;
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/*
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* Ok, we know that we are on ms-IIep and the easy way to get
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* idprom is to read it from root property (try this at prom:
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* "see idprom@ seeprom see ee-read" if you don't believe me ;-).
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*/
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msiiep_getidprom();
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/* print our PCI device info and bus clock frequency */
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pci_devinfo(msiiep->pcic_id, msiiep->pcic_class, 0, devinfo);
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printf("%s: %s: clock = %s MHz\n",
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self->dv_xname, devinfo, clockfreq(sc->sc_clockfreq));
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pci_devinfo(mspcic->pcic_id, mspcic->pcic_class, 0, devinfo);
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printf(": %s: clock = %s MHz\n", devinfo, clockfreq(sc->sc_clockfreq));
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/* timers are PCIC registers */
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printf("%s: configuring timer:", self->dv_xname);
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config_found(self, "timer", NULL);
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/* init cookies/parents in our statically allocated tags */
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mspcic_pc_tag.cookie = sc;
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mspcic_io_tag.cookie = sc;
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mspcic_io_tag.parent = sc->sc_bustag;
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mspcic_mem_tag.cookie = sc;
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mspcic_mem_tag.parent = sc->sc_bustag;
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mspcic_dma_tag._cookie = sc;
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/* chipset tag */
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msiiep_pc_tag.cookie = sc;
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/* I/O tag */
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msiiep_io_tag.cookie = sc;
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msiiep_io_tag.parent = sc->sc_bustag;
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/* memory tag */
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msiiep_mem_tag.cookie = sc;
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msiiep_mem_tag.parent = sc->sc_bustag;
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/* DMA tag */
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msiiep_dma_tag._cookie = sc;
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/* link them up to softc */
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sc->sc_pct = &msiiep_pc_tag;
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sc->sc_iot = &msiiep_io_tag;
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sc->sc_memt = &msiiep_mem_tag;
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sc->sc_dmat = &msiiep_dma_tag;
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/* save bus tags in softc */
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sc->sc_iot = &mspcic_io_tag;
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sc->sc_memt = &mspcic_mem_tag;
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sc->sc_dmat = &mspcic_dma_tag;
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/*
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* Attach the PCI bus.
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@ -240,15 +337,15 @@ msiiep_attach(parent, self, aux)
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pba.pba_iot = sc->sc_iot;
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pba.pba_memt = sc->sc_memt;
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pba.pba_dmat = sc->sc_dmat;
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pba.pba_pc = sc->sc_pct;
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pba.pba_pc = &mspcic_pc_tag;
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pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
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config_found(self, &pba, msiiep_print);
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config_found(self, &pba, mspcic_print);
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}
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static int
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msiiep_print(args, busname)
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mspcic_print(args, busname)
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void *args;
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const char *busname;
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{
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@ -259,36 +356,11 @@ msiiep_print(args, busname)
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}
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/*
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* Turn PCIC endian swapping on/off. The kernel runs with endian
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* swapping turned on early in bootstrap(), but we need to turn it off
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* before we pass control to PROM's repl (e.g. in OF_enter and OF_exit).
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* PROM expects PCIC to be in little endian mode and would wedge if we
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* didn't turn endian swapping off.
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*/
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void
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msiiep_swap_endian(on)
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int on;
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{
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u_int8_t pioctl;
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pioctl = msiiep->pcic_pio_ctrl;
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if (on)
|
||||
pioctl |= MSIIEP_PIO_CTRL_BIG_ENDIAN;
|
||||
else
|
||||
pioctl &= ~MSIIEP_PIO_CTRL_BIG_ENDIAN;
|
||||
msiiep->pcic_pio_ctrl = pioctl;
|
||||
|
||||
/* read it back to make sure transaction completed */
|
||||
pioctl = msiiep->pcic_pio_ctrl;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Get the PIL currently assigned for this interrupt input line.
|
||||
*/
|
||||
int
|
||||
msiiep_assigned_interrupt(line)
|
||||
mspcic_assigned_interrupt(line)
|
||||
int line;
|
||||
{
|
||||
unsigned int intrmap;
|
||||
|
|
@ -297,38 +369,14 @@ msiiep_assigned_interrupt(line)
|
|||
return (-1);
|
||||
|
||||
if (line < 4) {
|
||||
intrmap = msiiep->pcic_intr_asgn_sel;
|
||||
intrmap = mspcic->pcic_intr_asgn_sel;
|
||||
} else {
|
||||
intrmap = msiiep->pcic_intr_asgn_sel_hi;
|
||||
intrmap = mspcic->pcic_intr_asgn_sel_hi;
|
||||
line -= 4;
|
||||
}
|
||||
return ((intrmap >> (line * 4)) & 0xf);
|
||||
}
|
||||
|
||||
/*
|
||||
* idprom is in /pci/ebus/gpio but it's a pain to access.
|
||||
* fortunately the PROM sets "idprom" property on the root node.
|
||||
* XXX: the idprom stuff badly needs to be factored out....
|
||||
*/
|
||||
struct idprom msiiep_idprom_store;
|
||||
|
||||
static void
|
||||
msiiep_getidprom()
|
||||
{
|
||||
extern void establish_hostid(struct idprom *); /* clock.c */
|
||||
struct idprom *idp;
|
||||
int nitems;
|
||||
|
||||
idp = &msiiep_idprom_store;
|
||||
nitems = 1;
|
||||
if (PROM_getprop(prom_findroot(), "idprom",
|
||||
sizeof(struct idprom), &nitems,
|
||||
(void **)&idp) != 0)
|
||||
panic("unable to get \"idprom\" property from root node");
|
||||
establish_hostid(idp);
|
||||
}
|
||||
|
||||
|
||||
/* ======================================================================
|
||||
*
|
||||
* BUS space methods
|
||||
|
|
@ -342,7 +390,7 @@ msiiep_getidprom()
|
|||
* assignment select registers (but we use existing assignments).
|
||||
*/
|
||||
static void *
|
||||
msiiep_intr_establish(t, line, ipl, flags, handler, arg)
|
||||
mspcic_intr_establish(t, line, ipl, flags, handler, arg)
|
||||
bus_space_tag_t t;
|
||||
int line;
|
||||
int ipl;
|
||||
|
|
@ -359,9 +407,9 @@ msiiep_intr_establish(t, line, ipl, flags, handler, arg)
|
|||
return (NULL);
|
||||
|
||||
/* use pil set-up by prom */
|
||||
pil = msiiep_assigned_interrupt(line);
|
||||
pil = mspcic_assigned_interrupt(line);
|
||||
if (pil == -1)
|
||||
panic("msiiep_intr_establish: line %d", line);
|
||||
panic("mspcic_intr_establish: line %d", line);
|
||||
|
||||
ih->ih_fun = handler;
|
||||
ih->ih_arg = arg;
|
||||
|
|
@ -377,7 +425,7 @@ msiiep_intr_establish(t, line, ipl, flags, handler, arg)
|
|||
*/
|
||||
|
||||
static int
|
||||
msiiep_dmamap_load(t, map, buf, buflen, p, flags)
|
||||
mspcic_dmamap_load(t, map, buf, buflen, p, flags)
|
||||
bus_dma_tag_t t;
|
||||
bus_dmamap_t map;
|
||||
void *buf;
|
||||
|
|
@ -394,7 +442,7 @@ msiiep_dmamap_load(t, map, buf, buflen, p, flags)
|
|||
pmap = pmap_kernel();
|
||||
|
||||
if (!pmap_extract(pmap, (vaddr_t)buf, &pa))
|
||||
panic("msiiep_dmamap_load: dma memory not mapped");
|
||||
panic("mspcic_dmamap_load: dma memory not mapped");
|
||||
|
||||
/* we always use just one segment */
|
||||
map->dm_nsegs = 1;
|
||||
|
|
@ -406,17 +454,17 @@ msiiep_dmamap_load(t, map, buf, buflen, p, flags)
|
|||
}
|
||||
|
||||
static void
|
||||
msiiep_dmamap_unload(t, dmam)
|
||||
mspcic_dmamap_unload(t, dmam)
|
||||
bus_dma_tag_t t;
|
||||
bus_dmamap_t dmam;
|
||||
{
|
||||
|
||||
panic("msiiep_dmamap_unload: not implemented");
|
||||
panic("mspcic_dmamap_unload: not implemented");
|
||||
}
|
||||
|
||||
|
||||
static int
|
||||
msiiep_dmamem_map(tag, segs, nsegs, size, kvap, flags)
|
||||
mspcic_dmamem_map(tag, segs, nsegs, size, kvap, flags)
|
||||
bus_dma_tag_t tag;
|
||||
bus_dma_segment_t *segs;
|
||||
int nsegs;
|
||||
|
|
@ -430,7 +478,7 @@ msiiep_dmamem_map(tag, segs, nsegs, size, kvap, flags)
|
|||
int pagesz = PAGE_SIZE;
|
||||
|
||||
if (nsegs != 1)
|
||||
panic("msiiep_dmamem_map: nsegs = %d", nsegs);
|
||||
panic("mspcic_dmamem_map: nsegs = %d", nsegs);
|
||||
|
||||
size = round_page(size);
|
||||
|
||||
|
|
@ -450,7 +498,7 @@ msiiep_dmamem_map(tag, segs, nsegs, size, kvap, flags)
|
|||
paddr_t pa;
|
||||
|
||||
if (size == 0)
|
||||
panic("msiiep_dmamem_map: size botch");
|
||||
panic("mspcic_dmamem_map: size botch");
|
||||
|
||||
pa = VM_PAGE_TO_PHYS(m);
|
||||
pmap_kenter_pa(va, pa | PMAP_NC, VM_PROT_READ | VM_PROT_WRITE);
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: msiiepvar.h,v 1.2 2002/03/28 11:59:56 pk Exp $ */
|
||||
/* $NetBSD: msiiepvar.h,v 1.3 2002/03/28 19:50:21 uwe Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001 Valeriy E. Ushakov
|
||||
|
|
@ -30,7 +30,12 @@
|
|||
#ifndef _SPARC_MSIIEP_VAR_H_
|
||||
#define _SPARC_MSIIEP_VAR_H_
|
||||
|
||||
struct msiiep_softc {
|
||||
struct msiiep_attach_args {
|
||||
char *msa_name;
|
||||
struct mainbus_attach_args *msa_ma;
|
||||
};
|
||||
|
||||
struct mspcic_softc {
|
||||
struct device sc_dev;
|
||||
|
||||
/* parent (mainbus) tags */
|
||||
|
|
@ -47,13 +52,11 @@ struct msiiep_softc {
|
|||
int sc_clockfreq; /* in Hz */
|
||||
|
||||
/* our tags */
|
||||
pci_chipset_tag_t sc_pct;
|
||||
bus_space_tag_t sc_memt;
|
||||
bus_space_tag_t sc_iot;
|
||||
bus_dma_tag_t sc_dmat;
|
||||
};
|
||||
|
||||
|
||||
extern int msiiep_assigned_interrupt(int line);
|
||||
extern int mspcic_assigned_interrupt(int line);
|
||||
|
||||
#endif /* _SPARC_MSIIEP_VAR_H_ */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pci_machdep.c,v 1.3 2002/03/28 11:59:56 pk Exp $ */
|
||||
/* $NetBSD: pci_machdep.c,v 1.4 2002/03/28 19:50:21 uwe Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1999, 2000 Matthew R. Green
|
||||
|
|
@ -98,35 +98,35 @@ int sparc_pci_debug = 0;
|
|||
*/
|
||||
|
||||
|
||||
struct msiiep_pci_intr_wiring {
|
||||
struct mspcic_pci_intr_wiring {
|
||||
u_int mpiw_bus;
|
||||
u_int mpiw_device;
|
||||
u_int mpiw_function;
|
||||
pci_intr_line_t mpiw_line;
|
||||
};
|
||||
|
||||
static struct msiiep_pci_intr_wiring krups_pci_intr_wiring[] = {
|
||||
static struct mspcic_pci_intr_wiring krups_pci_intr_wiring[] = {
|
||||
{ 0, 0, 1, 1 }, /* ethernet */
|
||||
{ 0, 1, 0, 2 }, /* vga */
|
||||
};
|
||||
|
||||
|
||||
struct msiiep_known_model {
|
||||
struct mspcic_known_model {
|
||||
const char *model;
|
||||
struct msiiep_pci_intr_wiring *map;
|
||||
struct mspcic_pci_intr_wiring *map;
|
||||
int mapsize;
|
||||
};
|
||||
|
||||
#define MSIIEP_MODEL_WIRING(name,map) \
|
||||
#define MSPCIC_MODEL_WIRING(name,map) \
|
||||
{ name, map, sizeof(map)/sizeof(map[0]) }
|
||||
|
||||
static struct msiiep_known_model msiiep_known_models[] = {
|
||||
MSIIEP_MODEL_WIRING("SUNW,501-4267", krups_pci_intr_wiring),
|
||||
static struct mspcic_known_model mspcic_known_models[] = {
|
||||
MSPCIC_MODEL_WIRING("SUNW,501-4267", krups_pci_intr_wiring),
|
||||
{ NULL, NULL, 0}
|
||||
};
|
||||
|
||||
|
||||
static struct msiiep_pci_intr_wiring *wiring_map;
|
||||
static struct mspcic_pci_intr_wiring *wiring_map;
|
||||
static int wiring_map_size;
|
||||
|
||||
|
||||
|
|
@ -136,7 +136,7 @@ pci_attach_hook(parent, self, pba)
|
|||
struct device *self;
|
||||
struct pcibus_attach_args *pba;
|
||||
{
|
||||
struct msiiep_known_model *p;
|
||||
struct mspcic_known_model *p;
|
||||
char buf[32];
|
||||
char *model;
|
||||
|
||||
|
|
@ -147,7 +147,7 @@ pci_attach_hook(parent, self, pba)
|
|||
|
||||
printf(": model %s", model);
|
||||
|
||||
for (p = msiiep_known_models; p->model != NULL; ++p)
|
||||
for (p = mspcic_known_models; p->model != NULL; ++p)
|
||||
if (strcmp(model, p->model) == 0) {
|
||||
printf(": interrupt wiring known");
|
||||
wiring_map = p->map;
|
||||
|
|
@ -178,7 +178,7 @@ pci_make_tag(pc, b, d, f)
|
|||
int d;
|
||||
int f;
|
||||
{
|
||||
struct msiiep_softc *sc = (struct msiiep_softc *)pc->cookie;
|
||||
struct mspcic_softc *sc = (struct mspcic_softc *)pc->cookie;
|
||||
pcitag_t tag;
|
||||
int node, len;
|
||||
#ifdef SPARC_PCI_DEBUG
|
||||
|
|
@ -386,7 +386,7 @@ pci_intr_map(pa, ihp)
|
|||
pa->pa_bus, pa->pa_device, pa->pa_function));
|
||||
|
||||
for (i = 0; i < wiring_map_size; ++i) {
|
||||
struct msiiep_pci_intr_wiring *w = &wiring_map[i];
|
||||
struct mspcic_pci_intr_wiring *w = &wiring_map[i];
|
||||
|
||||
if (pa->pa_bus == w->mpiw_bus
|
||||
&& pa->pa_device == w->mpiw_device
|
||||
|
|
@ -411,7 +411,7 @@ pci_intr_string(pc, ih)
|
|||
static char str[16];
|
||||
int pil;
|
||||
|
||||
pil = msiiep_assigned_interrupt(ih);
|
||||
pil = mspcic_assigned_interrupt(ih);
|
||||
sprintf(str, "line %d (pil %d)", ih, pil);
|
||||
return (str);
|
||||
}
|
||||
|
|
@ -436,7 +436,7 @@ pci_intr_establish(pc, ih, level, func, arg)
|
|||
int (*func)(void *);
|
||||
void *arg;
|
||||
{
|
||||
struct msiiep_softc *sc = (struct msiiep_softc *)pc->cookie;
|
||||
struct mspcic_softc *sc = (struct mspcic_softc *)pc->cookie;
|
||||
void *cookie = NULL;
|
||||
|
||||
DPRINTF(SPDB_INTR,
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: timer.c,v 1.1 2002/03/28 11:54:17 pk Exp $ */
|
||||
/* $NetBSD: timer.c,v 1.2 2002/03/28 19:50:21 uwe Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1992, 1993
|
||||
|
|
@ -79,6 +79,7 @@
|
|||
|
||||
#if defined(MSIIEP)
|
||||
#include <sparc/sparc/msiiepreg.h>
|
||||
#include <sparc/sparc/msiiepvar.h>
|
||||
#endif
|
||||
|
||||
static struct intrhand level10;
|
||||
|
|
@ -209,9 +210,9 @@ timermatch_msiiep(parent, cf, aux)
|
|||
struct cfdata *cf;
|
||||
void *aux;
|
||||
{
|
||||
char *name = aux;
|
||||
struct msiiep_attach_args *msa = aux;
|
||||
|
||||
return (strcmp("timer", name) == 0);
|
||||
return (strcmp(msa->msa_name, "timer") == 0);
|
||||
}
|
||||
|
||||
/* ARGSUSED */
|
||||
|
|
@ -552,7 +553,8 @@ clockintr_msiiep(cap)
|
|||
}
|
||||
#endif /* MSIIEP */
|
||||
|
||||
static __inline u_long new_interval(void)
|
||||
static __inline__ u_long
|
||||
new_interval(void)
|
||||
{
|
||||
u_long newint, r, var;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue