Various:
* Snap the sample rate when setting it, and remember only the time constant. * Set the time constant when changing between play/record. * Always return the actual sample rate with AUDIO_GETINFO.
This commit is contained in:
mycroft
parent
19f59bf3c2
commit
7847c9efee
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@ -1,4 +1,4 @@
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/* $NetBSD: sbdsp.c,v 1.15 1996/02/16 08:07:40 mycroft Exp $ */
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/* $NetBSD: sbdsp.c,v 1.16 1996/02/16 10:10:21 mycroft Exp $ */
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/*
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* Copyright (c) 1991-1993 Regents of the University of California.
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@ -81,20 +81,54 @@ struct {
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int wmidi;
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} sberr;
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/*
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* Time constant routines follow. See SBK, section 12.
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* Although they don't come out and say it (in the docs),
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* the card clearly uses a 1MHz countdown timer, as the
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* low-speed formula (p. 12-4) is:
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* tc = 256 - 10^6 / sr
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* In high-speed mode, the constant is the upper byte of a 16-bit counter,
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* and a 256MHz clock is used:
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* tc = 65536 - 256 * 10^ 6 / sr
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* Since we can only use the upper byte of the HS TC, the two formulae
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* are equivalent. (Why didn't they say so?) E.g.,
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* (65536 - 256 * 10 ^ 6 / x) >> 8 = 256 - 10^6 / x
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*
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* The crossover point (from low- to high-speed modes) is different
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* for the SBPRO and SB20. The table on p. 12-5 gives the following data:
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*
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* SBPRO SB20
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* ----- --------
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* input ls min 4 KHz 4 KHz
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* input ls max 23 KHz 13 KHz
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* input hs max 44.1 KHz 15 KHz
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* output ls min 4 KHz 4 KHz
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* output ls max 23 KHz 23 KHz
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* output hs max 44.1 KHz 44.1 KHz
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*/
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#define SB_LS_MIN 0x06 /* 4000 Hz */
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#define SB_8K 0x83 /* 8000 Hz */
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#define SBPRO_ADC_LS_MAX 0xd4 /* 22727 Hz */
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#define SBPRO_ADC_HS_MAX 0xea /* 45454 Hz */
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#define SBCLA_ADC_LS_MAX 0xb3 /* 12987 Hz */
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#define SBCLA_ADC_HS_MAX 0xbd /* 14925 Hz */
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#define SB_DAC_LS_MAX 0xd4 /* 22727 Hz */
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#define SB_DAC_HS_MAX 0xea /* 45454 Hz */
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#ifdef AUDIO_DEBUG
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void
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sb_printsc(struct sbdsp_softc *sc)
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{
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int i;
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printf("open %d dmachan %d iobase %x\n", sc->sc_open, sc->sc_drq,
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sc->sc_iobase);
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printf("hispeed %d irate %d orate %d encoding %x\n",
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sc->sc_adacmode, sc->sc_irate, sc->sc_orate, sc->encoding);
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printf("open %d dmachan %d iobase %x\n",
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sc->sc_open, sc->sc_drq, sc->sc_iobase);
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printf("itc %d imode %d otc %d omode %d encoding %x\n",
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sc->sc_itc, sc->sc_imode, sc->sc_otc, sc->sc_omode, sc->encoding);
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printf("outport %d inport %d spkron %d nintr %d\n",
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sc->out_port, sc->in_port, sc->spkr_state, sc->sc_interrupts);
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printf("tc %x chans %x scintr %x arg %x\n", sc->sc_adactc, sc->sc_chans,
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sc->sc_intr, sc->sc_arg);
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printf("chans %x intr %x arg %x\n",
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sc->sc_chans, sc->sc_intr, sc->sc_arg);
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printf("gain: ");
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for (i = 0; i < SB_NDEVS; i++)
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printf("%d ", sc->gain[i]);
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@ -136,15 +170,12 @@ sbdsp_attach(sc)
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/* Set defaults */
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if (ISSBPROCLASS(sc))
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sc->sc_irate = sc->sc_orate = 45454;
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sc->sc_itc = sc->sc_otc = SBPRO_ADC_HS_MAX;
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else
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sc->sc_irate = sc->sc_orate = 14925;
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sc->sc_itc = sc->sc_otc = SBCLA_ADC_HS_MAX;
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sc->sc_chans = 1;
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sc->encoding = AUDIO_ENCODING_LINEAR;
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(void) sbdsp_set_in_sr_real(sc, sc->sc_irate);
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(void) sbdsp_set_out_sr_real(sc, sc->sc_orate);
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(void) sbdsp_set_in_port(sc, SB_MIC_PORT);
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(void) sbdsp_set_out_port(sc, SB_SPEAKER);
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@ -166,6 +197,7 @@ sbdsp_attach(sc)
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for (i = 0; i < SB_NDEVS; i++)
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sc->gain[i] = sbdsp_stereo_vol(SBP_MAXVOL, SBP_MAXVOL);
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}
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printf(": dsp v%d.%02d\n",
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SBVER_MAJOR(sc->sc_model), SBVER_MINOR(sc->sc_model));
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}
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@ -205,25 +237,7 @@ sbdsp_set_in_sr(addr, sr)
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{
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register struct sbdsp_softc *sc = addr;
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sc->sc_irate = sr;
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return 0;
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}
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int
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sbdsp_set_in_sr_real(addr, sr)
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void *addr;
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u_long sr;
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{
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register struct sbdsp_softc *sc = addr;
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int rval;
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if (rval = sbdsp_set_sr(sc, &sr, SB_INPUT_RATE))
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return rval;
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sc->sc_irate = sr;
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if (sc->sc_dmadir == SBP_DMA_IN)
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sc->sc_dmadir = SBP_DMA_NONE; /* do it again on next DMA in */
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return 0;
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return (sbdsp_srtotc(sc, sr, SB_INPUT_RATE, &sc->sc_itc, &sc->sc_imode));
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}
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u_long
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@ -232,7 +246,7 @@ sbdsp_get_in_sr(addr)
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{
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register struct sbdsp_softc *sc = addr;
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return(sc->sc_irate);
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return (sbdsp_tctosr(sc, sc->sc_itc));
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}
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int
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@ -242,24 +256,7 @@ sbdsp_set_out_sr(addr, sr)
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{
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register struct sbdsp_softc *sc = addr;
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sc->sc_orate = sr;
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return(0);
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}
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int
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sbdsp_set_out_sr_real(addr, sr)
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void *addr;
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u_long sr;
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{
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register struct sbdsp_softc *sc = addr;
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int rval;
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if (rval = sbdsp_set_sr(sc, &sr, SB_OUTPUT_RATE))
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return rval;
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sc->sc_orate = sr;
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if (sc->sc_dmadir == SBP_DMA_OUT)
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sc->sc_dmadir = SBP_DMA_NONE; /* do it again on next DMA out */
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return 0;
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return (sbdsp_srtotc(sc, sr, SB_OUTPUT_RATE, &sc->sc_otc, &sc->sc_omode));
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}
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u_long
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@ -268,7 +265,7 @@ sbdsp_get_out_sr(addr)
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{
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register struct sbdsp_softc *sc = addr;
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return(sc->sc_orate);
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return (sbdsp_tctosr(sc, sc->sc_otc));
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}
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int
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@ -289,7 +286,6 @@ sbdsp_query_encoding(addr, fp)
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break;
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default:
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return (EINVAL);
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/*NOTREACHED*/
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}
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return (0);
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}
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@ -347,26 +343,27 @@ sbdsp_set_channels(addr, chans)
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int chans;
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{
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register struct sbdsp_softc *sc = addr;
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int rval;
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if (ISSBPROCLASS(sc)) {
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if (chans != 1 && chans != 2)
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return (EINVAL);
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sc->sc_chans = chans;
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#if 0
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if (rval = sbdsp_set_in_sr_real(addr, sc->sc_irate))
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return rval;
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#endif
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sbdsp_mix_write(sc, SBP_STEREO,
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(sbdsp_mix_read(sc, SBP_STEREO) & ~SBP_PLAYMODE_MASK) |
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(chans == 2 ? SBP_PLAYMODE_STEREO : SBP_PLAYMODE_MONO));
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/* recording channels needs to be done right when we start
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DMA recording. Just record number of channels for now
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and set stereo when ready. */
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}
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else {
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} else {
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if (chans != 1)
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return (EINVAL);
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sc->sc_chans = 1;
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sc->sc_chans = chans;
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}
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return (0);
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@ -381,16 +378,12 @@ sbdsp_get_channels(addr)
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#if 0
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/* recording stereo may frob the mixer output */
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if (ISSBPROCLASS(sc)) {
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if ((sbdsp_mix_read(sc, SBP_STEREO) & SBP_PLAYMODE_MASK) == SBP_PLAYMODE_STEREO) {
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if ((sbdsp_mix_read(sc, SBP_STEREO) & SBP_PLAYMODE_MASK) == SBP_PLAYMODE_STEREO)
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sc->sc_chans = 2;
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}
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else {
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else
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sc->sc_chans = 1;
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}
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}
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else {
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} else
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sc->sc_chans = 1;
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}
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#endif
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return (sc->sc_chans);
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@ -444,10 +437,8 @@ sbdsp_set_in_port(addr, port)
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case SB_FM_PORT:
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default:
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return (EINVAL);
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/*NOTREACHED*/
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}
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}
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else {
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} else {
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switch (port) {
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case SB_MIC_PORT:
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sbport = SBP_FROM_MIC;
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@ -455,7 +446,6 @@ sbdsp_set_in_port(addr, port)
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break;
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default:
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return (EINVAL);
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/*NOTREACHED*/
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}
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}
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@ -513,11 +503,12 @@ sbdsp_round_blocksize(addr, blk)
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sc->sc_last_hs_size = 0;
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/* Higher speeds need bigger blocks to avoid popping and silence gaps. */
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if ((sc->sc_orate > 8000 || sc->sc_irate > 8000) &&
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if ((sc->sc_otc > SB_8K || sc->sc_itc > SB_8K) &&
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(blk > NBPG/2 || blk < NBPG/4))
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blk = NBPG/2;
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/* don't try to DMA too much at once, though. */
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if (blk > NBPG) blk = NBPG;
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if (blk > NBPG)
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blk = NBPG;
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if (sc->sc_chans == 2)
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return (blk & ~1); /* must be even to preserve stereo separation */
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else
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@ -528,15 +519,18 @@ int
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sbdsp_commit_settings(addr)
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void *addr;
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{
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register struct sbdsp_softc *sc = addr;
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/* due to potentially unfortunate ordering in the above layers,
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re-do a few sets which may be important--input gains
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(adjust the proper channels), number of input channels (hit the
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record rate and set mode) */
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register struct sbdsp_softc *sc = addr;
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sbdsp_set_out_sr_real(addr, sc->sc_orate);
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sbdsp_set_in_sr_real(addr, sc->sc_irate);
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/*
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* XXX
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* Should wait for chip to be idle.
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*/
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sc->sc_dmadir = SB_DMA_NONE;
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return 0;
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}
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@ -604,9 +598,9 @@ sbdsp_reset(sc)
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register int iobase = sc->sc_iobase;
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sc->sc_intr = 0;
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if (sc->sc_dmadir != SBP_DMA_NONE) {
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if (sc->sc_dmadir != SB_DMA_NONE) {
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isa_dmaabort(sc->sc_drq);
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sc->sc_dmadir = SBP_DMA_NONE;
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sc->sc_dmadir = SB_DMA_NONE;
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}
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sc->sc_last_hs_size = 0;
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@ -768,39 +762,6 @@ sbdsp_contdma(addr)
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return(0);
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}
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/*
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* Time constant routines follow. See SBK, section 12.
|
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* Although they don't come out and say it (in the docs),
|
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* the card clearly uses a 1MHz countdown timer, as the
|
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* low-speed formula (p. 12-4) is:
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* tc = 256 - 10^6 / sr
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* In high-speed mode, the constant is the upper byte of a 16-bit counter,
|
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* and a 256MHz clock is used:
|
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* tc = 65536 - 256 * 10^ 6 / sr
|
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* Since we can only use the upper byte of the HS TC, the two formulae
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* are equivalent. (Why didn't they say so?) E.g.,
|
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* (65536 - 256 * 10 ^ 6 / x) >> 8 = 256 - 10^6 / x
|
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*
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* The crossover point (from low- to high-speed modes) is different
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* for the SBPRO and SB20. The table on p. 12-5 gives the following data:
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*
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* SBPRO SB20
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* ----- --------
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* input ls min 4 KHz 4 KHz
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* input ls max 23 KHz 13 KHz
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* input hs max 44.1 KHz 15 KHz
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* output ls min 4 KHz 4 KHz
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* output ls max 23 KHz 23 KHz
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* output hs max 44.1 KHz 44.1 KHz
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*/
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#define SB_LS_MIN 0x06 /* 4000 Hz */
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#define SBPRO_ADC_LS_MAX 0xd4 /* 22727 Hz */
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#define SBPRO_ADC_HS_MAX 0xea /* 45454 Hz */
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#define SBCLA_ADC_LS_MAX 0xb3 /* 12987 Hz */
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#define SBCLA_ADC_HS_MAX 0xbd /* 14925 Hz */
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#define SB_DAC_LS_MAX 0xd4 /* 22727 Hz */
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#define SB_DAC_HS_MAX 0xea /* 45454 Hz */
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/*
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* Convert a linear sampling rate into the DAC time constant.
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* Set *mode to indicate the high/low-speed DMA operation.
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@ -810,53 +771,60 @@ sbdsp_contdma(addr)
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* so isdac indicates output, and !isdac indicates input.
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*/
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int
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sbdsp_srtotc(sc, sr, mode, isdac)
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sbdsp_srtotc(sc, sr, isdac, tcp, modep)
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register struct sbdsp_softc *sc;
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int sr;
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int *mode;
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int isdac;
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int *tcp, *modep;
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{
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int adc_ls_max, adc_hs_max;
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register int tc;
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int tc, mode;
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if (sr == 0) {
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*mode = SB_ADAC_LS;
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return SB_LS_MIN;
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tc = SB_LS_MIN;
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mode = SB_ADAC_LS;
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goto out;
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}
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tc = 256 - 1000000 / sr;
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|
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tc = 256 - (1000000 / sr);
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|
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if (tc < SB_LS_MIN) {
|
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tc = SB_LS_MIN;
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mode = SB_ADAC_LS;
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goto out;
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} else if (isdac) {
|
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if (tc <= SB_DAC_LS_MAX)
|
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mode = SB_ADAC_LS;
|
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else {
|
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mode = SB_ADAC_HS;
|
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if (tc > SB_DAC_HS_MAX)
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tc = SB_DAC_HS_MAX;
|
||||
}
|
||||
} else {
|
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int adc_ls_max, adc_hs_max;
|
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|
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/* XXX use better rounding--compare distance to nearest tc on both
|
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sides of requested speed */
|
||||
if (ISSBPROCLASS(sc)) {
|
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adc_ls_max = SBPRO_ADC_LS_MAX;
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adc_hs_max = SBPRO_ADC_HS_MAX;
|
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}
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else {
|
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} else {
|
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adc_ls_max = SBCLA_ADC_LS_MAX;
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adc_hs_max = SBCLA_ADC_HS_MAX;
|
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}
|
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|
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if (tc < SB_LS_MIN) {
|
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tc = SB_LS_MIN;
|
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*mode = SB_ADAC_LS;
|
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} else if (isdac) {
|
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if (tc <= SB_DAC_LS_MAX)
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*mode = SB_ADAC_LS;
|
||||
else {
|
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*mode = SB_ADAC_HS;
|
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if (tc > SB_DAC_HS_MAX)
|
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tc = SB_DAC_HS_MAX;
|
||||
}
|
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} else {
|
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if (tc <= adc_ls_max)
|
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*mode = SB_ADAC_LS;
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mode = SB_ADAC_LS;
|
||||
else {
|
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*mode = SB_ADAC_HS;
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mode = SB_ADAC_HS;
|
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if (tc > adc_hs_max)
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tc = adc_hs_max;
|
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}
|
||||
}
|
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return tc;
|
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|
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out:
|
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*tcp = tc;
|
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*modep = mode;
|
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return (0);
|
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}
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|
||||
/*
|
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|
|
@ -882,47 +850,27 @@ sbdsp_tctosr(sc, tc)
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|||
}
|
||||
|
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int
|
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sbdsp_set_sr(sc, srp, isdac)
|
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sbdsp_set_tc(sc, tc)
|
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register struct sbdsp_softc *sc;
|
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u_long *srp;
|
||||
int isdac;
|
||||
int tc;
|
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{
|
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register int tc;
|
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int mode;
|
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int sr = *srp;
|
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register int iobase;
|
||||
|
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/*
|
||||
* A SBPro in stereo mode uses time constants at double the
|
||||
* actual rate.
|
||||
*/
|
||||
if (ISSBPRO(sc) && sc->sc_chans == 2) {
|
||||
if (sr > 22727)
|
||||
sr = 22727; /* Can't bounce it...order of
|
||||
operations may yield bogus
|
||||
sr here. */
|
||||
sr *= 2;
|
||||
}
|
||||
else if (!ISSBPROCLASS(sc) && sc->sc_chans != 1)
|
||||
return EINVAL;
|
||||
if (ISSBPRO(sc) && sc->sc_chans == 2)
|
||||
tc = 256 - ((256 - tc) / 2);
|
||||
|
||||
tc = sbdsp_srtotc(sc, sr, &mode, isdac);
|
||||
DPRINTF(("sbdsp_set_sr: sc=0x%x sr=%d mode=0x%x\n", sc, sr, mode));
|
||||
DPRINTF(("sbdsp_set_tc: sc=%p tc=%d\n", sc, tc));
|
||||
|
||||
iobase = sc->sc_iobase;
|
||||
if (sbdsp_wdsp(iobase, SB_DSP_TIMECONST) < 0 ||
|
||||
sbdsp_wdsp(iobase, tc) < 0)
|
||||
return EIO;
|
||||
return (EIO);
|
||||
|
||||
sr = sbdsp_tctosr(sc, tc);
|
||||
if (ISSBPRO(sc) && sc->sc_chans == 2)
|
||||
*srp = sr / 2;
|
||||
else
|
||||
*srp = sr;
|
||||
|
||||
sc->sc_adacmode = mode;
|
||||
sc->sc_adactc = tc;
|
||||
return 0;
|
||||
return (0);
|
||||
}
|
||||
|
||||
int
|
||||
|
|
@ -946,22 +894,24 @@ sbdsp_dma_input(addr, p, cc, intr, arg)
|
|||
}
|
||||
|
||||
iobase = sc->sc_iobase;
|
||||
if (ISSBPROCLASS(sc) && sc->sc_dmadir != SBP_DMA_IN) {
|
||||
if (sc->sc_dmadir != SB_DMA_IN) {
|
||||
if (ISSBPROCLASS(sc)) {
|
||||
if (sc->sc_chans == 2) {
|
||||
if (sbdsp_wdsp(iobase, SB_DSP_RECORD_STEREO) < 0)
|
||||
goto badmode;
|
||||
sbdsp_mix_write(sc, SBP_INFILTER,
|
||||
sbdsp_mix_read(sc, SBP_INFILTER) | SBP_FILTER_OFF);
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
if (sbdsp_wdsp(iobase, SB_DSP_RECORD_MONO) < 0)
|
||||
goto badmode;
|
||||
sbdsp_mix_write(sc, SBP_INFILTER,
|
||||
sc->sc_irate <= 8000 ?
|
||||
sbdsp_mix_read(sc, SBP_INFILTER) & ~SBP_FILTER_MASK :
|
||||
sbdsp_mix_read(sc, SBP_INFILTER) | SBP_FILTER_OFF);
|
||||
sbdsp_mix_write(sc, SBP_INFILTER, sc->sc_itc > SB_8K ?
|
||||
sbdsp_mix_read(sc, SBP_INFILTER) | SBP_FILTER_OFF :
|
||||
sbdsp_mix_read(sc, SBP_INFILTER) & ~SBP_FILTER_MASK);
|
||||
}
|
||||
sc->sc_dmadir = SBP_DMA_IN;
|
||||
}
|
||||
|
||||
sbdsp_set_tc(sc, sc->sc_itc);
|
||||
sc->sc_dmadir = SB_DMA_IN;
|
||||
}
|
||||
|
||||
isa_dmastart(B_READ, p, cc, sc->sc_drq);
|
||||
|
|
@ -971,7 +921,7 @@ sbdsp_dma_input(addr, p, cc, intr, arg)
|
|||
sc->dmaaddr = p;
|
||||
sc->dmacnt = --cc; /* DMA controller is strange...? */
|
||||
|
||||
if (sc->sc_adacmode == SB_ADAC_LS) {
|
||||
if (sc->sc_imode == SB_ADAC_LS) {
|
||||
if (sbdsp_wdsp(iobase, SB_DSP_RDMA) < 0 ||
|
||||
sbdsp_wdsp(iobase, cc) < 0 ||
|
||||
sbdsp_wdsp(iobase, cc >> 8) < 0) {
|
||||
|
|
@ -1027,14 +977,17 @@ sbdsp_dma_output(addr, p, cc, intr, arg)
|
|||
}
|
||||
|
||||
iobase = sc->sc_iobase;
|
||||
if (ISSBPROCLASS(sc) && sc->sc_dmadir != SBP_DMA_OUT) {
|
||||
if (sc->sc_dmadir != SB_DMA_OUT) {
|
||||
if (ISSBPROCLASS(sc)) {
|
||||
/* make sure we re-set stereo mixer bit when we start
|
||||
output. */
|
||||
sbdsp_mix_write(sc, SBP_STEREO,
|
||||
(sbdsp_mix_read(sc, SBP_STEREO) & ~SBP_PLAYMODE_MASK) |
|
||||
(sc->sc_chans == 2 ?
|
||||
SBP_PLAYMODE_STEREO : SBP_PLAYMODE_MONO));
|
||||
sc->sc_dmadir = SBP_DMA_OUT;
|
||||
(sc->sc_chans == 2 ? SBP_PLAYMODE_STEREO : SBP_PLAYMODE_MONO));
|
||||
}
|
||||
|
||||
sbdsp_set_tc(sc, sc->sc_otc);
|
||||
sc->sc_dmadir = SB_DMA_OUT;
|
||||
}
|
||||
|
||||
isa_dmastart(B_WRITE, p, cc, sc->sc_drq);
|
||||
|
|
@ -1044,7 +997,7 @@ sbdsp_dma_output(addr, p, cc, intr, arg)
|
|||
sc->dmaaddr = p;
|
||||
sc->dmacnt = --cc; /* a vagary of how DMA works, apparently. */
|
||||
|
||||
if (sc->sc_adacmode == SB_ADAC_LS) {
|
||||
if (sc->sc_omode == SB_ADAC_LS) {
|
||||
if (sbdsp_wdsp(iobase, SB_DSP_WDMA) < 0 ||
|
||||
sbdsp_wdsp(iobase, cc) < 0 ||
|
||||
sbdsp_wdsp(iobase, cc >> 8) < 0) {
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: sbdspvar.h,v 1.8 1996/02/16 08:07:46 mycroft Exp $ */
|
||||
/* $NetBSD: sbdspvar.h,v 1.9 1996/02/16 10:10:23 mycroft Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1991-1993 Regents of the University of California.
|
||||
|
|
@ -80,10 +80,6 @@ struct sbdsp_softc {
|
|||
int sc_drq; /* DMA */
|
||||
|
||||
u_short sc_open; /* reference count of open calls */
|
||||
u_short sc_adacmode; /* low/high speed mode indicator */
|
||||
|
||||
u_long sc_irate; /* Sample rate for input */
|
||||
u_long sc_orate; /* ...and output */
|
||||
|
||||
u_int gain[SB_NDEVS]; /* kept in SB levels: right/left each
|
||||
in a nibble */
|
||||
|
|
@ -95,9 +91,14 @@ struct sbdsp_softc {
|
|||
|
||||
u_int spkr_state; /* non-null is on */
|
||||
|
||||
int sc_itc; /* Sample rate for input */
|
||||
int sc_otc; /* ...and output */
|
||||
|
||||
int sc_imode;
|
||||
int sc_omode;
|
||||
#define SB_ADAC_LS 0
|
||||
#define SB_ADAC_HS 1
|
||||
u_short sc_adactc; /* current adac time constant */
|
||||
|
||||
u_long sc_interrupts; /* number of interrupts taken */
|
||||
void (*sc_intr)(void*); /* dma completion intr handler */
|
||||
void (*sc_mintr)(void*, int);/* midi input intr handler */
|
||||
|
|
@ -109,9 +110,9 @@ struct sbdsp_softc {
|
|||
int sc_last_hs_size; /* last HS dma size */
|
||||
int sc_chans; /* # of channels */
|
||||
int sc_dmadir; /* DMA direction */
|
||||
#define SBP_DMA_NONE 0
|
||||
#define SBP_DMA_IN 1
|
||||
#define SBP_DMA_OUT 2
|
||||
#define SB_DMA_NONE 0
|
||||
#define SB_DMA_IN 1
|
||||
#define SB_DMA_OUT 2
|
||||
|
||||
u_int sc_model; /* DSP model */
|
||||
#define SBVER_MAJOR(v) ((v)>>8)
|
||||
|
|
|
|||
Loading…
Reference in New Issue