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Check MIPS3_CONFIG_CS and adjust csizebase at runtime on MIPS_R4100 CPUs,

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and remove "XXXCDC: THIS MIPS3_4100 SPECIAL CASE SHOULD GO AWAY" part
from cpuregs.h. Tested on gxemul.

BTW, cache.c doesn't have MIPS_RC32364 config which was added
in mips_machdep.c rev 1.101?
This commit is contained in:
tsutsui 2005-11-04 16:19:31 +00:00
parent ba2ee12485
commit 78422d0423
2 changed files with 10 additions and 10 deletions
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13
sys/arch/mips/include/cpuregs.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpuregs.h,v 1.65 2003/10/29 23:41:10 simonb Exp $ */ /* $NetBSD: cpuregs.h,v 1.66 2005/11/04 16:19:31 tsutsui Exp $ */
/* /*
* Copyright (c) 1992, 1993 * Copyright (c) 1992, 1993
@ -310,15 +310,12 @@
#define MIPS3_CONFIG_IC_MASK 0x00000e00 /* Primary I-cache size */ #define MIPS3_CONFIG_IC_MASK 0x00000e00 /* Primary I-cache size */
#define MIPS3_CONFIG_IC_SHIFT 9 #define MIPS3_CONFIG_IC_SHIFT 9
#define MIPS3_CONFIG_C_DEFBASE 0x1000 /* default base 2^12 */ #define MIPS3_CONFIG_C_DEFBASE 0x1000 /* default base 2^12 */
#ifdef MIPS3_4100 /* VR4100 core */
/* XXXCDC: THIS MIPS3_4100 SPECIAL CASE SHOULD GO AWAY */ /* Cache size mode indication: available only on Vr41xx CPUs */
#define MIPS3_CONFIG_CS 0x00001000 /* cache size mode indication*/ #define MIPS3_CONFIG_CS 0x00001000
#define MIPS3_CONFIG_CACHE_SIZE(config, mask, dummy, shift) \ #define MIPS3_CONFIG_C_4100BASE 0x0400 /* base is 2^10 if CS=1 */
((((config)&MIPS3_CONFIG_CS)?0x400:0x1000) << (((config) & (mask)) >> (shift)))
#else
#define MIPS3_CONFIG_CACHE_SIZE(config, mask, base, shift) \ #define MIPS3_CONFIG_CACHE_SIZE(config, mask, base, shift) \
((base) << (((config) & (mask)) >> (shift))) ((base) << (((config) & (mask)) >> (shift)))
#endif
/* External cache enable: Controls L2 for R5000/Rm527x and L3 for Rm7000 */ /* External cache enable: Controls L2 for R5000/Rm527x and L3 for Rm7000 */
#define MIPS3_CONFIG_SE 0x00001000 #define MIPS3_CONFIG_SE 0x00001000

7
sys/arch/mips/mips/cache.c
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@ -1,4 +1,4 @@
/* $NetBSD: cache.c,v 1.28 2005/06/03 20:48:28 he Exp $ */ /* $NetBSD: cache.c,v 1.29 2005/11/04 16:19:32 tsutsui Exp $ */
/* /*
* Copyright 2001, 2002 Wasabi Systems, Inc. * Copyright 2001, 2002 Wasabi Systems, Inc.
@ -68,7 +68,7 @@
*/ */
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.28 2005/06/03 20:48:28 he Exp $"); __KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.29 2005/11/04 16:19:32 tsutsui Exp $");
#include "opt_cputype.h" #include "opt_cputype.h"
#include "opt_mips_cache.h" #include "opt_mips_cache.h"
@ -396,6 +396,9 @@ mips_config_cache_prehistoric(void)
#if defined(MIPS3) || defined(MIPS4) #if defined(MIPS3) || defined(MIPS4)
case MIPS_R4100: case MIPS_R4100:
if ((mips3_cp0_config_read() & MIPS3_CONFIG_CS) != 0)
csizebase = MIPS3_CONFIG_C_4100BASE;
/* /*
* R4100 (NEC VR series) revision number means: * R4100 (NEC VR series) revision number means:
* *