Handle the case where PCI dense memory and PCI sparse memory don't
overlap; don't require allocation from the dense extent if the PCI memory address isn't mapped into dense space. Also, make sure to return an error if a liner mapping is requested and dense space is not available (not just not requested).
This commit is contained in:
parent
2c24f58ba1
commit
781149bb12
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@ -1,4 +1,4 @@
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/* $NetBSD: pci_swiz_bus_mem_chipdep.c,v 1.30 1999/12/08 00:35:43 thorpej Exp $ */
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/* $NetBSD: pci_swiz_bus_mem_chipdep.c,v 1.31 1999/12/08 01:48:39 thorpej Exp $ */
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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@ -377,7 +377,9 @@ __C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, memhp)
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#ifdef CHIP_D_MEM_W1_BUS_START
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if (memaddr >= CHIP_D_MEM_W1_BUS_START(v) &&
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memaddr <= CHIP_D_MEM_W1_BUS_END(v)) {
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*memhp = ALPHA_PHYS_TO_K0SEG(CHIP_D_MEM_W1_SYS_START(v)) +
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if (memhp != NULL)
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*memhp =
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ALPHA_PHYS_TO_K0SEG(CHIP_D_MEM_W1_SYS_START(v)) +
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(memaddr - CHIP_D_MEM_W1_BUS_START(v));
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return (1);
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} else
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@ -416,6 +418,7 @@ __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, memhp)
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#ifdef CHIP_S_MEM_W1_BUS_START
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if (memaddr >= CHIP_S_MEM_W1_BUS_START(v) &&
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memaddr <= CHIP_S_MEM_W1_BUS_END(v)) {
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if (memhp != NULL)
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*memhp =
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(ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W1_SYS_START(v)) >>
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CHIP_ADDR_SHIFT) +
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@ -426,6 +429,7 @@ __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, memhp)
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#ifdef CHIP_S_MEM_W2_BUS_START
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if (memaddr >= CHIP_S_MEM_W2_BUS_START(v) &&
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memaddr <= CHIP_S_MEM_W2_BUS_END(v)) {
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if (memhp != NULL)
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*memhp =
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(ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W2_SYS_START(v)) >>
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CHIP_ADDR_SHIFT) +
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@ -436,6 +440,7 @@ __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, memhp)
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#ifdef CHIP_S_MEM_W3_BUS_START
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if (memaddr >= CHIP_S_MEM_W3_BUS_START(v) &&
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memaddr <= CHIP_S_MEM_W3_BUS_END(v)) {
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if (memhp != NULL)
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*memhp =
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(ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W3_SYS_START(v)) >>
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CHIP_ADDR_SHIFT) +
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@ -496,15 +501,6 @@ __C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp, acct)
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int cacheable = flags & BUS_SPACE_MAP_CACHEABLE;
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int linear = flags & BUS_SPACE_MAP_LINEAR;
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#ifndef CHIP_D_MEM_W1_SYS_START
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/* No cacheable space without dense. */
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cacheable = 0;
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#endif /* ! CHIP_D_MEM_W1_SYS_START */
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/* Requests for linear uncacheable space can't be satisfied. */
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if (linear && !cacheable)
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return (EOPNOTSUPP);
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/*
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* XXX Too hairy to not do accounting in this space. Nothing
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* XXX much uses this anyhow (only ISA PnP does, and only via
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@ -515,10 +511,46 @@ __C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp, acct)
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#ifdef CHIP_D_MEM_W1_SYS_START
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mustd = 1;
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if (!__C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, NULL)) {
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/*
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* This address isn't mapped into dense space; don't
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* require it.
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*/
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mustd = 0;
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}
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#else
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mustd = 0;
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#endif
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/* No cacheable space without dense. */
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if (mustd == 0)
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cacheable = 0;
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/*
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* We must have dense space to map memory linearly.
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*/
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if (linear && !cacheable)
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return (EOPNOTSUPP);
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musts = (cacheable == 0);
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if (!__C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, NULL)) {
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/*
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* This address isn't mapped into sparse space; don't
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* require it.
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*/
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musts = 0;
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}
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/*
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* If this address isn't mapped into dense or sparse, we lose.
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*/
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if (mustd == 0 && musts == 0) {
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#ifdef EXTENT_DEBUG
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printf("mem: address 0x%lx not in dense or sparse space\n",
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memaddr);
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#endif
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return (EINVAL);
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}
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#ifdef EXTENT_DEBUG
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printf("mem: allocating 0x%lx to 0x%lx\n", memaddr,
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