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Imported from OpenBSD/FreeBSD: 

Add support for the SMC8416 (EtherEZ) ISA ethernet card.
	The 8416 has an 8K shared mem (the old driver assumed 16K
	and failed at attach time).
This commit is contained in:
chuck 1996-01-10 16:49:22 +00:00
parent 0203b54d4b
commit 75caa8c729
2 changed files with 46 additions and 9 deletions
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33
sys/dev/isa/if_ed.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_ed.c,v 1.86 1995/12/24 02:31:21 mycroft Exp $ */
/* $NetBSD: if_ed.c,v 1.87 1996/01/10 16:49:25 chuck Exp $ */
/*
* Device driver for National Semiconductor DS8390/WD83C690 based ethernet
@ -310,14 +310,31 @@ ed_probe_WD80x3(sc, cf, ia)
isa16bit = 1;
break;
case ED_TYPE_SMC8216C:
sc->type_str = "SMC8216/SMC8216C";
memsize = 16384;
isa16bit = 1;
sc->is790 = 1;
break;
case ED_TYPE_SMC8216T:
sc->type_str = "SMC8216T";
memsize = 16384;
sc->type_str = (sc->type == ED_TYPE_SMC8216C) ?
"SMC8216/SMC8216C" : "SMC8216T";
outb(sc->asic_addr + ED_WD790_HWR,
inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH);
switch (inb(sc->asic_addr + ED_WD790_RAR) & ED_WD790_RAR_SZ64) {
case ED_WD790_RAR_SZ64:
memsize = 65536;
break;
case ED_WD790_RAR_SZ32:
memsize = 32768;
break;
case ED_WD790_RAR_SZ16:
memsize = 16384;
break;
case ED_WD790_RAR_SZ8:
/* 8216 has 16K shared mem -- 8416 has 8K */
sc->type_str = (sc->type == ED_TYPE_SMC8216C) ?
"SMC8416C/SMC8416BT" : "SMC8416T";
memsize = 8192;
break;
}
outb(sc->asic_addr + ED_WD790_HWR,
inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
isa16bit = 1;
sc->is790 = 1;
break;

22
sys/dev/isa/if_edreg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_edreg.h,v 1.14 1995/04/11 04:46:22 mycroft Exp $ */
/* $NetBSD: if_edreg.h,v 1.15 1996/01/10 16:49:22 chuck Exp $ */
/*
* National Semiconductor DS8390 NIC register definitions.
@ -152,6 +152,26 @@
#define ED_WD790_ICR_EIL 0x01 /* enable interrupts */
/*
* REV/IOPA Revision / I/O Pipe register for the 83C79X
*/
#define ED_WD790_REV 7
#define ED_WD790 0x20
#define ED_WD795 0x40
/*
* 79X RAM Address Register (RAR)
* Enabled with SWH bit=1 in HWR register
*/
#define ED_WD790_RAR 0x0b
#define ED_WD790_RAR_SZ8 0x00 /* 8k memory buffer */
#define ED_WD790_RAR_SZ16 0x10 /* 16k memory buffer */
#define ED_WD790_RAR_SZ32 0x20 /* 32k memory buffer */
#define ED_WD790_RAR_SZ64 0x30 /* 64k memory buffer */
/*
* General Control Register (GCR)
* Eanbled with SWH bit == 1 in HWR register