Factor mfence out. Simplify a little.
This commit is contained in:
riastradh
parent
48d564898f
commit
756b29112b
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@ -1,4 +1,4 @@
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/* $NetBSD: drm_cache.c,v 1.10 2018/08/27 15:23:57 riastradh Exp $ */
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/* $NetBSD: drm_cache.c,v 1.11 2018/08/27 15:24:27 riastradh Exp $ */
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/*-
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* Copyright (c) 2013 The NetBSD Foundation, Inc.
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@ -30,7 +30,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: drm_cache.c,v 1.10 2018/08/27 15:23:57 riastradh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: drm_cache.c,v 1.11 2018/08/27 15:24:27 riastradh Exp $");
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#include <sys/param.h>
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#include <sys/types.h>
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@ -49,6 +49,7 @@ __KERNEL_RCSID(0, "$NetBSD: drm_cache.c,v 1.10 2018/08/27 15:23:57 riastradh Exp
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#if defined(DRM_CLFLUSH)
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static bool drm_md_clflush_finegrained_p(void);
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static void drm_md_clflush_all(void);
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static void drm_md_clflush_begin(void);
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static void drm_md_clflush_commit(void);
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static void drm_md_clflush_page(struct page *);
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static void drm_md_clflush_virt_range(const void *, size_t);
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@ -59,6 +60,7 @@ drm_clflush_pages(struct page **pages, unsigned long npages)
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{
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#if defined(DRM_CLFLUSH)
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if (drm_md_clflush_finegrained_p()) {
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drm_md_clflush_begin();
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while (npages--)
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drm_md_clflush_page(pages[npages]);
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drm_md_clflush_commit();
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@ -75,6 +77,7 @@ drm_clflush_pglist(struct pglist *list)
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if (drm_md_clflush_finegrained_p()) {
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struct vm_page *page;
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drm_md_clflush_begin();
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TAILQ_FOREACH(page, list, pageq.queue)
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drm_md_clflush_page(container_of(page, struct page,
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p_vmp));
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@ -90,6 +93,7 @@ drm_clflush_page(struct page *page)
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{
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#if defined(DRM_CLFLUSH)
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if (drm_md_clflush_finegrained_p()) {
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drm_md_clflush_begin();
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drm_md_clflush_page(page);
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drm_md_clflush_commit();
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} else {
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@ -103,6 +107,7 @@ drm_clflush_virt_range(const void *vaddr, size_t nbytes)
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{
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#if defined(DRM_CLFLUSH)
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if (drm_md_clflush_finegrained_p()) {
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drm_md_clflush_begin();
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drm_md_clflush_virt_range(vaddr, nbytes);
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drm_md_clflush_commit();
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} else {
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@ -121,19 +126,6 @@ drm_md_clflush_finegrained_p(void)
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return ISSET(cpu_info_primary.ci_feat_val[0], CPUID_CFLUSH);
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}
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static void
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drm_x86_clflush(const void *vaddr)
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{
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asm volatile ("clflush %0" : : "m" (*(const char *)vaddr));
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}
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static size_t
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drm_x86_clflush_size(void)
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{
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KASSERT(drm_md_clflush_finegrained_p());
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return cpu_info_primary.ci_cflush_lsize;
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}
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static void
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drm_x86_clflush_xc(void *arg0 __unused, void *arg1 __unused)
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{
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@ -146,9 +138,17 @@ drm_md_clflush_all(void)
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xc_wait(xc_broadcast(0, &drm_x86_clflush_xc, NULL, NULL));
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}
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static void
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drm_md_clflush_begin(void)
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{
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/* Support for CLFLUSH implies support for MFENCE. */
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x86_mfence();
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}
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static void
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drm_md_clflush_commit(void)
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{
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x86_mfence();
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}
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static void
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@ -162,37 +162,20 @@ drm_md_clflush_page(struct page *page)
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}
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static void
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drm_md_clflush_virt_range(const void *vaddr, size_t nbytes)
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drm_md_clflush_virt_range(const void *ptr, size_t nbytes)
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{
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const unsigned clflush_size = drm_x86_clflush_size();
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const vaddr_t va = (vaddr_t)vaddr;
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const char *const start = (const void *)rounddown(va, clflush_size);
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const char *const end = (const void *)roundup(va + nbytes,
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clflush_size);
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const char *p;
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const unsigned clflush_size = cpu_info_primary.ci_cflush_lsize;
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const vaddr_t vaddr = (vaddr_t)ptr;
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const vaddr_t start = rounddown(vaddr, clflush_size);
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const vaddr_t end = roundup(vaddr + nbytes, clflush_size);
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vaddr_t va;
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/* Support for CLFLUSH implies support for MFENCE. */
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KASSERT(drm_md_clflush_finegrained_p());
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x86_mfence();
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for (p = start; p < end; p += clflush_size)
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drm_x86_clflush(p);
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x86_mfence();
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for (va = start; va < end; va += clflush_size)
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asm volatile ("clflush %0" : : "m" (*(const char *)va));
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}
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#elif defined(__powerpc__)
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static void
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drm_ppc_dcbf(vaddr_t va, vsize_t off)
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{
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asm volatile ("dcbf\t%0,%1" : : "b"(va), "r"(off));
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}
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static void
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drm_ppc_sync(void)
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{
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asm volatile ("sync" ::: "memory");
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}
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static bool
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drm_md_clflush_finegrained_p(void)
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{
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@ -205,10 +188,15 @@ drm_md_clflush_all(void)
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panic("don't know how to flush entire cache on powerpc");
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}
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static void
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drm_md_clflush_begin(void)
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{
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}
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static void
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drm_md_clflush_commit(void)
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{
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drm_ppc_sync();
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asm volatile ("sync" ::: "memory");
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}
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static void
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@ -232,7 +220,7 @@ drm_md_clflush_virt_range(const void *ptr, size_t nbytes)
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vsize_t off;
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for (off = 0; off < len; off += dcsize)
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drm_ppc_dcbf(start, off);
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asm volatile ("dcbf\t%0,%1" : : "b"(start), "r"(off));
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}
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#endif
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