On SMP kernel,
- use "tick" interrupt for per-CPU statclock. - disable "counter-timer" #1 interrupt and use it as timecounter.
This commit is contained in:
nakayama
parent
f5506ae261
commit
74a205f37a
@ -1,4 +1,4 @@
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/* $NetBSD: clock.c,v 1.89 2008/03/02 15:28:26 nakayama Exp $ */
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/* $NetBSD: clock.c,v 1.90 2008/03/14 15:38:36 nakayama Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -55,7 +55,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.89 2008/03/02 15:28:26 nakayama Exp $");
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__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.90 2008/03/14 15:38:36 nakayama Exp $");
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#include "opt_multiprocessor.h"
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@ -96,6 +96,15 @@ __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.89 2008/03/02 15:28:26 nakayama Exp $");
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#include <dev/ebus/ebusvar.h>
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/*
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* Clock assignments:
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*
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* machine hardclock statclock timecounter
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* counter-timer timer#0 timer#1 %tick
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* counter-timer + SMP timer#0 %tick/CPU timer#1 or %tick
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* no counter-timer %tick - %tick
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*/
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/*
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* Statistics clock interval and variance, in usec. Variance must be a
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* power of two. Since this gives us an even number, not an odd number,
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@ -112,7 +121,9 @@ int timerok;
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int schedintr(void *);
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static struct intrhand level10 = { .ih_fun = clockintr };
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#ifndef MULTIPROCESSOR
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static struct intrhand level14 = { .ih_fun = statintr };
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#endif
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static struct intrhand schedint = { .ih_fun = schedintr };
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static int timermatch(struct device *, struct cfdata *, void *);
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@ -128,14 +139,14 @@ void stopcounter(struct timer_4u *);
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int timerblurb = 10; /* Guess a value; used before clock is attached */
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static u_int timer_get_timecount(struct timecounter *);
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static u_int tick_get_timecount(struct timecounter *);
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/*
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* define timecounter
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* define timecounter "tick-counter"
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*/
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static struct timecounter counter_timecounter = {
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timer_get_timecount, /* get_timecount */
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static struct timecounter tick_timecounter = {
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tick_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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~0u, /* counter_mask */
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0, /* frequency - set at initialisation */
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@ -146,14 +157,43 @@ static struct timecounter counter_timecounter = {
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};
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/*
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* timer_get_timecount provide current counter value
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* tick_get_timecount provide current tick counter value
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*/
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static u_int
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timer_get_timecount(struct timecounter *tc)
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tick_get_timecount(struct timecounter *tc)
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{
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return cpu_counter();
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}
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#ifdef MULTIPROCESSOR
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static u_int counter_get_timecount(struct timecounter *);
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/*
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* define timecounter "counter-timer"
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*/
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static struct timecounter counter_timecounter = {
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counter_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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TMR_LIM_MASK, /* counter_mask */
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1000000, /* frequency */
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"counter-timer", /* name */
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200, /* quality */
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0, /* private reference - UNUSED */
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NULL /* next timecounter */
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};
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/*
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* counter_get_timecount provide current counter value
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*/
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static u_int
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counter_get_timecount(struct timecounter *tc)
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{
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return (u_int)ldxa((vaddr_t)&timerreg_4u.t_timer[1].t_count,
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ASI_NUCLEUS) & TMR_LIM_MASK;
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}
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#endif
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/*
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* The sun4u OPENPROMs call the timer the "counter-timer", except for
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* the lame UltraSPARC IIi PCI machines that don't have them.
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@ -185,17 +225,31 @@ timerattach(struct device *parent, struct device *self, void *aux)
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timerreg_4u.t_clrintr = (int64_t *)(u_long)va[1];
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timerreg_4u.t_mapintr = (int64_t *)(u_long)va[2];
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/*
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* Disable interrupts for now.
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* N.B. By default timer[0] is disabled and timer[1] is enabled.
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*/
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stxa((vaddr_t)&timerreg_4u.t_mapintr[0], ASI_NUCLEUS,
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(timerreg_4u.t_mapintr[0] & ~(INTMAP_V|INTMAP_TID)) |
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(CPU_UPAID << INTMAP_TID_SHIFT));
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stxa((vaddr_t)&timerreg_4u.t_mapintr[1], ASI_NUCLEUS,
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(timerreg_4u.t_mapintr[1] & ~(INTMAP_V|INTMAP_TID)) |
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(CPU_UPAID << INTMAP_TID_SHIFT));
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/* Install the appropriate interrupt vector here */
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level10.ih_number = ma->ma_interrupts[0];
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level10.ih_clr = &timerreg_4u.t_clrintr[0];
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intr_establish(10, &level10);
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printf(" irq vectors %lx", (u_long)level10.ih_number);
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#ifndef MULTIPROCESSOR
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/*
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* On SMP kernel, don't establish interrupt to use it as timecounter.
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*/
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level14.ih_number = ma->ma_interrupts[1];
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level14.ih_clr = &timerreg_4u.t_clrintr[1];
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intr_establish(14, &level14);
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printf(" irq vectors %lx and %lx",
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(u_long)level10.ih_number,
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(u_long)level14.ih_number);
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printf(" and %lx", (u_long)level14.ih_number);
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#endif
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#if 0
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cnt = &(timerreg_4u.t_timer[0].t_count);
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@ -258,21 +312,22 @@ stopcounter(struct timer_4u *creg)
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* but the shortcut during dispatch makes it work.
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*/
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void
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tickintr_establish()
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tickintr_establish(int pil, int (*fun)(void *))
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{
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int s;
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struct intrhand *ih;
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ih = malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT|M_ZERO);
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KASSERT(ih != NULL);
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ih->ih_fun = tickintr;
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ih->ih_fun = fun;
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ih->ih_arg = 0;
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ih->ih_clr = 0;
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ih->ih_number = 1;
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if (CPU_IS_PRIMARY(curcpu()))
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intr_establish(10, ih);
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intr_establish(pil, ih);
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else {
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ih->ih_pil = 10;
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ih->ih_pil = pil;
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ih->ih_pending = 0;
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ih->ih_next = NULL;
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}
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@ -284,7 +339,9 @@ tickintr_establish()
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printf("Using %%tick -- intr in %ld cycles\n",
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curcpu()->ci_tick_increment);
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#endif
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s = intr_disable();
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next_tick(curcpu()->ci_tick_increment);
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intr_restore(s);
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}
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/*
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@ -336,8 +393,8 @@ cpu_initclocks()
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}
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#endif
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counter_timecounter.tc_frequency = curcpu()->ci_cpu_clockrate[0];
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tc_init(&counter_timecounter);
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tick_timecounter.tc_frequency = curcpu()->ci_cpu_clockrate[0];
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tc_init(&tick_timecounter);
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/*
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* Now handle machines w/o counter-timers.
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@ -350,7 +407,7 @@ cpu_initclocks()
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(unsigned long)curcpu()->ci_cpu_clockrate[1]);
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/* We don't have a counter-timer -- use %tick */
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tickintr_establish();
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tickintr_establish(10, tickintr);
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/* We only have one timer so we have no statclock */
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stathz = 0;
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@ -367,7 +424,11 @@ cpu_initclocks()
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profhz = stathz; /* always */
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#ifdef MULTIPROCESSOR
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statint = curcpu()->ci_cpu_clockrate[0] / stathz;
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#else
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statint = 1000000 / stathz;
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#endif
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minint = statint / 2 + 100;
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while (statvar > minint)
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statvar >>= 1;
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@ -382,16 +443,29 @@ cpu_initclocks()
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schedhz = stathz/4;
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/*
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* Enable timers
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*
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* Also need to map the interrupts cause we're not a child of the sbus.
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* N.B. By default timer[0] is disabled and timer[1] is enabled.
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* Enable counter-timer #0 interrupt for clockintr.
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*/
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stxa((vaddr_t)&timerreg_4u.t_timer[0].t_limit, ASI_NUCLEUS,
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tmr_ustolim(tick)|TMR_LIM_IEN|TMR_LIM_PERIODIC|TMR_LIM_RELOAD);
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stxa((vaddr_t)&timerreg_4u.t_mapintr[0], ASI_NUCLEUS,
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timerreg_4u.t_mapintr[0]|INTMAP_V|(CPU_UPAID << INTMAP_TID_SHIFT));
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tmr_ustolim(tick)|TMR_LIM_IEN|TMR_LIM_PERIODIC|TMR_LIM_RELOAD);
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stxa((vaddr_t)&timerreg_4u.t_mapintr[0], ASI_NUCLEUS,
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timerreg_4u.t_mapintr[0]|INTMAP_V);
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#ifdef MULTIPROCESSOR
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/*
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* Use counter-timer #1 as timecounter.
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*/
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stxa((vaddr_t)&timerreg_4u.t_timer[1].t_limit, ASI_NUCLEUS,
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TMR_LIM_MASK);
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tc_init(&counter_timecounter);
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/*
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* Enable tick interrupt for statintr.
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*/
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tickintr_establish(14, statintr);
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#else
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/*
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* Enable counter-timer #1 interrupt for statintr.
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*/
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#ifdef DEBUG
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if (intrdebug)
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/* Neglect to enable timer */
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@ -403,6 +477,7 @@ cpu_initclocks()
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tmr_ustolim(statint)|TMR_LIM_IEN|TMR_LIM_RELOAD);
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stxa((vaddr_t)&timerreg_4u.t_mapintr[1], ASI_NUCLEUS,
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timerreg_4u.t_mapintr[1]|INTMAP_V|(CPU_UPAID << INTMAP_TID_SHIFT));
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#endif
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statmin = statint - (statvar >> 1);
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}
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@ -472,10 +547,10 @@ tickintr(void *cap)
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hardclock((struct clockframe *)cap);
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s = splhigh();
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s = intr_disable();
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/* Reset the interrupt */
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next_tick(curcpu()->ci_tick_increment);
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splx(s);
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intr_restore(s);
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curcpu()->ci_tick_evcnt.ev_count++;
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return (1);
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@ -490,6 +565,9 @@ statintr(cap)
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{
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register u_long newint, r, var;
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struct cpu_info *ci = curcpu();
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#ifdef MULTIPROCESSOR
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int s;
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#endif
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#ifdef NOT_DEBUG
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printf("statclock: count %x:%x, limit %x:%x\n",
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@ -517,8 +595,15 @@ statintr(cap)
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if (schedhz)
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if ((++ci->ci_schedstate.spc_schedticks & 3) == 0)
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send_softint(-1, PIL_SCHED, &schedint);
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#ifdef MULTIPROCESSOR
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s = intr_disable();
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next_tick(newint);
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intr_restore(s);
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curcpu()->ci_tick_evcnt.ev_count++;
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#else
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stxa((vaddr_t)&timerreg_4u.t_timer[1].t_limit, ASI_NUCLEUS,
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tmr_ustolim(newint)|TMR_LIM_IEN|TMR_LIM_RELOAD);
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#endif
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return (1);
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}
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