diff --git a/distrib/sets/lists/comp/md.hppa b/distrib/sets/lists/comp/md.hppa index a78dc08f17de..20be41bd22e8 100644 --- a/distrib/sets/lists/comp/md.hppa +++ b/distrib/sets/lists/comp/md.hppa @@ -1,4 +1,4 @@ -# $NetBSD: md.hppa,v 1.2 2014/03/06 12:17:12 skrll Exp $ +# $NetBSD: md.hppa,v 1.2.6.1 2015/01/20 20:57:24 snj Exp $ ./usr/include/gcc-4.5/tgmath.h comp-c-include gcccmds,gcc=45 ./usr/include/gcc-4.8/tgmath.h comp-c-include gcccmds,gcc=48 ./usr/include/hp700 comp-obsolete obsolete @@ -79,6 +79,7 @@ ./usr/include/hppa/endian.h comp-c-include ./usr/include/hppa/endian_machdep.h comp-c-include ./usr/include/hppa/exec.h comp-c-include +./usr/include/hppa/fenv.h comp-c-include ./usr/include/hppa/float.h comp-c-include ./usr/include/hppa/frame.h comp-c-include ./usr/include/hppa/ieee.h comp-c-include diff --git a/include/fenv.h b/include/fenv.h index ad9420409ebc..fab11f0a068a 100644 --- a/include/fenv.h +++ b/include/fenv.h @@ -1,4 +1,4 @@ -/* $NetBSD: fenv.h,v 1.10 2014/08/10 05:57:30 matt Exp $ */ +/* $NetBSD: fenv.h,v 1.10.2.1 2015/01/20 20:57:24 snj Exp $ */ /* * Copyright (c) 2010 The NetBSD Foundation, Inc. * All rights reserved. @@ -26,6 +26,7 @@ */ #if !defined(__aarch64__) && !defined(__arm__) && !defined(__i386__) \ + && !defined(__hppa__) \ && !defined(__sparc__) && !defined(__x86_64__) #error "fenv.h is currently not supported for this architecture" #endif diff --git a/lib/libm/Makefile b/lib/libm/Makefile index 22353a482ff6..3a51abb34388 100644 --- a/lib/libm/Makefile +++ b/lib/libm/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.164.2.1 2014/10/13 19:34:58 martin Exp $ +# $NetBSD: Makefile,v 1.164.2.2 2015/01/20 20:57:24 snj Exp $ # # @(#)Makefile 5.1beta 93/09/24 # @@ -75,6 +75,11 @@ COPTS.fenv.c+= -mfpu=vfp .PATH.S: ${.CURDIR}/arch/arm ARCH_SRCS = e_sqrt.S e_sqrtf.S lrint.S lrintf.S s_fabsf.S s_fma.S s_fmaf.S .endif +.elif (${LIBC_MACHINE_ARCH} == "hppa") +.PATH.c: ${.CURDIR}/arch/hppa +COMMON_SRCS+= fenv.c s_nexttowardf.c \ + s_nearbyint.c s_rintl.c +COPTS.e_sqrtl.c += -DHAVE_FENV_H .elif (${LIBC_MACHINE_ARCH} == "sparc") .PATH: ${.CURDIR}/arch/sparc COMMON_SRCS+= fenv.c diff --git a/lib/libm/arch/hppa/fenv.c b/lib/libm/arch/hppa/fenv.c new file mode 100644 index 000000000000..286f4436e0db --- /dev/null +++ b/lib/libm/arch/hppa/fenv.c @@ -0,0 +1,350 @@ +/* $NetBSD: fenv.c,v 1.2.2.2 2015/01/20 20:57:24 snj Exp $ */ + +/*- + * Copyright (c) 2004-2005 David Schultz + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + */ +#include +__RCSID("$NetBSD: fenv.c,v 1.2.2.2 2015/01/20 20:57:24 snj Exp $"); + +#include +#include + +/* + * Convert from exception flags (__BITS(27,32)) to exception enable bits + * (__BITS(5,0)) by right-shifting this much: + */ +#define FE_FLAGS_SHIFT 27 + +/* + * Mask all rounding mode bits + */ +#define FE_ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \ + FE_UPWARD | FE_TOWARDZERO) + +/* Load lower 32 bits from floating-point state register */ +static inline uint32_t +readfpsr(void) +{ + uint32_t rv; + + __asm__ __volatile__ ("fstws %%fr0, %0" : "=m"(rv)); + return rv; +} + +/* Save floating-point state register */ +static inline void +writefpsr(uint32_t val) +{ + __asm__ __volatile__("fldws %0,%%fr0" : : "m"(val)); +} + +/* + * The feclearexcept() function clears the supported floating-point exceptions + * represented by `excepts'. + */ +int +feclearexcept(int excepts) +{ + fexcept_t r; + int ex; + + _DIAGASSERT((excepts & ~FE_ALL_EXCEPT) == 0); + + ex = (excepts & FE_ALL_EXCEPT) << FE_FLAGS_SHIFT; + + r = readfpsr(); + r &= ~ex; + writefpsr(r); + + /* Success */ + return 0; +} + +/* + * The fegetexceptflag() function stores an implementation-defined + * representation of the states of the floating-point status flags indicated + * by the argument excepts in the object pointed to by the argument flagp. + */ +int +fegetexceptflag(fexcept_t *flagp, int excepts) +{ + fexcept_t r; + int ex; + + _DIAGASSERT(flagp != NULL); + _DIAGASSERT((excepts & ~_FE_ALL_EXCEPT) == 0); + + ex = (excepts & FE_ALL_EXCEPT) << FE_FLAGS_SHIFT; + + r = readfpsr(); + *flagp = (r & ex) >> FE_FLAGS_SHIFT; + + /* Success */ + return 0; +} + + +/* + * This function sets the floating-point status flags indicated by the argument + * `excepts' to the states stored in the object pointed to by `flagp'. It does + * NOT raise any floating-point exceptions, but only sets the state of the flags. + */ +int +fesetexceptflag(const fexcept_t *flagp, int excepts) +{ + fexcept_t r; + int ex; + + _DIAGASSERT(flagp != NULL); + _DIAGASSERT((excepts & ~FE_ALL_EXCEPT) == 0); + + ex = (excepts & FE_ALL_EXCEPT) << FE_FLAGS_SHIFT; + + r = readfpsr(); + r &= ~ex; + r |= (*flagp << FE_FLAGS_SHIFT) & ex; + writefpsr(r); + + /* Success */ + return 0; +} + +/* + * The feraiseexcept() function raises the supported floating-point exceptions + * represented by the argument `excepts'. + * + * The order in which these floating-point exceptions are raised is unspecified + * (by the standard). + */ +int +feraiseexcept(int excepts) +{ + volatile double d; + int ex; + + _DIAGASSERT((excepts & ~FE_ALL_EXCEPT) == 0); + + ex = excepts & FE_ALL_EXCEPT; + + /* + * With a compiler that supports the FENV_ACCESS pragma properly, simple + * expressions like '0.0 / 0.0' should be sufficient to generate traps. + * Unfortunately, we need to bring a volatile variable into the equation + * to prevent incorrect optimizations. + */ + if (ex & FE_INVALID) { + d = 0.0; + d = 0.0 / d; + } + if (ex & FE_DIVBYZERO) { + d = 0.0; + d = 1.0 / d; + } + if (ex & FE_OVERFLOW) { + d = 0x1.ffp1023; + d *= 2.0; + } + if (ex & FE_UNDERFLOW) { + d = 0x1p-1022; + d /= 0x1p1023; + } + if (ex & FE_INEXACT) { + d = 0x1p-1022; + d += 1.0; + } + + /* Success */ + return 0; +} + +/* + * The fetestexcept() function determines which of a specified subset of the + * floating-point exception flags are currently set. The `excepts' argument + * specifies the floating-point status flags to be queried. + */ +int +fetestexcept(int excepts) +{ + fexcept_t r; + + _DIAGASSERT((excepts & ~FE_ALL_EXCEPT) == 0); + + r = readfpsr(); + + return (r >> FE_FLAGS_SHIFT) & (excepts & FE_ALL_EXCEPT); +} + +/* + * The fegetround() function gets the current rounding direction. + */ +int +fegetround(void) +{ + fenv_t r; + + r = readfpsr(); + + return r & FE_ROUND_MASK; +} + +/* + * The fesetround() function establishes the rounding direction represented by + * its argument `round'. If the argument is not equal to the value of a rounding + * direction macro, the rounding direction is not changed. + */ +int +fesetround(int round) +{ + fenv_t r; + + _DIAGASSERT((round & ~FE_ROUND_MASK) == 0); + if (round & ~FE_ROUND_MASK) + return -1; + + r = readfpsr(); + r &= ~FE_ROUND_MASK; + r |= round; + writefpsr(r); + + /* Success */ + return 0; +} + +/* + * The fegetenv() function attempts to store the current floating-point + * environment in the object pointed to by envp. + */ +int +fegetenv(fenv_t *envp) +{ + _DIAGASSERT(envp != NULL); + + *envp = readfpsr(); + + /* Success */ + return 0; +} + + +/* + * The feholdexcept() function saves the current floating-point environment + * in the object pointed to by envp, clears the floating-point status flags, and + * then installs a non-stop (continue on floating-point exceptions) mode, if + * available, for all floating-point exceptions. + */ +int +feholdexcept(fenv_t *envp) +{ + fenv_t r; + + _DIAGASSERT(envp != NULL); + + r = readfpsr(); + *envp = r; + r &= ~FE_ALL_EXCEPT; + writefpsr(r); + + /* Success */ + return 0; +} + +/* + * The fesetenv() function attempts to establish the floating-point environment + * represented by the object pointed to by envp. The argument `envp' points + * to an object set by a call to fegetenv() or feholdexcept(), or equal a + * floating-point environment macro. The fesetenv() function does not raise + * floating-point exceptions, but only installs the state of the floating-point + * status flags represented through its argument. + */ +int +fesetenv(const fenv_t *envp) +{ + _DIAGASSERT(envp != NULL); + + writefpsr(*envp); + + /* Success */ + return 0; +} + + +/* + * The feupdateenv() function saves the currently raised floating-point + * exceptions in its automatic storage, installs the floating-point environment + * represented by the object pointed to by `envp', and then raises the saved + * floating-point exceptions. The argument `envp' shall point to an object set + * by a call to feholdexcept() or fegetenv(), or equal a floating-point + * environment macro. + */ +int +feupdateenv(const fenv_t *envp) +{ + fexcept_t r; + + _DIAGASSERT(envp != NULL); + + r = readfpsr(); + writefpsr(*envp); + + _DIAGASSERT((r & ~FE_ALL_EXCEPT) == 0); + feraiseexcept(r & FE_ALL_EXCEPT); + + /* Success */ + return 0; +} + +/* + * The following functions are extentions to the standard + */ +int +feenableexcept(int mask) +{ + fenv_t old_r, new_r; + + old_r = readfpsr(); + new_r = old_r | (mask & FE_ALL_EXCEPT); + writefpsr(new_r); + + return old_r & FE_ALL_EXCEPT; +} + +int +fedisableexcept(int mask) +{ + fenv_t old_r, new_r; + + old_r = readfpsr(); + new_r = old_r & ~(mask & FE_ALL_EXCEPT); + writefpsr(new_r); + + return old_r & FE_ALL_EXCEPT; +} + +int +fegetexcept(void) +{ + fenv_t r; + + r = readfpsr(); + return r & FE_ALL_EXCEPT; +} diff --git a/sys/arch/hppa/include/Makefile b/sys/arch/hppa/include/Makefile index 7f0cfc888773..8e1440393db2 100644 --- a/sys/arch/hppa/include/Makefile +++ b/sys/arch/hppa/include/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.11 2014/02/24 07:23:43 skrll Exp $ +# $NetBSD: Makefile,v 1.11.4.1 2015/01/20 20:57:24 snj Exp $ INCSDIR= /usr/include/hppa @@ -7,7 +7,7 @@ INCS= ansi.h aout_machdep.h asm.h autoconf.h \ cdefs.h cpu.h cpufunc.h \ disklabel.h \ eisa_machdep.h elf_machdep.h endian.h endian_machdep.h exec.h \ - float.h frame.h \ + fenv.h float.h frame.h \ ieee.h ieeefp.h intr.h intrdefs.h iomod.h isa_machdep.h \ int_const.h int_fmtio.h int_limits.h int_mwgwtypes.h int_types.h \ kcore.h \ diff --git a/sys/arch/hppa/include/fenv.h b/sys/arch/hppa/include/fenv.h new file mode 100644 index 000000000000..23a1bc8c3be5 --- /dev/null +++ b/sys/arch/hppa/include/fenv.h @@ -0,0 +1,60 @@ +/* $NetBSD: fenv.h,v 1.2.2.2 2015/01/20 20:57:24 snj Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#ifndef _HPPA_FENV_H_ +#define _HPPA_FENV_H_ + +#include + +typedef unsigned fenv_t; +typedef unsigned fexcept_t; + +#define FE_INEXACT 0x01 /* imprecise (loss of precision) */ +#define FE_UNDERFLOW 0x02 /* underflow exception */ +#define FE_OVERFLOW 0x04 /* overflow exception */ +#define FE_DIVBYZERO 0x08 /* divide-by-zero exception */ +#define FE_INVALID 0x10 /* invalid operation exception */ + +#define FE_ALL_EXCEPT 0x1f + +#define FE_TONEAREST (0) /* round to nearest representable number */ +#define FE_TOWARDZERO (1<<9) /* round to zero (truncate) */ +#define FE_UPWARD (2<<9) /* round toward positive infinity */ +#define FE_DOWNWARD (3<<9) /* round toward negative infinity */ + + +__BEGIN_DECLS + +/* Default floating-point environment */ +extern const fenv_t __fe_dfl_env; +#define FE_DFL_ENV (&__fe_dfl_env) + +__END_DECLS + +#endif /* !_HPPA_FENV_H_ */ diff --git a/sys/arch/hppa/include/ieeefp.h b/sys/arch/hppa/include/ieeefp.h index 5a0b4478b4b0..e729fb345d4f 100644 --- a/sys/arch/hppa/include/ieeefp.h +++ b/sys/arch/hppa/include/ieeefp.h @@ -1,4 +1,4 @@ -/* $NetBSD: ieeefp.h,v 1.4 2008/08/05 16:47:42 matt Exp $ */ +/* $NetBSD: ieeefp.h,v 1.4.56.1 2015/01/20 20:57:24 snj Exp $ */ /* * Written by J.T. Conklin, Apr 6, 1995 @@ -12,36 +12,20 @@ #if defined(_NETBSD_SOURCE) || defined(_ISOC99_SOURCE) -typedef int fenv_t; -typedef int fexcept_t; - -#define FE_INEXACT 0x01 /* imprecise (loss of precision) */ -#define FE_UNDERFLOW 0x02 /* underflow exception */ -#define FE_OVERFLOW 0x04 /* overflow exception */ -#define FE_DIVBYZERO 0x08 /* divide-by-zero exception */ -#define FE_INVALID 0x10 /* invalid operation exception */ - -#define FE_ALL_EXCEPT 0x1f - -#define FE_TONEAREST 0 /* round to nearest representable number */ -#define FE_TOWARDZERO 1 /* round to zero (truncate) */ -#define FE_UPWARD 2 /* round toward positive infinity */ -#define FE_DOWNWARD 3 /* round toward negative infinity */ - #if !defined(_ISOC99_SOURCE) typedef int fp_except; -#define FP_X_INV FE_INVALID /* invalid operation exception */ -#define FP_X_DZ FE_DIVBYZERO /* divide-by-zero exception */ -#define FP_X_OFL FE_OVERFLOW /* overflow exception */ -#define FP_X_UFL FE_UNDERFLOW /* underflow exception */ -#define FP_X_IMP FE_INEXACT /* imprecise (loss of precision) */ +#define FP_X_INV 0x10 /* invalid operation exception */ +#define FP_X_DZ 0x08 /* divide-by-zero exception */ +#define FP_X_OFL 0x04 /* overflow exception */ +#define FP_X_UFL 0x02 /* underflow exception */ +#define FP_X_IMP 0x01 /* imprecise (loss of precision) */ typedef enum { - FP_RN=FE_TONEAREST, /* round to nearest representable number */ - FP_RZ=FE_TOWARDZERO, /* round to zero (truncate) */ - FP_RP=FE_UPWARD, /* round toward positive infinity */ - FP_RM=FE_DOWNWARD /* round toward negative infinity */ + FP_RN=0, /* round to nearest representable number */ + FP_RZ=1, /* round to zero (truncate) */ + FP_RP=2, /* round toward positive infinity */ + FP_RM=3 /* round toward negative infinity */ } fp_rnd; #endif /* !_ISOC99_SOURCE */ diff --git a/tests/lib/libm/Makefile b/tests/lib/libm/Makefile index 26a77ac1eaca..1877f53c716e 100644 --- a/tests/lib/libm/Makefile +++ b/tests/lib/libm/Makefile @@ -1,10 +1,11 @@ -# $NetBSD: Makefile,v 1.26.2.1 2015/01/12 21:03:09 snj Exp $ +# $NetBSD: Makefile,v 1.26.2.2 2015/01/20 20:57:24 snj Exp $ .include TESTSDIR= ${TESTSBASE}/lib/libm .if ${MACHINE_CPU} == "aarch64" || ${MACHINE_CPU} == "arm" \ + || ${MACHINE_ARCH} == "hppa" \ || ${MACHINE_ARCH} == "sparc" || ${MACHINE_ARCH} == "sparc64" \ || ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" CPPFLAGS+= -DHAVE_FENV_H