Modified imx6_pll_power() arguments.
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hkenken
parent
c0590f9e77
commit
72d7c6b3de
@ -1,4 +1,4 @@
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/* $NetBSD: if_enet_imx6.c,v 1.1 2016/05/17 06:44:45 ryo Exp $ */
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/* $NetBSD: if_enet_imx6.c,v 1.2 2016/11/24 03:59:36 hkenken Exp $ */
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/*
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* Copyright (c) 2014 Ryo Shimizu <ryo@nerv.org>
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_enet_imx6.c,v 1.1 2016/05/17 06:44:45 ryo Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_enet_imx6.c,v 1.2 2016/11/24 03:59:36 hkenken Exp $");
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#include "locators.h"
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#include "imxccm.h"
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@ -93,7 +93,8 @@ enet_attach(device_t parent, device_t self, void *aux)
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#if NIMXCCM > 0
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/* PLL power up */
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if (imx6_pll_power(CCM_ANALOG_PLL_ENET, 1) != 0) {
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if (imx6_pll_power(CCM_ANALOG_PLL_ENET, 1,
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CCM_ANALOG_PLL_ENET_ENABLE) != 0) {
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aprint_error_dev(sc->sc_dev,
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"couldn't enable CCM_ANALOG_PLL_ENET\n");
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return;
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@ -1,4 +1,4 @@
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/* $NetBSD: imx6_ahcisata.c,v 1.3 2016/02/25 13:27:33 ryo Exp $ */
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/* $NetBSD: imx6_ahcisata.c,v 1.4 2016/11/24 03:59:36 hkenken Exp $ */
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/*
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* Copyright (c) 2014 Ryo Shimizu <ryo@nerv.org>
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.3 2016/02/25 13:27:33 ryo Exp $");
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__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.4 2016/11/24 03:59:36 hkenken Exp $");
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#include "locators.h"
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#include "opt_imx.h"
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@ -266,7 +266,8 @@ ixm6_ahcisata_init(struct imx_ahci_softc *sc)
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imx6_ccm_write(CCM_CCGR5, v | CCM_CCGR5_100M_CLK_ENABLE(3));
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/* PLL power up */
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if (imx6_pll_power(CCM_ANALOG_PLL_ENET, 1) != 0) {
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if (imx6_pll_power(CCM_ANALOG_PLL_ENET, 1,
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CCM_ANALOG_PLL_ENET_ENABLE_100M) != 0) {
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aprint_error_dev(sc->sc_dev,
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"couldn't enable CCM_ANALOG_PLL_ENET\n");
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return -1;
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@ -1,4 +1,4 @@
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/* $NetBSD: imx6_ccm.c,v 1.4 2015/01/09 09:50:46 ryo Exp $ */
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/* $NetBSD: imx6_ccm.c,v 1.5 2016/11/24 03:59:36 hkenken Exp $ */
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/*
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* Copyright (c) 2010-2012, 2014 Genetec Corporation. All rights reserved.
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@ -31,7 +31,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.4 2015/01/09 09:50:46 ryo Exp $");
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__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.5 2016/11/24 03:59:36 hkenken Exp $");
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#include "opt_imx.h"
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#include "opt_imx6clk.h"
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@ -851,7 +851,7 @@ imx6_get_clock(enum imx6_clock clk)
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}
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int
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imx6_pll_power(uint32_t pllreg, int on)
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imx6_pll_power(uint32_t pllreg, int on, uint32_t en)
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{
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uint32_t v;
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int timeout;
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@ -861,10 +861,10 @@ imx6_pll_power(uint32_t pllreg, int on)
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case CCM_ANALOG_PLL_USB2:
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v = imx6_ccm_read(pllreg);
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if (on) {
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v |= CCM_ANALOG_PLL_USBn_ENABLE;
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v |= en;
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v &= ~CCM_ANALOG_PLL_USBn_BYPASS;
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} else {
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v &= ~CCM_ANALOG_PLL_USBn_ENABLE;
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v &= ~en;
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}
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imx6_ccm_write(pllreg, v);
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return 0;
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@ -885,11 +885,13 @@ imx6_pll_power(uint32_t pllreg, int on)
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if (timeout <= 0)
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break;
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v |= CCM_ANALOG_PLL_ENET_ENABLE;
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if (on) {
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v &= ~CCM_ANALOG_PLL_ENET_BYPASS;
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v |= CCM_ANALOG_PLL_ENET_ENABLE;
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imx6_ccm_write(pllreg, v);
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v |= en;
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} else {
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v &= ~CCM_ANALOG_PLL_ENET_ENABLE;
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v &= ~en;
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}
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imx6_ccm_write(pllreg, v);
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return 0;
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@ -1,4 +1,4 @@
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/* $NetBSD: imx6_ccmreg.h,v 1.3 2015/01/09 09:50:46 ryo Exp $ */
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/* $NetBSD: imx6_ccmreg.h,v 1.4 2016/11/24 03:59:36 hkenken Exp $ */
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/*
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* Copyright (c) 2014 Ryo Shimizu <ryo@nerv.org>
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@ -79,7 +79,7 @@
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#define CCM_CBCMR_VPU_AXI_CLK_SEL __BITS(15, 14)
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#define CCM_CBCMR_PERIPH_CLK2_SEL __BITS(13, 12)
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#define CCM_CBCMR_VDOAXI_CLK_SEL __BIT(11)
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#define CCM_CBCMR_PCIE_AXI_CLK_SE __BIT(10)
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#define CCM_CBCMR_PCIE_AXI_CLK_SEL __BIT(10)
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#define CCM_CBCMR_GPU3D_SHADER_CLK_SEL __BITS(9, 8)
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#define CCM_CBCMR_GPU3D_CORE_CLK_SEL __BITS(5, 4)
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#define CCM_CBCMR_GPU3D_AXI_CLK_SEL __BIT(1)
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@ -140,6 +140,37 @@
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#define CCM_CSCDR3_IPU1_HSP_PODF __BITS(13, 11)
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#define CCM_CSCDR3_IPU1_HSP_CLK_SEL __BITS(10, 9)
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#define CCM_CCGR2 0x00000070
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#define CCM_CCGR2_IPSYNC_VDOA_IPG_CLK_ENABLE(n) __SHIFTIN(n, __BITS(27, 26))
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#define CCM_CCGR2_IPSYNC_IP2APB_TZASC2_IPG_CLK_ENABLE(n) __SHIFTIN(n, __BITS(25, 24))
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#define CCM_CCGR2_IPSYNC_IP2APB_TZASC1_IPG_CLK_ENABLE(n) __SHIFTIN(n, __BITS(23, 22))
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#define CCM_CCGR2_IPMUX3_CLK_ENABLE(n) __SHIFTIN(n, __BITS(21, 20))
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#define CCM_CCGR2_IPMUX2_CLK_ENABLE(n) __SHIFTIN(n, __BITS(19, 18))
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#define CCM_CCGR2_IPMUX1_CLK_ENABLE(n) __SHIFTIN(n, __BITS(17, 16))
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#define CCM_CCGR2_IOMUX_IPT_CLK_IO_CLK_ENABLE(n) __SHIFTIN(n, __BITS(15, 14))
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#define CCM_CCGR2_IIM_CLK_ENABLE(n) __SHIFTIN(n, __BITS(13, 12))
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#define CCM_CCGR2_I2C3_SERIAL_CLK_ENABLE(n) __SHIFTIN(n, __BITS(11, 10))
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#define CCM_CCGR2_I2C2_SERIAL_CLK_ENABLE(n) __SHIFTIN(n, __BITS(9, 8))
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#define CCM_CCGR2_I2C1_SERIAL_CLK_ENABLE(n) __SHIFTIN(n, __BITS(7, 6))
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#define CCM_CCGR2_HDMI_TX_ISFRCLK_ENABLE(n) __SHIFTIN(n, __BITS(5, 4))
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#define CCM_CCGR2_HDMI_TX_IAHBCLK_ENABLE(n) __SHIFTIN(n, __BITS(1, 0))
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#define CCM_CCGR4 0x00000078
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#define CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_CLK_ENABLE(N) __SHIFTIN(n, __BITS(31, 30))
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#define CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_CLK_ENABLE(n) __SHIFTIN(n, __BITS(29, 28))
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#define CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_CLK_ENABLE(n) __SHIFTIN(n, __BITS(27, 26))
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#define CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_CLK_ENABLE(n) __SHIFTIN(n, __BITS(25, 24))
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#define CCM_CCGR4_PWM4_CLK_ENABLE(n) __SHIFTIN(n, __BITS(23, 22))
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#define CCM_CCGR4_PWM3_CLK_ENABLE(n) __SHIFTIN(n, __BITS(21, 20))
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#define CCM_CCGR4_PWM2_CLK_ENABLE(n) __SHIFTIN(n, __BITS(19, 18))
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#define CCM_CCGR4_PWM1_CLK_ENABLE(n) __SHIFTIN(n, __BITS(17, 16))
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#define CCM_CCGR4_PL301_MX6QPER2_MAINCLK_ENABLE(n) __SHIFTIN(n, __BITS(15, 14))
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#define CCM_CCGR4_PL301_MX6QPER1_BCHCLK_ENABLE(n) __SHIFTIN(n, __BITS(13, 12))
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#define CCM_CCGR4_CG5_ENABLE(n) __SHIFTIN(n, __BITS(11, 10))
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#define CCM_CCGR4_PL301_MX6QFAST1_S133CLK_ENABLE(n) __SHIFTIN(n, __BITS(9, 8))
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#define CCM_CCGR4_CG3_ENABLE(n) __SHIFTIN(n, __BITS(7, 6))
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#define CCM_CCGR4_CG2_ENABLE(n) __SHIFTIN(n, __BITS(5, 4))
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#define CCM_CCGR4_CG1_ENABLE(n) __SHIFTIN(n, __BITS(3, 2))
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#define CCM_CCGR4_125M_ROOT_ENABLE(n) __SHIFTIN(n, __BITS(1, 0))
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#define CCM_CCGR5 0x0000007c
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#define CCM_CCGR5_UART_SERIAL_CLK_ENABLE(n) __SHIFTIN(n, __BITS(27, 26))
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#define CCM_CCGR5_UART_CLK_ENABLE(n) __SHIFTIN(n, __BITS(25, 24))
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@ -186,6 +217,7 @@
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#define CCM_ANALOG_PLL_SYS_SET 0x00004034
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#define CCM_ANALOG_PLL_SYS_CLR 0x00004038
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#define CCM_ANALOG_PLL_SYS_TOG 0x0000403c
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#define CCM_ANALOG_PLL_SYS_ENABLE __BIT(13)
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#define CCM_ANALOG_PLL_SYS_DIV_SELECT __BIT(0)
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#define CCM_ANALOG_PLL_SYS_SS 0x00004040
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#define CCM_ANALOG_PLL_SYS_NUM 0x00004050
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@ -256,7 +288,18 @@
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#define CCM_ANALOG_MISC0 0x00004150
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#define CCM_ANALOG_MISC0_SET 0x00004154
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#define CCM_ANALOG_MISC0_CLR 0x00004158
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#define CCM_ANALOG_MISC0_TOG 0x0000415C
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#define CCM_ANALOG_MISC0_TOG 0x0000415c
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#define CCM_ANALOG_MISC1 0x00004160
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#define CCM_ANALOG_MISC1_SET 0x00004164
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#define CCM_ANALOG_MISC1_CLR 0x00004168
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#define CCM_ANALOG_MISC1_TOG 0x0000416c
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#define CCM_ANALOG_MISC1_LVDS_CLK1_SRC __BITS(4, 0)
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#define CCM_ANALOG_MISC1_LVDS_CLK1_SRC_PCIE __SHIFTIN(0xa, CCM_ANALOG_MISC1_LVDS_CLK1_SRC)
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#define CCM_ANALOG_MISC1_LVDS_CLK1_SRC_SATA __SHIFTIN(0xb, CCM_ANALOG_MISC1_LVDS_CLK1_SRC)
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#define CCM_ANALOG_MISC1_LVDS_CLK1_OBEN __BIT(10)
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#define CCM_ANALOG_MISC1_LVDS_CLK2_OBEN __BIT(11)
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#define CCM_ANALOG_MISC1_LVDS_CLK1_IBEN __BIT(12)
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#define CCM_ANALOG_MISC1_LVDS_CLK2_IBEN __BIT(13)
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#define CCM_ANALOG_MISC2 0x00004170
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#define CCM_ANALOG_MISC2_SET 0x00004174
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#define CCM_ANALOG_MISC2_CLR 0x00004178
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@ -1,4 +1,4 @@
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/* $NetBSD: imx6_ccmvar.h,v 1.3 2015/01/09 09:50:46 ryo Exp $ */
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/* $NetBSD: imx6_ccmvar.h,v 1.4 2016/11/24 03:59:36 hkenken Exp $ */
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/*
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* Copyright (c) 2012 Genetec Corporation. All rights reserved.
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* Written by Hashimoto Kenichi for Genetec Corporation.
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@ -75,7 +75,7 @@ enum imx6_clock {
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uint32_t imx6_get_clock(enum imx6_clock);
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int imx6_set_clock(enum imx6_clock, uint32_t);
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int imx6_pll_power(uint32_t, int);
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int imx6_pll_power(uint32_t, int, uint32_t);
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uint32_t imx6_ccm_read(uint32_t);
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void imx6_ccm_write(uint32_t, uint32_t);
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@ -1,4 +1,4 @@
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/* $NetBSD: nitrogen6_usb.c,v 1.1 2014/09/25 05:05:28 ryo Exp $ */
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/* $NetBSD: nitrogen6_usb.c,v 1.2 2016/11/24 03:59:36 hkenken Exp $ */
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/*
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* Copyright (c) 2013 Genetec Corporation. All rights reserved.
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@ -27,7 +27,7 @@
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*
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: nitrogen6_usb.c,v 1.1 2014/09/25 05:05:28 ryo Exp $");
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__KERNEL_RCSID(0, "$NetBSD: nitrogen6_usb.c,v 1.2 2016/11/24 03:59:36 hkenken Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -127,7 +127,7 @@ init_otg(struct imxehci_softc *sc)
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imx6_ccm_write(USB_ANALOG_USB1_CHRG_DETECT,
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USB_ANALOG_USB_CHRG_DETECT_EN_B |
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USB_ANALOG_USB_CHRG_DETECT_CHK_CHRG_B);
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imx6_pll_power(CCM_ANALOG_PLL_USB1, 1);
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imx6_pll_power(CCM_ANALOG_PLL_USB1, 1, CCM_ANALOG_PLL_USBn_ENABLE);
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imx6_ccm_write(CCM_ANALOG_PLL_USB1_CLR,
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CCM_ANALOG_PLL_USBn_BYPASS);
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imx6_ccm_write(CCM_ANALOG_PLL_USB1_SET,
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