Don't use locations in .data to store exception temporaries, use decidicated
space in cpu_info instead. This also moves undefined_handler_address into cpu_info as well. Use the new armreg* inlines for getting TPIDRPRW register. Add MULTIPROCESSOR version of CPU_INFO_FOREACH
This commit is contained in:
matt
parent
a9ceb00145
commit
72c1c71ead
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@ -1,4 +1,4 @@
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/* $NetBSD: arm_machdep.c,v 1.34 2012/08/29 07:14:03 matt Exp $ */
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/* $NetBSD: arm_machdep.c,v 1.35 2012/08/29 23:10:31 matt Exp $ */
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/*
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* Copyright (c) 2001 Wasabi Systems, Inc.
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@ -78,7 +78,7 @@
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#include <sys/param.h>
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__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.34 2012/08/29 07:14:03 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.35 2012/08/29 23:10:31 matt Exp $");
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#include <sys/exec.h>
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#include <sys/proc.h>
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@ -100,12 +100,25 @@ __KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.34 2012/08/29 07:14:03 matt Exp $"
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char machine[] = MACHINE; /* from <machine/param.h> */
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char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */
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#ifdef __PROG32
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extern const uint32_t undefinedinstruction_bounce[];
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#endif
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/* Our exported CPU info; we can have only one. */
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struct cpu_info cpu_info_store = {
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.ci_cpl = IPL_HIGH,
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.ci_curlwp = &lwp0,
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#ifdef __PROG32
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.ci_undefsave[2] = (register_t) undefinedinstruction_bounce,
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#endif
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};
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#ifdef MULTIPROCESSOR
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struct cpu_info *cpu_info[MAXCPUS] = {
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[0] = &cpu_info_store
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};
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#endif
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const pcu_ops_t * const pcu_ops_md_defs[PCU_UNIT_COUNT] = {
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#if defined(FPU_VFP)
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[PCU_FPU] = &arm_vfp_ops,
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@ -1,4 +1,4 @@
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/* $NetBSD: exception.S,v 1.16 2008/04/27 18:58:44 matt Exp $ */
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/* $NetBSD: exception.S,v 1.17 2012/08/29 23:10:31 matt Exp $ */
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/*
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* Copyright (c) 1994-1997 Mark Brinicombe.
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@ -50,7 +50,7 @@
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#include <machine/cpu.h>
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#include <machine/frame.h>
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RCSID("$NetBSD: exception.S,v 1.16 2008/04/27 18:58:44 matt Exp $")
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RCSID("$NetBSD: exception.S,v 1.17 2012/08/29 23:10:31 matt Exp $")
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.text
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.align 0
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@ -213,16 +213,13 @@ exception_exit:
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*/
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ASENTRY_NP(undefined_entry)
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stmfd sp!, {r0, r1}
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ldr r0, Lundefined_handler_indirection
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GET_CURCPU(r0)
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ldr r1, [sp], #0x0004
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str r1, [r0, #0x0000]
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str r1, [r0, #CI_UNDEFSAVE]!
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ldr r1, [sp], #0x0004
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str r1, [r0, #0x0004]
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ldmia r0, {r0, r1, pc}
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Lundefined_handler_indirection:
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.word Lundefined_handler_indirection_data
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/*
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* assembly bounce code for calling the kernel
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* undefined instruction handler. This uses
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@ -236,20 +233,3 @@ ENTRY_NP(undefinedinstruction_bounce)
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mov r0, sp
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adr lr, exception_exit
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b _C_LABEL(undefinedinstruction)
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.data
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.align 0
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/*
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* Indirection data
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* 2 words use for preserving r0 and r1
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* 3rd word contains the undefined handler address.
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*/
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Lundefined_handler_indirection_data:
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.word 0
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.word 0
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.global _C_LABEL(undefined_handler_address)
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_C_LABEL(undefined_handler_address):
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.word _C_LABEL(undefinedinstruction_bounce)
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.50 2012/08/29 07:09:12 matt Exp $
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# $NetBSD: genassym.cf,v 1.51 2012/08/29 23:10:31 matt Exp $
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# Copyright (c) 1982, 1990 The Regents of the University of California.
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# All rights reserved.
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@ -74,6 +74,7 @@ define KERNEL_BASE KERNEL_BASE
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define VM_MIN_ADDRESS VM_MIN_ADDRESS
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define VM_MAXUSER_ADDRESS VM_MAXUSER_ADDRESS
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define PV_PA offsetof(pv_addr_t, pv_pa)
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define PMAP_DOMAIN_KERNEL PMAP_DOMAIN_KERNEL
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define DOMAIN_CLIENT DOMAIN_CLIENT
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define L1_S_PROTO_generic L1_S_PROTO_generic
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@ -163,12 +164,14 @@ define CI_ASTPENDING offsetof(struct cpu_info, ci_astpending)
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define CI_WANT_RESCHED offsetof(struct cpu_info, ci_want_resched)
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define CI_INTR_DEPTH offsetof(struct cpu_info, ci_intr_depth)
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define CI_MTX_COUNT offsetof(struct cpu_info, ci_mtx_count)
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define CI_UNDEFSAVE offsetof(struct cpu_info, ci_undefsave[0])
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if defined(EXEC_AOUT)
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define CI_CTRL offsetof(struct cpu_info, ci_ctrl)
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endif
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ifdef __HAVE_FAST_SOFTINTS
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define CI_SOFTINTS offsetof(struct cpu_info, ci_softints)
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endif
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define CI_IDLELWP offsetof(struct cpu_info, ci_data.cpu_idlelwp)
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define CI_CC_NTRAP offsetof(struct cpu_info, ci_data.cpu_ntrap)
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define CI_CC_NINTR offsetof(struct cpu_info, ci_data.cpu_nintr)
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define CI_CC_NSOFT offsetof(struct cpu_info, ci_data.cpu_nsoft)
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.h,v 1.12 2012/08/29 19:10:16 matt Exp $ */
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/* $NetBSD: machdep.h,v 1.13 2012/08/29 23:10:31 matt Exp $ */
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#ifndef _ARM32_BOOT_MACHDEP_H_
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#define _ARM32_BOOT_MACHDEP_H_
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@ -27,7 +27,8 @@ extern paddr_t cpu_reset_address_paddr;
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extern u_int data_abort_handler_address;
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extern u_int prefetch_abort_handler_address;
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extern u_int undefined_handler_address;
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//extern u_int undefined_handler_address;
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#define undefined_handler_address (curcpu()->ci_undefsave[2])
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extern char *booted_kernel;
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@ -90,7 +90,7 @@ extern int cpu_do_powersave;
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#ifdef _LOCORE
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#if defined(_ARM_ARCH_6)
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#define IRQdisable cprid i
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#define IRQdisable cpsid i
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#define IRQenable cpsie i
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#elif defined(__PROG32)
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#define IRQdisable \
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@ -219,13 +219,12 @@ void arm32_vector_init(vaddr_t, int);
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*/
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static inline int curcpl(void);
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static inline void set_curcpl(int);
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#ifdef __HAVE_FAST_SOFTINTS
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static inline void cpu_dosoftints(void);
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#endif
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#include <sys/device_if.h>
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#include <sys/evcnt.h>
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#include <sys/cpu_data.h>
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struct cpu_info {
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struct cpu_data ci_data; /* MI per-cpu data */
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device_t ci_dev; /* Device corresponding to this CPU */
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@ -244,33 +243,31 @@ struct cpu_info {
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volatile uint32_t ci_softints;
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#endif
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lwp_t *ci_curlwp; /* current lwp */
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#ifdef _ARM_ARCH_6
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uint32_t ci_ccnt_freq; /* cycle count frequency */
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#endif
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struct evcnt ci_arm700bugcount;
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int32_t ci_mtx_count;
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int ci_mtx_oldspl;
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register_t ci_undefsave[3];
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uint32_t ci_vfp_id;
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#ifdef MULTIPROCESSOR
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#if defined(_ARM_ARCH_7)
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uint64_t ci_lastintr;
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#endif
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#if defined(MP_CPU_INFO_MEMBERS)
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MP_CPU_INFO_MEMBERS
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#endif
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};
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#ifndef MULTIPROCESSOR
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extern struct cpu_info cpu_info_store;
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#if defined(TPIDRPRW_IS_CURLWP)
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static inline struct lwp *
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_curlwp(void)
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{
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struct lwp *l;
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__asm("mrc\tp15, 0, %0, c13, c0, 4" : "=r"(l));
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return l;
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return (struct lwp *) armreg_tpidrprw_read();
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}
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static inline void
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_curlwp_set(struct lwp *l)
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{
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__asm("mcr\tp15, 0, %0, c13, c0, 4" : "=r"(l));
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armreg_tpidrprw_write((uintptr_t)l);
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}
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#define curlwp (_curlwp())
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@ -283,19 +280,35 @@ curcpu(void)
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static inline struct cpu_info *
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curcpu(void)
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{
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struct cpu_info *ci;
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__asm("mrc\tp15, 0, %0, c13, c0, 4" : "=r"(ci));
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return ci;
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return (struct cpu_info *) armreg_tpidrprw_read();
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}
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#else
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#elif !defined(MULTIPROCESSOR)
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#define curcpu() (&cpu_info_store)
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#else
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#error MULTIPROCESSOR requires TPIDRPRW_IS_CURLWP or TPIDRPRW_IS_CURCPU
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#endif /* !TPIDRPRW_IS_CURCPU && !TPIDRPRW_IS_CURLWP */
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#ifndef curlwp
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#define curlwp (curcpu()->ci_curlwp)
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#endif
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#define cpu_number() 0
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#define CPU_INFO_ITERATOR int
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#if defined(MULTIPROCESSOR)
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extern struct cpu_info *cpu_info[];
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#define cpu_number() (curcpu()->ci_cpuid)
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void cpu_boot_secondary_processors(void);
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#define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0)
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#define CPU_INFO_FOREACH(cii, ci) \
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cii = 0, ci = cpu_info[0]; cii < ncpu && (ci = cpu_info[cii]) != NULL; cii++
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#else
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#define cpu_number() 0
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#define CPU_IS_PRIMARY(ci) true
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#define CPU_INFO_FOREACH(cii, ci) \
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cii = 0, ci = curcpu(); ci != NULL; ci = NULL
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#endif
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#define LWP0_CPU_INFO (&cpu_info_store)
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#endif /* !MULTIPROCESSOR */
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static inline int
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curcpl(void)
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@ -309,16 +322,18 @@ set_curcpl(int pri)
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curcpu()->ci_cpl = pri;
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}
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#ifdef __HAVE_FAST_SOFTINTS
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void dosoftints(void);
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static inline void
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cpu_dosoftints(void)
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{
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#ifdef __HAVE_FAST_SOFTINTS
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void dosoftints(void);
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#ifndef __HAVE_PIC_FAST_SOFTINTS
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struct cpu_info * const ci = curcpu();
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if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0)
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dosoftints();
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}
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#endif
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#endif
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}
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#ifdef __PROG32
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void cpu_proc_fork(struct proc *, struct proc *);
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* Scheduling glue
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*/
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#define setsoftast() (curcpu()->ci_astpending = 1)
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#define setsoftast() (curcpu()->ci_astpending = 1)
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/*
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* Notify the current process (p) that it has a signal pending,
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* process as soon as possible.
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*/
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#define cpu_signotify(l) setsoftast()
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#define cpu_signotify(l) setsoftast()
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/*
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* Give a profiling tick to the current process when the user profiling
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@ -346,6 +361,12 @@ void cpu_proc_fork(struct proc *, struct proc *);
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*/
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#define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, setsoftast())
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/*
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* We've already preallocated the stack for the idlelwps for additional CPUs.
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* This hook allows to return them.
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*/
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vaddr_t cpu_uarea_alloc_idlelwp(struct cpu_info *);
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#ifndef acorn26
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/*
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* cpu device glue (belongs in cpuvar.h)
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