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cpu_load_pmap: disable interrupts. add a comment to explain why. PR/44995

This commit is contained in:
yamt 2012-06-12 17:14:19 +00:00
parent be206df192
commit 721722497b
1 changed files with 12 additions and 8 deletions
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20
sys/arch/x86/x86/cpu.c
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@ -1,4 +1,4 @@
/* $NetBSD: cpu.c,v 1.98 2012/04/20 22:23:24 rmind Exp $ */
/* $NetBSD: cpu.c,v 1.99 2012/06/12 17:14:19 yamt Exp $ */
/*-
* Copyright (c) 2000-2012 NetBSD Foundation, Inc.
@ -62,7 +62,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.98 2012/04/20 22:23:24 rmind Exp $");
__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.99 2012/06/12 17:14:19 yamt Exp $");
#include "opt_ddb.h"
#include "opt_mpbios.h" /* for MPDEBUG */
@ -1228,16 +1228,20 @@ void
cpu_load_pmap(struct pmap *pmap, struct pmap *oldpmap)
{
#ifdef PAE
int i, s;
struct cpu_info *ci;
s = splvm(); /* just to be safe */
ci = curcpu();
struct cpu_info *ci = curcpu();
pd_entry_t *l3_pd = ci->ci_pae_l3_pdir;
int i;
/*
* disable interrupts to block TLB shootdowns, which can reload cr3.
* while this doesn't block NMIs, it's probably ok as NMIs unlikely
* reload cr3.
*/
x86_disable_intr();
for (i = 0 ; i < PDP_SIZE; i++) {
l3_pd[i] = pmap->pm_pdirpa[i] | PG_V;
}
splx(s);
x86_enable_intr();
tlbflush();
#else /* PAE */
lcr3(pmap_pdirpa(pmap, 0));