Use only one function to pin pages with Xen, and provide macros to
call it for different levels (L1 => L4). Replace all calls to xpq_queue_pin_table(...) in MD code with these new functions, with proper #ifdef'ing depending on $MACHINE. Rationale: - only one function to modify for logging - pushes responsibility to caller for chosing the proper pin level, rather than Xen internal functions; this makes the pin level explicit rather than implicit. Boot tested for dom0 i386/amd64, PAE included. No functional change intended.
This commit is contained in:
jym
parent
c93c31d5d2
commit
71d70847f6
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: pmap.c,v 1.116 2011/02/05 13:50:08 yamt Exp $ */
|
||||
/* $NetBSD: pmap.c,v 1.117 2011/02/10 00:23:14 jym Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2007 Manuel Bouyer.
|
||||
@ -142,7 +142,7 @@
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.116 2011/02/05 13:50:08 yamt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.117 2011/02/10 00:23:14 jym Exp $");
|
||||
|
||||
#include "opt_user_ldt.h"
|
||||
#include "opt_lockdebug.h"
|
||||
@ -1497,7 +1497,7 @@ pmap_bootstrap(vaddr_t kva_start)
|
||||
HYPERVISOR_update_va_mapping(xen_dummy_user_pgd + KERNBASE,
|
||||
pmap_pa2pte(xen_dummy_user_pgd) | PG_u | PG_V, UVMF_INVLPG);
|
||||
/* Pin as L4 */
|
||||
xpq_queue_pin_table(xpmap_ptom_masked(xen_dummy_user_pgd));
|
||||
xpq_queue_pin_l4_table(xpmap_ptom_masked(xen_dummy_user_pgd));
|
||||
#endif /* __x86_64__ */
|
||||
idt_vaddr = virtual_avail; /* don't need pte */
|
||||
idt_paddr = avail_start; /* steal a page */
|
||||
@ -2182,12 +2182,17 @@ pmap_pdp_ctor(void *arg, void *v, int flags)
|
||||
if (i == l2tol3(PDIR_SLOT_PTE))
|
||||
continue;
|
||||
#endif
|
||||
xpq_queue_pin_table(xpmap_ptom_masked(pdirpa));
|
||||
|
||||
#ifdef __x86_64__
|
||||
xpq_queue_pin_l4_table(xpmap_ptom_masked(pdirpa));
|
||||
#else
|
||||
xpq_queue_pin_l2_table(xpmap_ptom_masked(pdirpa));
|
||||
#endif
|
||||
}
|
||||
#ifdef PAE
|
||||
object = ((vaddr_t)pdir) + PAGE_SIZE * l2tol3(PDIR_SLOT_PTE);
|
||||
(void)pmap_extract(pmap_kernel(), object, &pdirpa);
|
||||
xpq_queue_pin_table(xpmap_ptom_masked(pdirpa));
|
||||
xpq_queue_pin_l2_table(xpmap_ptom_masked(pdirpa));
|
||||
#endif
|
||||
splx(s);
|
||||
#endif /* XEN */
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: xenpmap.h,v 1.24 2009/10/23 02:32:33 snj Exp $ */
|
||||
/* $NetBSD: xenpmap.h,v 1.25 2011/02/10 00:23:14 jym Exp $ */
|
||||
|
||||
/*
|
||||
*
|
||||
@ -40,10 +40,19 @@ void xpq_queue_pt_switch(paddr_t);
|
||||
void xpq_flush_queue(void);
|
||||
void xpq_queue_set_ldt(vaddr_t, uint32_t);
|
||||
void xpq_queue_tlb_flush(void);
|
||||
void xpq_queue_pin_table(paddr_t);
|
||||
void xpq_queue_pin_table(paddr_t, int);
|
||||
void xpq_queue_unpin_table(paddr_t);
|
||||
int xpq_update_foreign(paddr_t, pt_entry_t, int);
|
||||
|
||||
#define xpq_queue_pin_l1_table(pa) \
|
||||
xpq_queue_pin_table(pa, MMUEXT_PIN_L1_TABLE)
|
||||
#define xpq_queue_pin_l2_table(pa) \
|
||||
xpq_queue_pin_table(pa, MMUEXT_PIN_L2_TABLE)
|
||||
#define xpq_queue_pin_l3_table(pa) \
|
||||
xpq_queue_pin_table(pa, MMUEXT_PIN_L3_TABLE)
|
||||
#define xpq_queue_pin_l4_table(pa) \
|
||||
xpq_queue_pin_table(pa, MMUEXT_PIN_L4_TABLE)
|
||||
|
||||
extern unsigned long *xpmap_phys_to_machine_mapping;
|
||||
|
||||
/*
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: x86_xpmap.c,v 1.23 2010/12/20 21:18:45 jym Exp $ */
|
||||
/* $NetBSD: x86_xpmap.c,v 1.24 2011/02/10 00:23:14 jym Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2006 Mathieu Ropert <mro@adviseo.fr>
|
||||
@ -69,7 +69,7 @@
|
||||
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: x86_xpmap.c,v 1.23 2010/12/20 21:18:45 jym Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: x86_xpmap.c,v 1.24 2011/02/10 00:23:14 jym Exp $");
|
||||
|
||||
#include "opt_xen.h"
|
||||
#include "opt_ddb.h"
|
||||
@ -237,49 +237,28 @@ xpq_queue_pt_switch(paddr_t pa)
|
||||
}
|
||||
|
||||
void
|
||||
xpq_queue_pin_table(paddr_t pa)
|
||||
xpq_queue_pin_table(paddr_t pa, int lvl)
|
||||
{
|
||||
struct mmuext_op op;
|
||||
xpq_flush_queue();
|
||||
|
||||
XENPRINTK2(("xpq_queue_pin_table: 0x%" PRIx64 " 0x%" PRIx64 "\n",
|
||||
(int64_t)pa, (int64_t)pa));
|
||||
op.arg1.mfn = pa >> PAGE_SHIFT;
|
||||
XENPRINTK2(("xpq_queue_pin_l%d_table: %#" PRIxPADDR "\n",
|
||||
lvl + 1, pa));
|
||||
|
||||
op.arg1.mfn = pa >> PAGE_SHIFT;
|
||||
op.cmd = lvl;
|
||||
|
||||
#if defined(__x86_64__)
|
||||
op.cmd = MMUEXT_PIN_L4_TABLE;
|
||||
#else
|
||||
op.cmd = MMUEXT_PIN_L2_TABLE;
|
||||
#endif
|
||||
if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
|
||||
panic("xpq_queue_pin_table");
|
||||
}
|
||||
|
||||
#ifdef PAE
|
||||
static void
|
||||
xpq_queue_pin_l3_table(paddr_t pa)
|
||||
{
|
||||
struct mmuext_op op;
|
||||
xpq_flush_queue();
|
||||
|
||||
XENPRINTK2(("xpq_queue_pin_l2_table: 0x%" PRIx64 " 0x%" PRIx64 "\n",
|
||||
(int64_t)pa, (int64_t)pa));
|
||||
op.arg1.mfn = pa >> PAGE_SHIFT;
|
||||
|
||||
op.cmd = MMUEXT_PIN_L3_TABLE;
|
||||
if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
|
||||
panic("xpq_queue_pin_table");
|
||||
}
|
||||
#endif
|
||||
|
||||
void
|
||||
xpq_queue_unpin_table(paddr_t pa)
|
||||
{
|
||||
struct mmuext_op op;
|
||||
xpq_flush_queue();
|
||||
|
||||
XENPRINTK2(("xpq_queue_unpin_table: 0x%" PRIx64 " 0x%" PRIx64 "\n",
|
||||
(int64_t)pa, (int64_t)pa));
|
||||
XENPRINTK2(("xpq_queue_unpin_table: %#" PRIxPADDR "\n", pa));
|
||||
op.arg1.mfn = pa >> PAGE_SHIFT;
|
||||
op.cmd = MMUEXT_UNPIN_TABLE;
|
||||
if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
|
||||
@ -781,18 +760,18 @@ xen_bootstrap_tables (vaddr_t old_pgd, vaddr_t new_pgd,
|
||||
continue;
|
||||
#if 0
|
||||
__PRINTK(("pin L2 %d addr 0x%" PRIx64 "\n", i, (int64_t)addr));
|
||||
xpq_queue_pin_table(xpmap_ptom_masked(addr));
|
||||
xpq_queue_pin_l2_table(xpmap_ptom_masked(addr));
|
||||
#endif
|
||||
}
|
||||
if (final) {
|
||||
addr = (u_long)pde - KERNBASE + 3 * PAGE_SIZE;
|
||||
__PRINTK(("pin L2 %d addr %#" PRIxPADDR "\n", 2, addr));
|
||||
xpq_queue_pin_table(xpmap_ptom_masked(addr));
|
||||
xpq_queue_pin_l2_table(xpmap_ptom_masked(addr));
|
||||
}
|
||||
#if 0
|
||||
addr = (u_long)pde - KERNBASE + 2 * PAGE_SIZE;
|
||||
__PRINTK(("pin L2 %d addr 0x%" PRIx64 "\n", 2, (int64_t)addr));
|
||||
xpq_queue_pin_table(xpmap_ptom_masked(addr));
|
||||
xpq_queue_pin_l2_table(xpmap_ptom_masked(addr));
|
||||
#endif
|
||||
#else /* PAE */
|
||||
/* recursive entry in higher-level PD */
|
||||
@ -812,10 +791,12 @@ xen_bootstrap_tables (vaddr_t old_pgd, vaddr_t new_pgd,
|
||||
#endif
|
||||
/* Pin the PGD */
|
||||
__PRINTK(("pin PGD\n"));
|
||||
#ifdef PAE
|
||||
#ifdef __x86_64__
|
||||
xpq_queue_pin_l4_table(xpmap_ptom_masked(new_pgd - KERNBASE));
|
||||
#elif PAE
|
||||
xpq_queue_pin_l3_table(xpmap_ptom_masked(new_pgd - KERNBASE));
|
||||
#else
|
||||
xpq_queue_pin_table(xpmap_ptom_masked(new_pgd - KERNBASE));
|
||||
xpq_queue_pin_l2_table(xpmap_ptom_masked(new_pgd - KERNBASE));
|
||||
#endif
|
||||
|
||||
/* Save phys. addr of PDP, for libkvm. */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user