- Support 64-bit DMA addresses for the Tx and Rx ring addresses.
- g/c and unused define.
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c511514a83
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@ -1,4 +1,4 @@
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/* $NetBSD: gem.c,v 1.128 2020/02/07 00:56:48 thorpej Exp $ */
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/* $NetBSD: gem.c,v 1.129 2020/03/01 05:50:56 thorpej Exp $ */
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/*
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*
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: gem.c,v 1.128 2020/02/07 00:56:48 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: gem.c,v 1.129 2020/03/01 05:50:56 thorpej Exp $");
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#include "opt_inet.h"
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@ -815,8 +815,8 @@ gem_reset_rxdma(struct gem_softc *sc)
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GEM_CDSYNC(sc, BUS_DMASYNC_PREREAD);
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/* Reprogram Descriptor Ring Base Addresses */
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/* NOTE: we use only 32-bit DMA addresses here. */
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bus_space_write_4(t, h, GEM_RX_RING_PTR_HI, 0);
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bus_space_write_4(t, h, GEM_RX_RING_PTR_HI,
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((uint64_t)GEM_CDRXADDR(sc, 0)) >> 32);
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bus_space_write_4(t, h, GEM_RX_RING_PTR_LO, GEM_CDRXADDR(sc, 0));
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/* Redo ERX Configuration */
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@ -1171,11 +1171,12 @@ gem_init(struct ifnet *ifp)
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gem_setladrf(sc);
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/* step 6 & 7. Program Descriptor Ring Base Addresses */
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/* NOTE: we use only 32-bit DMA addresses here. */
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bus_space_write_4(t, h, GEM_TX_RING_PTR_HI, 0);
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bus_space_write_4(t, h, GEM_TX_RING_PTR_HI,
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((uint64_t)GEM_CDTXADDR(sc, 0)) >> 32);
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bus_space_write_4(t, h, GEM_TX_RING_PTR_LO, GEM_CDTXADDR(sc, 0));
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bus_space_write_4(t, h, GEM_RX_RING_PTR_HI, 0);
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bus_space_write_4(t, h, GEM_RX_RING_PTR_HI,
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((uint64_t)GEM_CDRXADDR(sc, 0)) >> 32);
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bus_space_write_4(t, h, GEM_RX_RING_PTR_LO, GEM_CDRXADDR(sc, 0));
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/* step 8. Global Configuration & Interrupt Mask */
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@ -1,4 +1,4 @@
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/* $NetBSD: gemvar.h,v 1.26 2019/09/13 07:55:06 msaitoh Exp $ */
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/* $NetBSD: gemvar.h,v 1.27 2020/03/01 05:50:56 thorpej Exp $ */
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/*
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*
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@ -246,8 +246,6 @@ struct gem_softc {
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#define GEM_CDTXADDR(sc, x) ((sc)->sc_cddma + GEM_CDTXOFF((x)))
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#define GEM_CDRXADDR(sc, x) ((sc)->sc_cddma + GEM_CDRXOFF((x)))
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#define GEM_CDADDR(sc) ((sc)->sc_cddma + GEM_CDOFF)
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#define GEM_CDTXSYNC(sc, x, n, ops) \
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do { \
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int __x, __n; \
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