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Import egcs-1.1 gcc, 19980816 snapshot

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This commit is contained in:
tv 1998-08-16 17:45:46 +00:00
parent 45ddfeba03
commit 6fe7eeb157
43 changed files with 2090 additions and 1286 deletions
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705
gnu/dist/gcc/config/sparc/sparc.h vendored
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File diff suppressed because it is too large Load Diff

2069
gnu/dist/gcc/config/sparc/sparc.md vendored
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File diff suppressed because it is too large Load Diff

21
gnu/dist/gcc/config/sparc/sun4o3.h vendored
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@ -5,6 +5,25 @@
fprintf (FILE, "\tsethi %%hi(LP%d),%%o0\n\tcall .mcount\n\tor %%lo(LP%d),%%o0,%%o0\n", \
(LABELNO), (LABELNO))
/* LINK_SPEC is needed only for Sunos 4. */
/* LINK_SPEC is needed only for SunOS 4. */
#undef LINK_SPEC
/* Override MACHINE_STATE_{SAVE,RESTORE} because we have special
traps available which can get and set the condition codes
reliably. */
#undef MACHINE_STATE_SAVE
#define MACHINE_STATE_SAVE(ID) \
unsigned long int ms_flags, ms_saveret; \
asm volatile("ta 0x20\n\t" \
"mov %%g1, %0\n\t" \
"mov %%g2, %1\n\t" \
: "=r" (ms_flags), "=r" (ms_saveret));
#undef MACHINE_STATE_RESTORE
#define MACHINE_STATE_RESTORE(ID) \
asm volatile("mov %0, %%g1\n\t" \
"mov %1, %%g2\n\t" \
"ta 0x21\n\t" \
: /* no outputs */ \
: "r" (ms_flags), "r" (ms_saveret));

19
gnu/dist/gcc/config/sparc/sunos4.h vendored
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@ -28,3 +28,22 @@ Boston, MA 02111-1307, USA. */
/* The Sun as doesn't like unaligned data. */
#define DWARF2_UNWIND_INFO 0
/* Override MACHINE_STATE_{SAVE,RESTORE} because we have special
traps available which can get and set the condition codes
reliably. */
#undef MACHINE_STATE_SAVE
#define MACHINE_STATE_SAVE(ID) \
unsigned long int ms_flags, ms_saveret; \
asm volatile("ta 0x20\n\t" \
"mov %%g1, %0\n\t" \
"mov %%g2, %1\n\t" \
: "=r" (ms_flags), "=r" (ms_saveret));
#undef MACHINE_STATE_RESTORE
#define MACHINE_STATE_RESTORE(ID) \
asm volatile("mov %0, %%g1\n\t" \
"mov %1, %%g2\n\t" \
"ta 0x21\n\t" \
: /* no outputs */ \
: "r" (ms_flags), "r" (ms_saveret));

20
gnu/dist/gcc/config/sparc/sysv4.h vendored
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@ -1,7 +1,6 @@
/* Target definitions for GNU compiler for Sparc running System V.4
Copyright (C) 1991, 1992, 1995, 1996 Free Software Foundation, Inc.
Written by Ron Guilmette (rfg@netcom.com).
Copyright (C) 1991, 92, 95, 96, 97, 1998 Free Software Foundation, Inc.
Contributed by Ron Guilmette (rfg@monkeys.com).
This file is part of GNU CC.
@ -34,6 +33,16 @@ Boston, MA 02111-1307, USA. */
#include "svr4.h"
/* ??? Put back the SIZE_TYPE/PTRDIFF_TYPE definitions set by sparc.h.
Why, exactly, is svr4.h messing with this? Seems like the chip
would know best. */
#undef SIZE_TYPE
#define SIZE_TYPE (TARGET_ARCH64 ? "long unsigned int" : "unsigned int")
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE (TARGET_ARCH64 ? "long int" : "int")
/* Undefined some symbols which are defined in "svr4.h" but which are
appropriate only for typical svr4 systems, but not for the specific
case of svr4 running on a Sparc. */
@ -136,10 +145,7 @@ do { ASM_OUTPUT_ALIGN ((FILE), Pmode == SImode ? 2 : 3); \
f0-f31 32-63 40-71
*/
#define DBX_REGISTER_NUMBER(REGNO) \
(((REGNO) < 32) ? (REGNO) \
: ((REGNO) < 63) ? ((REGNO) + 8) \
: (abort (), 0))
#define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 32 ? (REGNO) : (REGNO) + 8)
/* A set of symbol definitions for assembly pseudo-ops which will
get us switched to various sections of interest. These are used

2
gnu/dist/gcc/config/sparc/t-sparcbare vendored
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@ -1,4 +1,4 @@
# configuration file for a bare sparc cpu, aout format files
# configuration file for a bare sparc cpu
CROSS_LIBGCC1 = libgcc1-asm.a
LIB1ASMSRC = sparc/lb1spc.asm

4
gnu/dist/gcc/config/sparc/xm-linux.h vendored
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@ -1,4 +1,4 @@
/* Configuration for GCC for SPARC running Linux.
/* Configuration for GCC for SPARC running Linux-based GNU systems.
Copyright (C) 1996, 1997 Free Software Foundation, Inc.
Contributed by Eddie C. Dost (ecd@skynet.be)
@ -24,5 +24,3 @@ Boston, MA 02111-1307, USA. */
#include <stdlib.h>
#include <string.h>
#endif
#include <xm-linux.h>

3
gnu/dist/gcc/config/sparc/xm-pbd.h vendored
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@ -3,9 +3,6 @@
#include "sparc/xm-sparc.h"
#define USG
#define bcopy(a,b,c) memcpy (b,a,c)
#define bzero(a,b) memset (a,0,b)
#define bcmp(a,b,c) memcmp (a,b,c)
#ifndef __GNUC__
#define USE_C_ALLOCA

2
gnu/dist/gcc/config/sparc/xm-sol2.h vendored
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@ -1,5 +1,3 @@
#include "sparc/xm-sysv4.h"
/* If not compiled with GNU C, include the system's <alloca.h> header. */
#ifndef __GNUC__
#include <alloca.h>

4
gnu/dist/gcc/config/sparc/xm-sparc.h vendored
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@ -1,5 +1,5 @@
/* Configuration for GNU C-compiler for Sun Sparc.
Copyright (C) 1988, 1993, 1995 Free Software Foundation, Inc.
Copyright (C) 1988, 1993, 1995, 1997 Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@cygnus.com).
This file is part of GNU CC.
@ -43,8 +43,6 @@ Boston, MA 02111-1307, USA. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
#define HAVE_POPEN
/* If compiled with Sun CC, the use of alloca requires this #include. */
#ifndef __GNUC__
#include "alloca.h"

7
gnu/dist/gcc/config/sparc/xm-sysv4.h vendored
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@ -1,7 +1,6 @@
/* Configuration for GNU C-compiler for Sun Sparc running System V.4.
Copyright (C) 1992, 1993 Free Software Foundation, Inc.
Written by Ron Guilmette (rfg@netcom.com).
Copyright (C) 1992, 1993, 1998 Free Software Foundation, Inc.
Contributed by Ron Guilmette (rfg@netcom.com).
This file is part of GNU CC.
@ -44,8 +43,6 @@ Boston, MA 02111-1307, USA. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
#include "xm-svr4.h"
#ifndef __GNUC__
#define ONLY_INT_FIELDS
#endif

21
gnu/dist/gcc/config/spur/spur.c vendored
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@ -1,6 +1,6 @@
/* Subroutines for insn-output.c for SPUR. Adapted from routines for
the Motorola 68000 family.
Copyright (C) 1988, 1991 Free Software Foundation, Inc.
Copyright (C) 1988, 1991, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -20,6 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -152,10 +153,8 @@ output_move_double (operands)
{
if (GET_CODE (operands[1]) == CONST_DOUBLE)
{
latehalf[1] = gen_rtx (CONST_INT, VOIDmode,
CONST_DOUBLE_HIGH (operands[1]));
operands[1] = gen_rtx (CONST_INT, VOIDmode,
CONST_DOUBLE_LOW (operands[1]));
latehalf[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1]));
operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
}
else if (CONSTANT_P (operands[1]))
latehalf[1] = const0_rtx;
@ -225,10 +224,10 @@ output_fp_move_double (operands)
rtx xoperands[2];
int offset = - get_frame_size () - 8;
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset + 4);
xoperands[0] = GEN_INT (offset + 4);
output_asm_insn ("st_32 %1,r25,%0", xoperands);
xoperands[1] = operands[1];
xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset);
xoperands[0] = GEN_INT (offset);
output_asm_insn ("st_32 %1,r25,%0", xoperands);
xoperands[1] = operands[0];
output_asm_insn ("ld_dbl %1,r25,%0\n\tnop", xoperands);
@ -242,13 +241,13 @@ output_fp_move_double (operands)
{
rtx xoperands[2];
int offset = - get_frame_size () - 8;
xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset);
xoperands[0] = GEN_INT (offset);
xoperands[1] = operands[1];
output_asm_insn ("st_dbl %1,r25,%0", xoperands);
xoperands[1] = operands[0];
output_asm_insn ("ld_32 %1,r25,%0\n\tnop", xoperands);
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset + 4);
xoperands[0] = GEN_INT (offset + 4);
output_asm_insn ("ld_32 %1,r25,%0\n\tnop", xoperands);
return "";
}
@ -297,7 +296,7 @@ output_add_large_offset (target, reg, offset)
(unsigned) (high + 0x2000) >= 0x4000;
high >>= 1, n += 1)
;
operands[2] = gen_rtx (CONST_INT, VOIDmode, high);
operands[2] = GEN_INT (high);
output_asm_insn ("add_nt r2,r0,%2", operands);
i = n;
while (i >= 3)
@ -309,7 +308,7 @@ output_add_large_offset (target, reg, offset)
output_asm_insn ("add_nt %0,r2,%1", operands);
if (offset - (high << n) != 0)
{
operands[2] = gen_rtx (CONST_INT, VOIDmode, offset - (high << n));
operands[2] = GEN_INT (offset - (high << n));
output_asm_insn ("add_nt %0,%0,%2", operands);
}
return "";

11
gnu/dist/gcc/config/spur/spur.h vendored
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@ -738,10 +738,11 @@ extern int current_function_pretend_args_size;
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE SImode
/* Define this if the tablejump instruction expects the table
to contain offsets from the address of the table.
Do not define this if the table should contain absolute addresses. */
/* #define CASE_VECTOR_PC_RELATIVE */
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
table.
Do not define this if the table should contain absolute addresses. */
/* #define CASE_VECTOR_PC_RELATIVE 1 */
/* Specify the tree operation to be used to convert reals to integers. */
#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
@ -946,7 +947,7 @@ extern int current_function_pretend_args_size;
(SPUR does not use such vectors,
but we must define this macro anyway.) */
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
/* This is how to output an assembler line

23
gnu/dist/gcc/config/spur/spur.md vendored
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@ -297,7 +297,7 @@
emit_insn (gen_rtx (SET, VOIDmode, subreg,
gen_rtx (ZERO_EXTRACT, SImode, tem,
gen_rtx (CONST_INT, VOIDmode, 8),
GEN_INT (8),
addr)));
}
else if (GET_CODE (operands[0]) == MEM)
@ -318,7 +318,7 @@
emit_insn (gen_rtx (SET, VOIDmode,
gen_rtx (ZERO_EXTRACT, SImode, tem,
gen_rtx (CONST_INT, VOIDmode, 8),
GEN_INT (8),
addr),
subreg));
emit_move_insn (gen_rtx (MEM, SImode, addr), tem);
@ -376,7 +376,7 @@
; && (unsigned) INTVAL (operands[1]) < 32"
; "*
;{
; operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) / 8);
; operands[1] = GEN_INT (INTVAL (operands[1]) / 8);
; return \"wr_insert 0,0,%1\;insert %0,%0,%2\";
;}")
@ -467,9 +467,8 @@
(set (mem:SI (match_dup 0))
(match_dup 2))]
""
" operands[5] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) & 255);
operands[6] = gen_rtx (CONST_INT, VOIDmode,
(INTVAL (operands[1]) >> 8) & 255);
" operands[5] = GEN_INT (INTVAL (operands[1]) & 255);
operands[6] = GEN_INT ((INTVAL (operands[1]) >> 8) & 255);
")
;; Main entry for generating insns to move halfwords.
@ -563,7 +562,7 @@
; && (unsigned) INTVAL (operands[1]) < 32"
; "*
;{
; operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) / 8);
; operands[1] = GEN_INT (INTVAL (operands[1]) / 8);
; return \"wr_insert 0,0,%1\;insert %0,%0,%2\";
;}")
@ -631,7 +630,7 @@
rtx xoperands[2];
int offset = - get_frame_size () - 8;
xoperands[1] = operands[1];
xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset);
xoperands[0] = GEN_INT (offset);
output_asm_insn (\"st_32 %1,r25,%0\", xoperands);
xoperands[1] = operands[0];
output_asm_insn (\"ld_sgl %1,r25,%0\;nop\", xoperands);
@ -645,7 +644,7 @@
{
rtx xoperands[2];
int offset = - get_frame_size () - 8;
xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset);
xoperands[0] = GEN_INT (offset);
xoperands[1] = operands[1];
output_asm_insn (\"st_sgl %1,r25,%0\", xoperands);
xoperands[1] = operands[0];
@ -705,7 +704,7 @@
else
operands[1] = gen_rtx (SUBREG, SImode, operands[1], 0);
operands[2] = force_reg (SImode, gen_rtx (CONST_INT, VOIDmode, 65535));
operands[2] = force_reg (SImode, GEN_INT (65535));
}")
(define_insn "zero_extendqihi2"
@ -744,8 +743,8 @@
operands[2] = gen_reg_rtx (SImode);
operands[3] = gen_reg_rtx (SImode);
operands[4] = force_reg (SImode, gen_rtx (CONST_INT, VOIDmode, 65535));
operands[5] = force_reg (SImode, gen_rtx (CONST_INT, VOIDmode, -32768));
operands[4] = force_reg (SImode, GEN_INT (65535));
operands[5] = force_reg (SImode, GEN_INT (-32768));
}")
(define_expand "extendqihi2"

7
gnu/dist/gcc/config/tahoe/tahoe.c vendored
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@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for Tahoe.
Copyright (C) 1989, 1991 Free Software Foundation, Inc.
Copyright (C) 1989, 1991, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -20,6 +20,7 @@ Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -51,7 +52,7 @@ Boston, MA 02111-1307, USA. */
rtx tahoe_reg_conversion_loc;
int
extendable_operand (op, mode)
extensible_operand (op, mode)
rtx op;
enum machine_mode mode;
{
@ -67,8 +68,6 @@ extendable_operand (op, mode)
/* since the modes are basically the same. I had to add a special case, */
/* though, for symbol references with offsets. */
#include <stdio.h>
print_operand_address (file, addr)
FILE *file;
register rtx addr;

10
gnu/dist/gcc/config/tahoe/tahoe.h vendored
View File

@ -575,9 +575,11 @@ enum reg_class {NO_REGS,GENERAL_REGS,FPP_REG,ALL_REGS,LIM_REG_CLASSES};
#define CASE_VECTOR_MODE HImode
/* each of the table elements in a case are relative to the jump address */
#define CASE_VECTOR_PC_RELATIVE
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
table.
Do not define this if the table should contain absolute addresses. */
#define CASE_VECTOR_PC_RELATIVE 1
/* tahoe case instructions just fall through to the next instruction */
/* if not satisfied. It doesn't support a default action */
@ -894,7 +896,7 @@ do { register int i; \
/* This is how to output an element of a case-vector that is relative. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
/* This is how to output an assembler line

22
gnu/dist/gcc/config/tahoe/tahoe.md vendored
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@ -1,5 +1,5 @@
;; Machine description for GNU compiler, Tahoe version
;; Copyright (C) 1989, 1994, 1996 Free Software Foundation, Inc.
;; Copyright (C) 1989, 1994, 1996, 1997 Free Software Foundation, Inc.
;; This file is part of GNU CC.
@ -1015,7 +1015,7 @@
"*
{
if (INTVAL (operands[1]) > 32767)
operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) + 0xffff0000);
operands[1] = GEN_INT (INTVAL (operands[1]) + 0xffff0000);
return \"cmpw %0,%1\";
}")
@ -1062,7 +1062,7 @@
"*
{
if (INTVAL (operands[1]) > 127)
operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) + 0xffffff00);
operands[1] = GEN_INT (INTVAL (operands[1]) + 0xffffff00);
return \"cmpb %0,%1\";
}")
@ -1143,7 +1143,7 @@
(define_insn "tsthi"
[(set (cc0)
(match_operand:HI 0 "extendable_operand" "m,!r"))]
(match_operand:HI 0 "extensible_operand" "m,!r"))]
"GET_MODE (operands[0]) != VOIDmode"
"*
{
@ -1179,7 +1179,7 @@
(define_insn "tstqi"
[(set (cc0)
(match_operand:QI 0 "extendable_operand" "m,!r"))]
(match_operand:QI 0 "extensible_operand" "m,!r"))]
"GET_MODE (operands[0]) != VOIDmode"
"*
{
@ -1591,7 +1591,7 @@
""
"*
{
operands[1] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[1]) + 4));
operands[1] = GEN_INT ((INTVAL (operands[1]) + 4));
if (GET_CODE(operands[0]) == MEM
&& CONSTANT_ADDRESS_P (XEXP(operands[0], 0))
&& INTVAL (operands[1]) < 64)
@ -1609,7 +1609,7 @@
""
"*
{
operands[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) + 4));
operands[2] = GEN_INT ((INTVAL (operands[2]) + 4));
if (GET_CODE(operands[1]) == MEM
&& CONSTANT_ADDRESS_P (XEXP(operands[1], 0))
&& INTVAL (operands[2]) < 64)
@ -2057,7 +2057,7 @@
; "*
;{
; operands[1]
; = gen_rtx (CONST_INT, VOIDmode, exact_log2 (INTVAL (operands[1])));
; = GEN_INT (exact_log2 (INTVAL (operands[1])));
; return \"bbs %1,%0,%l2\";
;}")
;
@ -2074,7 +2074,7 @@
; "*
;{
; operands[1]
; = gen_rtx (CONST_INT, VOIDmode, exact_log2 (INTVAL (operands[1])));
; = GEN_INT (exact_log2 (INTVAL (operands[1])));
; return \"bbc %1,%0,%l2\";
;}")
;
@ -2091,7 +2091,7 @@
; "*
;{
; operands[1]
; = gen_rtx (CONST_INT, VOIDmode, exact_log2 (INTVAL (operands[1])));
; = GEN_INT (exact_log2 (INTVAL (operands[1])));
; return \"bbc %1,%0,%l2\";
;}")
;
@ -2108,6 +2108,6 @@
; "*
;{
; operands[1]
; = gen_rtx (CONST_INT, VOIDmode, exact_log2 (INTVAL (operands[1])));
; = GEN_INT (exact_log2 (INTVAL (operands[1])));
; return \"bbs %1,%0,%l2\";
;}")

17
gnu/dist/gcc/config/v850/lib1funcs.asm vendored
View File

@ -89,10 +89,11 @@ ___mulsi3:
ble .L5
jmp [r31] /* return */
.size __mulsi3,.-__mulsi3
.size ___mulsi3,.-___mulsi3
#endif
#ifdef L_udivsi3
.text
.global ___udivsi3
___udivsi3:
mov 1,r12
@ -126,7 +127,7 @@ ___udivsi3:
bne .L9
.L8:
jmp [r31]
.size __udivsi3,.-__udivsi3
.size ___udivsi3,.-___udivsi3
#endif
#ifdef L_divsi3
@ -157,7 +158,7 @@ ___divsi3:
ld.w 4[sp],r31
add 8,sp
jmp [r31]
.size __divsi3,.-__divsi3
.size ___divsi3,.-___divsi3
#endif
#ifdef L_umodsi3
@ -178,7 +179,7 @@ ___umodsi3:
ld.w 8[sp],r31
add 12,sp
jmp [r31]
.size __umodsi3,.-__umodsi3
.size ___umodsi3,.-___umodsi3
#endif /* L_umodsi3 */
#ifdef L_modsi3
@ -199,7 +200,7 @@ ___modsi3:
ld.w 8[sp],r31
add 12,sp
jmp [r31]
.size __modsi3,.-__modsi3
.size ___modsi3,.-___modsi3
#endif /* L_modsi3 */
#ifdef L_save_2
@ -1172,7 +1173,7 @@ __save_interrupt:
.size __save_interrupt,.-__save_interrupt
/* Restore saved registers, deallocate stack and return from the interrupt */
/* Called via: jr __return_interupt */
/* Called via: jr __return_interrupt */
.align 2
.globl __return_interrupt
.type __return_interrupt,@function
@ -1180,8 +1181,8 @@ __return_interrupt:
ld.w 0[sp],ep
ld.w 4[sp],gp
ld.w 8[sp],r1
ld.w 12[sp],r10
add 16,sp
ld.w 12[sp],r10
addi 16,sp,sp
reti
.size __return_interrupt,.-__return_interrupt
#endif /* L_save_interrupt */

2
gnu/dist/gcc/config/v850/t-v850 vendored
View File

@ -50,3 +50,5 @@ fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >>fp-bit.c
echo '#endif' >> fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
TCFLAGS = -Wa,-mwarn-signed-overflow -Wa,-mwarn-unsigned-overflow

42
gnu/dist/gcc/config/v850/v850.c vendored
View File

@ -399,16 +399,16 @@ print_operand (file, x, code)
else if (TDA_NAME_P (name))
fprintf (file, "tdaoff");
else
abort();
abort ();
}
else
abort();
abort ();
break;
case 'P':
if (special_symbolref_operand (x, VOIDmode))
output_addr_const (file, x);
else
abort();
abort ();
break;
case 'Q':
if (special_symbolref_operand (x, VOIDmode))
@ -429,10 +429,10 @@ print_operand (file, x, code)
else if (TDA_NAME_P (name))
fprintf (file, "ep");
else
abort();
abort ();
}
else
abort();
abort ();
break;
case 'R': /* 2nd word of a double. */
switch (GET_CODE (x))
@ -448,7 +448,7 @@ print_operand (file, x, code)
break;
case 'S':
{
/* if it's a referance to a TDA variable, use sst/sld vs. st/ld */
/* if it's a reference to a TDA variable, use sst/sld vs. st/ld */
if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), FALSE))
fputs ("s", file);
@ -584,7 +584,7 @@ print_operand_address (file, addr)
reg_name = "ep";
}
else
abort();
abort ();
fprintf (file, "%s(", off_name);
output_addr_const (file, addr);
@ -616,7 +616,7 @@ print_operand_address (file, addr)
reg_name = "ep";
}
else
abort();
abort ();
fprintf (file, "%s(", off_name);
output_addr_const (file, addr);
@ -2082,11 +2082,11 @@ construct_restore_jr (op)
last = 29;
}
/* Paranoia */
for (i = (first == 2 ? 20 : first + 1); i < 29; i++)
if ((mask & (1 << i)) == 0)
abort ();
/* Note, it is possible to have gaps in the register mask.
We ignore this here, and generate a JR anyway. We will
be popping more registers thatn is strictly necessary, but
it does save code space. */
if (first == last)
sprintf (buff, "jr __return_%s", reg_names [first]);
else
@ -2157,8 +2157,8 @@ pattern_is_ok_for_prologue (op, mode)
return 0;
/* If the register is being pushed somewhere other than the stack
space just aquired by the first operand then abandon this quest.
Note: the test is <= becuase both values are negative. */
space just acquired by the first operand then abandon this quest.
Note: the test is <= because both values are negative. */
if (INTVAL (XEXP (plus, 1))
<= INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)))
{
@ -2254,7 +2254,7 @@ construct_save_jarl (op)
if (mask & (1 << 31))
{
if (stack_bytes != -16)
abort();
abort ();
last = 31;
}
@ -2268,11 +2268,11 @@ construct_save_jarl (op)
last = 29;
}
/* Paranoia */
for (i = (first == 2 ? 20 : first + 1); i < 29; i++)
if ((mask & (1 << i)) == 0)
abort ();
/* Note, it is possible to have gaps in the register mask.
We ignore this here, and generate a JARL anyway. We will
be pushing more registers thatn is strictly necessary, but
it does save code space. */
if (first == last)
sprintf (buff, "jarl __save_%s, r10", reg_names [first]);
else

41
gnu/dist/gcc/config/v850/v850.h vendored
View File

@ -1,6 +1,5 @@
/* Definitions of target machine for GNU compiler.
NEC V850 series
Copyright (C) 1996, 1997 Free Software Foundation, Inc.
/* Definitions of target machine for GNU compiler. NEC V850 series
Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
This file is part of GNU CC.
@ -79,11 +78,11 @@ extern int target_flags;
* Doubles are normally 4 byte aligned, except in argument
lists where they are 8 byte aligned. Is the alignment
in the argument list based on the first parameter,
first stack parameter, etc etc.
first stack parameter, etc., etc.
* Passing/returning of large structures probably isn't the same
as GHS. We don't have enough documentation on their conventions
to be compatable.
to be compatible.
* Tests of SETUP_INCOMING_VARARGS need to be made runtime checks
since it depends on TARGET_GHS. */
@ -209,6 +208,8 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max];
LEVEL is the optimization level specified; 2 if `-O2' is
specified, 1 if `-O' is specified, and 0 if neither is specified.
SIZE is non-zero if `-Os' is specified, 0 otherwise.
You should not use this macro to change options that are not
machine-specific. These should uniformly selected by the same
optimization level on all supported machines. Use this macro to
@ -217,7 +218,7 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max];
*Do not examine `write_symbols' in this macro!* The debugging
options are not supposed to alter the generated code. */
#define OPTIMIZATION_OPTIONS(LEVEL) \
#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
{ \
if (LEVEL) \
target_flags |= (MASK_EP | MASK_PROLOG_FUNCTION); \
@ -348,7 +349,7 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max];
On the 850, we make the return registers first, then all of the volatile
registers, then the saved registers in reverse order to better save the
registers with an out of line function , and finnally the fixed
registers with an out of line function, and finally the fixed
registers. */
#define REG_ALLOC_ORDER \
@ -1007,7 +1008,7 @@ do { \
switch on CODE.
There aren't DImode MOD, DIV or MULT operations, so call them
very expensive. Everything else is pretty much a costant cost. */
very expensive. Everything else is pretty much a constant cost. */
#define RTX_COSTS(RTX,CODE,OUTER_CODE) \
case MOD: \
@ -1197,11 +1198,10 @@ do { char dstr[30]; \
#define ASM_CLOSE_PAREN ")"
/* This says how to output the assembler to define a global
uninitialized but not common symbol.
Try to use asm_output_bss to implement this macro. */
uninitialized but not common symbol. */
#define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
/* This is how to output the definition of a user-level label named NAME,
such as the label on a static function or variable NAME. */
@ -1287,7 +1287,7 @@ do { char dstr[30]; \
/* This is how to output an element of a case-vector that is relative. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
fprintf (FILE, "\t%s .L%d-.L%d\n", \
(TARGET_BIG_SWITCH ? ".long" : ".short"), \
VALUE, REL)
@ -1296,7 +1296,7 @@ do { char dstr[30]; \
if ((LOG) != 0) \
fprintf (FILE, "\t.align %d\n", (LOG))
/* We don't have to worry about dbx compatability for the v850. */
/* We don't have to worry about dbx compatibility for the v850. */
#define DEFAULT_GDB_EXTENSIONS 1
/* Use stabs debugging info by default. */
@ -1318,14 +1318,15 @@ do { char dstr[30]; \
jumps to the default label instead. */
/* #define CASE_DROPS_THROUGH */
/* We must use a PC relative entry for small tables. It would be more
efficient to use an absolute entry for big tables, but this is not
a runtime choice yet. */
#define CASE_VECTOR_PC_RELATIVE
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
table.
Do not define this if the table should contain absolute addresses. */
#define CASE_VECTOR_PC_RELATIVE 1
/* The switch instruction requires that the jump table immediately follow
it. */
#define JUMP_TABLES_IN_TEXT_SECTION
#define JUMP_TABLES_IN_TEXT_SECTION 1
/* svr4.h defines this assuming that 4 byte alignment is required. */
#undef ASM_OUTPUT_BEFORE_CASE_LABEL
@ -1386,7 +1387,7 @@ v850_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
/* Tell compiler we want to support GHS pragmas */
#define HANDLE_GHS_PRAGMA
/* The assembler op to to start the file. */
/* The assembler op to start the file. */
#define FILE_ASM_OP "\t.file\n"

12
gnu/dist/gcc/config/v850/v850.md vendored
View File

@ -46,7 +46,7 @@
;; none_0hit - insn does not affect cc but it does modify operand 0
;; This attribute is used to keep track of when operand 0 changes.
;; See the description of NOTICE_UPDATE_CC for more info.
;; set_znv - sets z,n,v to useable values; c is unknown.
;; set_znv - sets z,n,v to usable values; c is unknown.
;; set_zn - sets z,n to usable values; v,c is unknown.
;; compare - compare instruction
;; clobber - value of cc is unknown
@ -935,7 +935,7 @@
/* Shift index for the table array access. */
emit_insn (gen_ashlsi3 (reg, reg, GEN_INT (TARGET_BIG_SWITCH ? 2 : 1)));
/* Load the table address into a psuedo. */
/* Load the table address into a pseudo. */
emit_insn (gen_movsi (tableaddress,
gen_rtx (LABEL_REF, VOIDmode, operands[3])));
/* Add the table address to the index. */
@ -1201,8 +1201,8 @@
;; an interrupt function makes a call.
;; UNSPEC_VOLATILE is considered to use and clobber all hard registers and
;; all of memory. This blocks insns from being moved across this point.
;; This is needed because the rest of the compiler is not reading to handle
;; insns this compilcated
;; This is needed because the rest of the compiler is not ready to handle
;; insns this complicated.
(define_insn "save_all_interrupt"
[(unspec_volatile [(const_int 0)] 0)]
@ -1249,8 +1249,8 @@
;; Restore all registers saved when an interrupt function makes a call.
;; UNSPEC_VOLATILE is considered to use and clobber all hard registers and
;; all of memory. This blocks insns from being moved across this point.
;; This is needed because the rest of the compiler is not reading to handle
;; insns this compilcated
;; This is needed because the rest of the compiler is not ready to handle
;; insns this complicated.
(define_insn "restore_all_interrupt"
[(unspec_volatile [(const_int 0)] 1)]

3
gnu/dist/gcc/config/vax/ultrix.h vendored
View File

@ -7,3 +7,6 @@
#define PTRDIFF_TYPE "int"
#define WCHAR_TYPE "unsigned int"
#define WCHAR_TYPE_SIZE 32
/* True for Ultrix 4.3 and later and possibly earlier. */
#define HAVE_ATEXIT

18
gnu/dist/gcc/config/vax/vax.c vendored
View File

@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for Vax.
Copyright (C) 1987, 1994, 1995, 1997 Free Software Foundation, Inc.
Copyright (C) 1987, 1994, 1995, 1997, 1998 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -18,8 +18,8 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include <stdio.h>
#include "config.h"
#include <stdio.h>
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -614,34 +614,36 @@ check_float_value (mode, d, overflow)
if (overflow)
{
bcopy (&float_values[0], d, sizeof (REAL_VALUE_TYPE));
bcopy ((char *) &float_values[0], (char *) d, sizeof (REAL_VALUE_TYPE));
return 1;
}
if ((mode) == SFmode)
{
REAL_VALUE_TYPE r;
bcopy (d, &r, sizeof (REAL_VALUE_TYPE));
bcopy ((char *) d, (char *) &r, sizeof (REAL_VALUE_TYPE));
if (REAL_VALUES_LESS (float_values[0], r))
{
bcopy (&float_values[0], d, sizeof (REAL_VALUE_TYPE));
bcopy ((char *) &float_values[0], (char *) d,
sizeof (REAL_VALUE_TYPE));
return 1;
}
else if (REAL_VALUES_LESS (r, float_values[1]))
{
bcopy (&float_values[1], d, sizeof (REAL_VALUE_TYPE));
bcopy ((char *) &float_values[1], (char*) d,
sizeof (REAL_VALUE_TYPE));
return 1;
}
else if (REAL_VALUES_LESS (dconst0, r)
&& REAL_VALUES_LESS (r, float_values[2]))
{
bcopy (&dconst0, d, sizeof (REAL_VALUE_TYPE));
bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE));
return 1;
}
else if (REAL_VALUES_LESS (r, dconst0)
&& REAL_VALUES_LESS (float_values[3], r))
{
bcopy (&dconst0, d, sizeof (REAL_VALUE_TYPE));
bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE));
return 1;
}
}

25
gnu/dist/gcc/config/vax/vax.h vendored
View File

@ -144,6 +144,10 @@ extern int target_flags;
/* Let's keep the stack somewhat aligned. */
#define STACK_BOUNDARY 32
/* The table of an ADDR_DIFF_VEC must be contiguous with the case
opcode, it is part of the case instruction. */
#define ADDR_VEC_ALIGN(ADDR_VEC) 0
/* Standard register usage. */
@ -344,7 +348,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
return an rtx for the address of the word in the frame
that holds the dynamic chain--the previous frame's address. */
#define DYNAMIC_CHAIN_ADDRESS(frame) \
gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 12))
gen_rtx (PLUS, Pmode, frame, GEN_INT (12))
/* If we generate an insn to push BYTES bytes,
this says how many the stack pointer really advances by.
@ -446,7 +450,7 @@ gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 12))
/* This macro generates the assembly code for function entry.
FILE is a stdio stream to output the code to.
SIZE is an int: how many units of temporary storage to allocate,
adjusted by STARTING_FRAME_OFFSET to accomodate vms.h.
adjusted by STARTING_FRAME_OFFSET to accommodate vms.h.
Refer to the array `regs_ever_live' to determine which registers
to save; `regs_ever_live[I]' is nonzero if register number I
is ever used in the function. This macro is responsible for
@ -529,10 +533,10 @@ gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 12))
#define TRAMPOLINE_TEMPLATE(FILE) \
{ \
ASM_OUTPUT_SHORT (FILE, const0_rtx); \
ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x8fd0)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x8fd0)); \
ASM_OUTPUT_INT (FILE, const0_rtx); \
ASM_OUTPUT_BYTE (FILE, 0x50+STATIC_CHAIN_REGNUM); \
ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x9f17)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x9f17)); \
ASM_OUTPUT_INT (FILE, const0_rtx); \
}
@ -813,10 +817,11 @@ gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 12))
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE HImode
/* Define this if the case instruction expects the table
to contain offsets from the address of the table.
Do not define this if the table should contain absolute addresses. */
#define CASE_VECTOR_PC_RELATIVE
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
table.
Do not define this if the table should contain absolute addresses. */
#define CASE_VECTOR_PC_RELATIVE 1
/* Define this if the case instruction drops through after the table
when the index is out of range. Don't define it if the case insn
@ -1158,7 +1163,7 @@ do { char dstr[30]; \
/* This is how to output an element of a case-vector that is relative. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
/* This is how to output an assembler line
@ -1220,7 +1225,7 @@ do { \
fprintf (FILE, "\t.word 0x0ffc\n"); \
fprintf (FILE, "\taddl2 $%d,4(ap)\n", DELTA); \
fprintf (FILE, "\tjmp "); \
assemble_name (FILE, IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (FUNCTION))); \
assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \
fprintf (FILE, "+2\n"); \
} while (0)

42
gnu/dist/gcc/config/vax/vax.md vendored
View File

@ -1,5 +1,5 @@
;;- Machine description for GNU compiler, Vax Version
;; Copyright (C) 1987, 88, 91, 94, 95, 1996 Free Software Foundation, Inc.
;; Copyright (C) 1987, 88, 91, 94-96, 1998 Free Software Foundation, Inc.
;; This file is part of GNU CC.
@ -874,7 +874,7 @@
"*
{
if (CONST_DOUBLE_HIGH (operands[3]))
operands[3] = gen_rtx (CONST_INT, VOIDmode, CONST_DOUBLE_LOW (operands[3]));
operands[3] = GEN_INT (CONST_DOUBLE_LOW (operands[3]));
return \"emul %1,%2,%3,%0\";
}")
@ -956,7 +956,7 @@
}
if (GET_CODE (op1) == CONST_INT)
operands[1] = gen_rtx (CONST_INT, VOIDmode, ~INTVAL (op1));
operands[1] = GEN_INT (~INTVAL (op1));
else
operands[1] = expand_unop (SImode, one_cmpl_optab, op1, 0, 1);
}")
@ -978,7 +978,7 @@
}
if (GET_CODE (op1) == CONST_INT)
operands[1] = gen_rtx (CONST_INT, VOIDmode, 65535 & ~INTVAL (op1));
operands[1] = GEN_INT (65535 & ~INTVAL (op1));
else
operands[1] = expand_unop (HImode, one_cmpl_optab, op1, 0, 1);
}")
@ -1000,7 +1000,7 @@
}
if (GET_CODE (op1) == CONST_INT)
operands[1] = gen_rtx (CONST_INT, VOIDmode, 255 & ~INTVAL (op1));
operands[1] = GEN_INT (255 & ~INTVAL (op1));
else
operands[1] = expand_unop (QImode, one_cmpl_optab, op1, 0, 1);
}")
@ -1837,32 +1837,35 @@
;; Note that operand 1 is total size of args, in bytes,
;; and what the call insn wants is the number of words.
;; It is used in the call instruction as a byte, but in the addl2 as
;; a word. Since the only time we actually use it in the call instruction
;; is when it is a constant, SImode (for addl2) is the proper mode.
(define_insn "call_pop"
[(call (match_operand:QI 0 "memory_operand" "m")
(match_operand:QI 1 "general_operand" "g"))
(match_operand:SI 1 "const_int_operand" "n"))
(set (reg:SI 14) (plus:SI (reg:SI 14)
(match_operand:SI 3 "immediate_operand" "i")))]
""
"*
if (GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) > 255 * 4)
if (INTVAL (operands[1]) > 255 * 4)
/* Vax `calls' really uses only one byte of #args, so pop explicitly. */
return \"calls $0,%0\;addl2 %1,sp\";
operands[1] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[1]) + 3)/ 4);
operands[1] = GEN_INT ((INTVAL (operands[1]) + 3)/ 4);
return \"calls %1,%0\";
")
(define_insn "call_value_pop"
[(set (match_operand 0 "" "=g")
(call (match_operand:QI 1 "memory_operand" "m")
(match_operand:QI 2 "general_operand" "g")))
(match_operand:SI 2 "const_int_operand" "n")))
(set (reg:SI 14) (plus:SI (reg:SI 14)
(match_operand:SI 4 "immediate_operand" "i")))]
""
"*
if (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) > 255 * 4)
if (INTVAL (operands[2]) > 255 * 4)
/* Vax `calls' really uses only one byte of #args, so pop explicitly. */
return \"calls $0,%1\;addl2 %2,sp\";
operands[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) + 3)/ 4);
operands[2] = GEN_INT ((INTVAL (operands[2]) + 3)/ 4);
return \"calls %2,%1\";
")
@ -1870,28 +1873,28 @@
;; operands. In that case, combine may simplify the adjustment of sp.
(define_insn ""
[(call (match_operand:QI 0 "memory_operand" "m")
(match_operand:QI 1 "general_operand" "g"))
(match_operand:SI 1 "const_int_operand" "n"))
(set (reg:SI 14) (reg:SI 14))]
""
"*
if (GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) > 255 * 4)
if (INTVAL (operands[1]) > 255 * 4)
/* Vax `calls' really uses only one byte of #args, so pop explicitly. */
return \"calls $0,%0\;addl2 %1,sp\";
operands[1] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[1]) + 3)/ 4);
operands[1] = GEN_INT ((INTVAL (operands[1]) + 3)/ 4);
return \"calls %1,%0\";
")
(define_insn ""
[(set (match_operand 0 "" "=g")
(call (match_operand:QI 1 "memory_operand" "m")
(match_operand:QI 2 "general_operand" "g")))
(match_operand:SI 2 "const_int_operand" "n")))
(set (reg:SI 14) (reg:SI 14))]
""
"*
if (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) > 255 * 4)
if (INTVAL (operands[2]) > 255 * 4)
/* Vax `calls' really uses only one byte of #args, so pop explicitly. */
return \"calls $0,%1\;addl2 %2,sp\";
operands[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) + 3)/ 4);
operands[2] = GEN_INT ((INTVAL (operands[2]) + 3)/ 4);
return \"calls %2,%1\";
")
@ -2110,7 +2113,7 @@
unsigned long mask2 = (1 << (32 - INTVAL (operands[2]))) - 1;
if ((mask1 & mask2) != mask1)
operands[3] = gen_rtx (CONST_INT, VOIDmode, mask1 & mask2);
operands[3] = GEN_INT (mask1 & mask2);
return \"rotl %R2,%1,%0\;bicl2 %N3,%0\";
}")
@ -2128,7 +2131,6 @@
""
"*
{
operands[3] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (operands[3]) & ~((1 << INTVAL (operands[2])) - 1));
operands[3] = GEN_INT (INTVAL (operands[3]) & ~((1 << INTVAL (operands[2])) - 1));
return \"rotl %2,%1,%0\;bicl2 %N3,%0\";
}")

18
gnu/dist/gcc/config/vax/vms.h vendored
View File

@ -264,7 +264,7 @@ const_section () \
else \
data_section (); \
} \
if (*tree_code_type[(int) TREE_CODE (T)] == 'c') \
if (TREE_CODE_CLASS (TREE_CODE (T)) == 'c') \
{ \
if ((TREE_CODE (T) == STRING_CST && flag_writable_strings)) \
data_section (); \
@ -304,9 +304,9 @@ const_section () \
/* The following definitions are used in libgcc2.c with the __main
function. The _SHR symbol is used when the sharable image library
for libg++ is used - this is picked up automatically by the linker
and this symbol points to the start of the __CTOR_LIST__ from libg++.
If libg++ is not being used, then __CTOR_LIST_SHR__ occurs just after
for the C++ library is used - this is picked up automatically by the linker
and this symbol points to the start of __CTOR_LIST__ from the C++ library.
If the C++ library is not used, then __CTOR_LIST_SHR__ occurs just after
__CTOR_LIST__, and essentially points to the same list as __CTOR_LIST. */
#ifdef L__main
@ -357,3 +357,13 @@ do { \
} while (0)
#endif /* L__main */
/* Specify the list of include file directories. */
#define INCLUDE_DEFAULTS \
{ \
{ "GNU_GXX_INCLUDE:", "G++", 1, 1 }, \
{ "GNU_CC_INCLUDE:", "GCC", 0, 0 }, /* GNU includes */ \
{ "SYS$SYSROOT:[SYSLIB.]", 0, 0, 0 }, /* VAX-11 "C" includes */ \
{ ".", 0, 0, 1 }, /* Make normal VMS filespecs work. */ \
{ 0, 0, 0, 0 } \
}

4
gnu/dist/gcc/config/vax/xm-vaxv.h vendored
View File

@ -1,7 +1,3 @@
/* Config file for Vax running system V. */
#define USG
#define bcopy(a,b,c) memcpy (b,a,c)
#define bzero(a,b) memset (a,0,b)
#define bcmp(a,b,c) memcmp (a,b,c)

31
gnu/dist/gcc/config/vax/xm-vms.h vendored
View File

@ -22,6 +22,14 @@ Boston, MA 02111-1307, USA. */
#define FALSE 0
#define TRUE 1
/* Other configurations get these via autoconfig. */
#define STDC_HEADERS 1
#define HAVE_STDLIB_H 1
#define HAVE_STRING_H 1
#ifdef __DECC
#define HAVE_UNISTD_H 1
#endif
#if defined(VAXC) || defined(__DECC)
/* if compiling with VAXC, need to fix problem with <stdio.h>
which defines a macro called FILE_TYPE that breaks "tree.h".
@ -69,16 +77,6 @@ Boston, MA 02111-1307, USA. */
/* and define a local equivalent (sort of) for unlink */
#define unlink remove
/* Specify the list of include file directories. */
#define INCLUDE_DEFAULTS \
{ \
{ "GNU_GXX_INCLUDE:", 1, 1 }, \
{ "GNU_CC_INCLUDE:", 0, 0 }, /* GNU includes */ \
{ "SYS$SYSROOT:[SYSLIB.]", 0, 0 }, /* VAX-11 "C" includes */ \
{ ".", 0, 1 }, /* Make normal VMS filespecs work. */ \
{ 0, 0, 0 } \
}
/* Used by the preprocessor to limit size of disk I/O chunks.
64K - 1 is the maximum supported by VAXCRTL. Amounts in excess
of 35 blocks will bypass the VMS V6.x VIOC [Virtual I/O Cache],
@ -136,22 +134,16 @@ Boston, MA 02111-1307, USA. */
#define HAVE_VPRINTF
#if defined(VAXC) || defined(__DECC)
/* Customizations/kludges for building with DEC's VAX C compiler
rather than GCC. */
#define NO_SYS_PARAMS_H /* don't have <sys/params.h> */
#define NO_STAB_H /* don't have <stab.h> */
#define USE_C_ALLOCA /* using alloca.c */
#define QSORT_WORKAROUND /* do not use VAXCRTL's qsort */
/* use ANSI/SYSV style byte manipulation routines instead of BSD ones */
#define bcopy(s,d,n) memcpy((d),(s),(n))
#define bzero(d,n) memset((d),0,(n))
#define bcmp(l,r,n) memcmp((l),(r),(n))
#define index strchr
#define rindex strrchr
/* rename all too-long external symbol names to avoid warnings */
#define bc_check_for_full_enumeration_handling bc_check_for_full_enum_handling
#define check_for_full_enumeration_handling check_for_full_enum_handling
#define current_function_contains_functions curfunc_contains_functions
#define current_function_epilogue_delay_list curfunc_epilogue_delay_list
@ -165,11 +157,14 @@ Boston, MA 02111-1307, USA. */
#define current_function_uses_const_pool curfunc_uses_const_pool
#define current_function_uses_pic_offset_table curfunc_uses_pic_offset_table
#define dbxout_resume_previous_source_file dbxout_resume_previous_src_file
#define expand_builtin_extract_return_addr expand_builtin_extract_ret_addr
#define expand_builtin_set_return_addr_reg expand_builtin_set_ret_addr_reg
#define expand_start_loop_continue_elsewhere expnd_start_loop_cont_elsewhere
#define flag_schedule_insns_after_reload flag_sched_insns_after_reload
#define get_dynamic_handler_chain_libfunc get_dynamic_hndlr_chain_libfunc
#define lookup_name_current_level_global lookup_name_current_level_gbl
#define maybe_building_objc_message_expr maybe_building_objc_msg_expr
#define mesg_implicit_function_declaration mesg_implicit_func_declaration
#define output_deferred_addressed_constants output_deferred_addr_constants
#define protect_cleanup_actions_with_terminate protect_cleanup_act_w_terminate
#define reg_overlap_mentioned_for_reload_p reg_overlap_mtnd_for_reload_p

16
gnu/dist/gcc/config/we32k/we32k.c vendored
View File

@ -1,6 +1,6 @@
/* Subroutines for insn-output.c for AT&T we32000 Family.
Contributed by John Wehle (john@feith1.uucp)
Copyright (C) 1991-1992 Free Software Foundation, Inc.
Copyright (C) 1991, 1992, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -20,8 +20,8 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include <stdio.h>
#include "config.h"
#include <stdio.h>
#include "rtl.h"
#include "real.h"
@ -85,10 +85,8 @@ output_move_double (operands)
}
else if (GET_CODE (operands[1]) == CONST_DOUBLE)
{
lsw_operands[1] = gen_rtx (CONST_INT, SImode,
CONST_DOUBLE_HIGH (operands[1]));
operands[1] = gen_rtx (CONST_INT, SImode,
CONST_DOUBLE_LOW (operands[1]));
lsw_operands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1]));
operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
}
else if (GET_CODE (operands[1]) == CONST_INT)
{
@ -122,10 +120,8 @@ output_push_double (operands)
lsw_operands[0] = adj_offsettable_operand (operands[0], 4);
else if (GET_CODE (operands[0]) == CONST_DOUBLE)
{
lsw_operands[0] = gen_rtx (CONST_INT, SImode,
CONST_DOUBLE_HIGH (operands[0]));
operands[0] = gen_rtx (CONST_INT, SImode,
CONST_DOUBLE_LOW (operands[0]));
lsw_operands[0] = GEN_INT (CONST_DOUBLE_HIGH (operands[0]));
operands[0] = GEN_INT (CONST_DOUBLE_LOW (operands[0]));
}
else if (GET_CODE (operands[0]) == CONST_INT)
{

17
gnu/dist/gcc/config/we32k/we32k.h vendored
View File

@ -480,11 +480,11 @@ enum reg_class { NO_REGS, GENERAL_REGS,
#define TRAMPOLINE_TEMPLATE(FILE) \
{ \
ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x844f)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x844f)); \
ASM_OUTPUT_SHORT (FILE, const0_rtx); \
ASM_OUTPUT_SHORT (FILE, const0_rtx); \
ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0x48)); \
ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x247f)); \
ASM_OUTPUT_CHAR (FILE, GEN_INT (0x48)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x247f)); \
ASM_OUTPUT_SHORT (FILE, const0_rtx); \
ASM_OUTPUT_SHORT (FILE, const0_rtx); \
}
@ -625,10 +625,11 @@ enum reg_class { NO_REGS, GENERAL_REGS,
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE SImode
/* Define this if the tablejump instruction expects the table
to contain offsets from the address of the table.
Do not define this if the table should contain absolute addresses. */
/* #define CASE_VECTOR_PC_RELATIVE */
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
table.
Do not define this if the table should contain absolute addresses. */
/* #define CASE_VECTOR_PC_RELATIVE 1 */
/* Specify the tree operation to be used to convert reals to integers. */
#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
@ -888,7 +889,7 @@ do { \
/* This is how to output an element of a case-vector that is relative. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL)
/* This is how to output an assembler line

52
gnu/dist/gcc/config/we32k/we32k.md vendored
View File

@ -140,10 +140,8 @@
else
if (GET_CODE (operands[2]) == CONST_DOUBLE)
{
lsw_operands[2] = gen_rtx(CONST_INT, SImode,
CONST_DOUBLE_HIGH(operands[2]));
operands[2] = gen_rtx(CONST_INT, SImode,
CONST_DOUBLE_LOW(operands[2]));
lsw_operands[2] = GEN_INT (CONST_DOUBLE_HIGH(operands[2]));
operands[2] = GEN_INT (CONST_DOUBLE_LOW(operands[2]));
}
else
if (GET_CODE (operands[2]) == CONST_INT)
@ -192,10 +190,8 @@
else
if (GET_CODE (operands[1]) == CONST_DOUBLE)
{
lsw_operands[1] = gen_rtx(CONST_INT, SImode,
CONST_DOUBLE_HIGH(operands[1]));
operands[1] = gen_rtx(CONST_INT, SImode,
CONST_DOUBLE_LOW(operands[1]));
lsw_operands[1] = GEN_INT (CONST_DOUBLE_HIGH(operands[1]));
operands[1] = GEN_INT (CONST_DOUBLE_LOW(operands[1]));
}
else
if (GET_CODE (operands[1]) == CONST_INT)
@ -214,10 +210,8 @@
else
if (GET_CODE (operands[2]) == CONST_DOUBLE)
{
lsw_operands[2] = gen_rtx(CONST_INT, SImode,
CONST_DOUBLE_HIGH(operands[2]));
operands[2] = gen_rtx(CONST_INT, SImode,
CONST_DOUBLE_LOW(operands[2]));
lsw_operands[2] = GEN_INT (CONST_DOUBLE_HIGH(operands[2]));
operands[2] = GEN_INT (CONST_DOUBLE_LOW(operands[2]));
}
else
if (GET_CODE (operands[2]) == CONST_INT)
@ -310,10 +304,8 @@
else
if (GET_CODE (operands[2]) == CONST_DOUBLE)
{
lsw_operands[2] = gen_rtx(CONST_INT, SImode,
CONST_DOUBLE_HIGH(operands[2]));
operands[2] = gen_rtx(CONST_INT, SImode,
CONST_DOUBLE_LOW(operands[2]));
lsw_operands[2] = GEN_INT (CONST_DOUBLE_HIGH(operands[2]));
operands[2] = GEN_INT (CONST_DOUBLE_LOW(operands[2]));
}
else
if (GET_CODE (operands[2]) == CONST_INT)
@ -362,10 +354,8 @@
else
if (GET_CODE (operands[1]) == CONST_DOUBLE)
{
lsw_operands[1] = gen_rtx(CONST_INT, SImode,
CONST_DOUBLE_HIGH(operands[1]));
operands[1] = gen_rtx(CONST_INT, SImode,
CONST_DOUBLE_LOW(operands[1]));
lsw_operands[1] = GEN_INT (CONST_DOUBLE_HIGH(operands[1]));
operands[1] = GEN_INT (CONST_DOUBLE_LOW(operands[1]));
}
else
if (GET_CODE (operands[1]) == CONST_INT)
@ -384,10 +374,8 @@
else
if (GET_CODE (operands[2]) == CONST_DOUBLE)
{
lsw_operands[2] = gen_rtx(CONST_INT, SImode,
CONST_DOUBLE_HIGH(operands[2]));
operands[2] = gen_rtx(CONST_INT, SImode,
CONST_DOUBLE_LOW(operands[2]));
lsw_operands[2] = GEN_INT (CONST_DOUBLE_HIGH(operands[2]));
operands[2] = GEN_INT (CONST_DOUBLE_LOW(operands[2]));
}
else
if (GET_CODE (operands[2]) == CONST_INT)
@ -770,7 +758,7 @@
if (GET_CODE (operands[1]) == CONST_INT &&
((unsigned long)INTVAL (operands[1]) & 0x8000L))
operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) | 0xffff0000L);
operands[1] = GEN_INT (INTVAL(operands[1]) | 0xffff0000L);
output_asm_insn(\"CMPH %1, %0\",operands);
@ -786,7 +774,7 @@
if (GET_CODE (operands[1]) == CONST_INT &&
((unsigned long)INTVAL (operands[1]) & 0x80L))
operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) | 0xffffff00L);
operands[1] = GEN_INT (INTVAL(operands[1]) | 0xffffff00L);
output_asm_insn(\"CMPB {sbyte}%1, {sbyte}%0\",operands);
@ -910,7 +898,7 @@
"*
{
operands[2] = gen_rtx(CONST_INT, SImode, INTVAL(operands[2]) - 1);
operands[2] = GEN_INT (INTVAL(operands[2]) - 1);
output_asm_insn(\"EXTFW %2, %3, %1, %0\",operands);
return \"\";
@ -925,7 +913,7 @@
"*
{
operands[2] = gen_rtx(CONST_INT, SImode, INTVAL(operands[2]) - 1);
operands[2] = GEN_INT (INTVAL(operands[2]) - 1);
output_asm_insn(\"EXTFH %2, %3, {uhalf}%1, {uword}%0\",operands);
return \"\";
@ -940,7 +928,7 @@
"*
{
operands[2] = gen_rtx(CONST_INT, SImode, INTVAL(operands[2]) - 1);
operands[2] = GEN_INT (INTVAL(operands[2]) - 1);
output_asm_insn(\"EXTFB %2, %3, {ubyte}%1, {uword}%0\",operands);
return \"\";
@ -955,7 +943,7 @@
"*
{
operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) - 1);
operands[1] = GEN_INT (INTVAL(operands[1]) - 1);
output_asm_insn(\"INSFW %1, %2, %3, %0\",operands);
return \"\";
@ -970,7 +958,7 @@
"*
{
operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) - 1);
operands[1] = GEN_INT (INTVAL(operands[1]) - 1);
output_asm_insn(\"INSFH %1, %2, {uword}%3, {uhalf}%0\",operands);
return \"\";
@ -985,7 +973,7 @@
"*
{
operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) - 1);
operands[1] = GEN_INT (INTVAL(operands[1]) - 1);
output_asm_insn(\"INSFB %1, %2, {uword}%3, {ubyte}%0\",operands);
return \"\";

7
gnu/dist/gcc/config/winnt/config-nt.sed vendored
View File

@ -13,7 +13,7 @@ s/$(srcdir)\/c-gperf/c-gperf/g
/^lang_specs_files=/ d
/^lang_options_files=/ d
/^version=/ c\
version=2.7.2
version=2.8.1
s/CC = cc/CC = cl/
s/^SHELL =.*/SHELL =/
s/CFLAGS = -g/CFLAGS =/
@ -38,7 +38,7 @@ GCC_FOR_TARGET = xgcc
ENQUIRE_LDFLAGS =
s/; *@true//
/> *stamp-objlist/ c\
echo.exe $(OBJS) $(BC_OBJS) | sed -e "s, \([a-z]\), ../\1,g" >stamp-objlist
echo.exe $(OBJS) | sed -e "s, \([a-z]\), ../\1,g" >stamp-objlist
/^OBJS.*stamp-objlist/ s?`cat ../stamp-objlist`?@../stamp-objlist?
s/^\(SUBDIR_OBSTACK *=\).*$/\1 ..\/obstack.o/
s/^\(SUBDIR_USE_ALLOCA *=\).*$/\1/
@ -90,9 +90,6 @@ USE_HOST_ALLOCA=alloca.obj
s/^ALLOCA =/ALLOCA = alloca.obj/
s/^ALLOCA_FINISH = true/ALLOCA_FINISH =/
s/ \.\// /
s/^bi-\([a-z]*\) *:/bi-\1.exe :/
s/ bi-\([a-z]*\)$/ bi-\1.exe/
s/ bi-\([a-z]*\) / bi-\1.exe /g
s/^gen\([a-z]*\) *:/gen\1.exe :/
s/ gen\([a-z]*\)$/ gen\1.exe/
s/ gen\([a-z]*\) / gen\1.exe /g

6
gnu/dist/gcc/config/winnt/win-nt.h vendored
View File

@ -1,6 +1,6 @@
/* Operating system specific defines to be used when targeting GCC for
Windows NT 3.x.
Copyright (C) 1994, 1995 Free Software Foundation, Inc.
Copyright (C) 1994, 1995, 1997 Free Software Foundation, Inc.
Contributed by Douglas B. Rupp (drupp@cs.washington.edu).
This file is part of GNU CC.
@ -29,7 +29,7 @@ Boston, MA 02111-1307, USA. */
#define LINK_SPEC "-stack 5000000,5000000 -noinhibit-exec %{g}"
#undef CPP_SPEC
#define CPP_SPEC "-lang-c-c++-comments"
#define CPP_SPEC ""
#undef STANDARD_EXEC_PREFIX
#define STANDARD_EXEC_PREFIX ""
@ -51,7 +51,7 @@ Boston, MA 02111-1307, USA. */
#undef INCLUDE_DEFAULTS
#define INCLUDE_DEFAULTS \
{ \
{ 0, 0, 0 } \
{ 0, 0, 0, 0 } \
}
#undef STDC_VALUE

8
gnu/dist/gcc/config/winnt/xm-winnt.h vendored
View File

@ -1,5 +1,5 @@
/* Configuration for GNU compiler for processor running Windows NT 3.x.
Copyright (C) 1993, 1995 Free Software Foundation, Inc.
Copyright (C) 1993, 1995, 1997 Free Software Foundation, Inc.
Contributed by Douglas B. Rupp (drupp@cs.washington.edu)
This file is part of GNU CC.
@ -42,11 +42,6 @@ Boston, MA 02111-1307, USA. */
#endif
#define NO_SYS_SIGLIST 1
#define bcmp(a,b,c) memcmp (a,b,c)
#define bcopy(a,b,c) memcpy (b,a,c)
#define bzero(a,b) memset (a,0,b)
#define index strchr
#define rindex strrchr
#define kill(a,b) raise(b)
#define OBJECT_SUFFIX ".obj"
@ -66,4 +61,3 @@ Boston, MA 02111-1307, USA. */
#define S_IRWXU S_IRUSR | S_IWUSR | S_IXUSR
#define S_ISREG(m) (((m)&S_IFMT) == S_IFREG)
#define S_ISDIR(m) (((m)&S_IFMT) == S_IFDIR)

2
gnu/dist/gcc/ginclude/ppc-asm.h vendored
View File

@ -1,5 +1,5 @@
/* PowerPC asm definitions for GNU C. */
/* Under winnt, 1) gas suppports the following as names and 2) in particular
/* Under winnt, 1) gas supports the following as names and 2) in particular
defining "toc" breaks the FUNC_START macro as ".toc" becomes ".2" */
#if !defined(__WINNT__)

2
gnu/dist/gcc/ginclude/stdarg.h vendored
View File

@ -96,7 +96,7 @@ void va_end (__gnuc_va_list); /* Defined in libgcc.a */
/* We cast to void * and then to TYPE * because this avoids
a warning about increasing the alignment requirement. */
#if defined (__arm__) || defined (__i386__) || defined (__i860__) || defined (__ns32000__) || defined (__vax__)
#if (defined (__arm__) && ! defined (__ARMEB__)) || defined (__i386__) || defined (__i860__) || defined (__ns32000__) || defined (__vax__)
/* This is for little-endian machines; small args are padded upward. */
#define va_arg(AP, TYPE) \
(AP = (__gnuc_va_list) ((char *) (AP) + __va_rounded_size (TYPE)), \

20
gnu/dist/gcc/ginclude/stdbool.h vendored Normal file
View File

@ -0,0 +1,20 @@
/* stdbool.h for GNU. */
#ifndef __STDBOOL_H__
#define __STDBOOL_H__ 1
/* The type `bool' must promote to `int' or `unsigned int'. The constants
`true' and `false' must have the value 0 and 1 respectively. */
typedef enum
{
false = 0,
true = 1
} bool;
/* The names `true' and `false' must also be made available as macros. */
#define false false
#define true true
/* Signal that all the definitions are present. */
#define __bool_true_false_are_defined 1
#endif /* stdbool.h */

19
gnu/dist/gcc/ginclude/stddef.h vendored
View File

@ -135,6 +135,7 @@ typedef __PTRDIFF_TYPE__ ptrdiff_t;
/* Define this type if we are doing the whole job,
or if we want this type in particular. */
#if defined (_STDDEF_H) || defined (__need_size_t)
#ifndef __size_t__ /* BeOS */
#ifndef _SIZE_T /* in case <sys/types.h> has defined it. */
#ifndef _SYS_SIZE_T_H
#ifndef _T_SIZE_
@ -148,6 +149,7 @@ typedef __PTRDIFF_TYPE__ ptrdiff_t;
#ifndef _GCC_SIZE_T
#ifndef _SIZET_
#ifndef __size_t
#define __size_t__ /* BeOS */
#define _SIZE_T
#define _SYS_SIZE_T_H
#define _T_SIZE_
@ -166,6 +168,9 @@ typedef __PTRDIFF_TYPE__ ptrdiff_t;
#endif
#if !(defined (__GNUG__) && defined (size_t))
typedef __SIZE_TYPE__ size_t;
#ifdef __BEOS__
typedef long ssize_t;
#endif /* __BEOS__ */
#endif /* !(defined (__GNUG__) && defined (size_t)) */
#endif /* __size_t */
#endif /* _SIZET_ */
@ -180,6 +185,7 @@ typedef __SIZE_TYPE__ size_t;
#endif /* _T_SIZE_ */
#endif /* _SYS_SIZE_T_H */
#endif /* _SIZE_T */
#endif /* __size_t__ */
#undef __need_size_t
#endif /* _STDDEF_H or __need_size_t. */
@ -192,6 +198,7 @@ typedef __SIZE_TYPE__ size_t;
/* Define this type if we are doing the whole job,
or if we want this type in particular. */
#if defined (_STDDEF_H) || defined (__need_wchar_t)
#ifndef __wchar_t__ /* BeOS */
#ifndef _WCHAR_T
#ifndef _T_WCHAR_
#ifndef _T_WCHAR
@ -204,6 +211,7 @@ typedef __SIZE_TYPE__ size_t;
#ifndef ___int_wchar_t_h
#ifndef __INT_WCHAR_T_H
#ifndef _GCC_WCHAR_T
#define __wchar_t__ /* BeOS */
#define _WCHAR_T
#define _T_WCHAR_
#define _T_WCHAR
@ -237,8 +245,12 @@ typedef _BSD_RUNE_T_ rune_t;
#endif
#ifndef __WCHAR_TYPE__
#ifdef __BEOS__
#define __WCHAR_TYPE__ unsigned char
#else
#define __WCHAR_TYPE__ int
#endif
#endif
#ifndef __cplusplus
typedef __WCHAR_TYPE__ wchar_t;
#endif
@ -254,6 +266,7 @@ typedef __WCHAR_TYPE__ wchar_t;
#endif
#endif
#endif
#endif /* __wchar_t__ */
#undef __need_wchar_t
#endif /* _STDDEF_H or __need_wchar_t. */
@ -271,7 +284,9 @@ typedef __WINT_TYPE__ wint_t;
/* In 4.3bsd-net2, leave these undefined to indicate that size_t, etc.
are already defined. */
#ifdef _ANSI_H_
/* BSD/OS 3.1 requires the MACHINE_ANSI_H check here. FreeBSD 2.x apparently
does not, even though there is a check for MACHINE_ANSI_H above. */
#if defined(_ANSI_H_) || (defined(__bsdi__) && defined(_MACHINE_ANSI_H_))
/* The references to _GCC_PTRDIFF_T_, _GCC_SIZE_T_, and _GCC_WCHAR_T_
are probably typos and should be removed before 2.8 is released. */
#ifdef _GCC_PTRDIFF_T_
@ -299,7 +314,7 @@ typedef __WINT_TYPE__ wint_t;
#undef _WCHAR_T_
#undef _BSD_WCHAR_T_
#endif
#endif /* _ANSI_H_ */
#endif /* _ANSI_H_ || ( __bsdi__ && _MACHINE_ANSI_H_ ) */
#endif /* __sys_stdtypes_h */

2
gnu/dist/gcc/ginclude/va-i960.h vendored
View File

@ -70,7 +70,7 @@ __extension__ \
#ifndef va_end
void va_end (__gnuc_va_list); /* Defined in libgcc.a */
#endif
#define va_end(AP) ((void *)0)
#define va_end(AP) ((void) 0)
/* Copy __gnuc_va_list into another variable of this type. */
#define __va_copy(dest, src) (dest) = (src)

15
gnu/dist/gcc/ginclude/va-mips.h vendored
View File

@ -200,7 +200,7 @@ void va_end (__gnuc_va_list); /* Defined in libgcc.a */
#define __va_next_addr(__AP, __type) \
(((__builtin_classify_type (* (__type *) 0) < __record_type_class \
&& __alignof__ (__type) > 4) \
? __AP = (char *) (((int) __AP + 8 - 1) & -8) \
? __AP = (char *) (((__PTRDIFF_TYPE__) __AP + 8 - 1) & -8) \
: (char *) 0), \
(__builtin_classify_type (* (__type *) 0) >= __record_type_class \
? (__AP += __va_reg_size) - __va_reg_size \
@ -240,8 +240,9 @@ void va_end (__gnuc_va_list); /* Defined in libgcc.a */
#ifdef __mips64
#ifdef __MIPSEB__
#define va_arg(__AP, __type) \
((__type *) (void *) (__AP = (char *) ((((__PTRDIFF_TYPE__)__AP + 8 - 1) & -8) \
+ __va_rounded_size (__type))))[-1]
((__type *) (void *) (__AP = (char *) \
((((__PTRDIFF_TYPE__)__AP + 8 - 1) & -8) \
+ __va_rounded_size (__type))))[-1]
#else
#define va_arg(__AP, __type) \
((__AP = (char *) ((((__PTRDIFF_TYPE__)__AP + 8 - 1) & -8) \
@ -255,16 +256,16 @@ void va_end (__gnuc_va_list); /* Defined in libgcc.a */
/* For big-endian machines. */
#define va_arg(__AP, __type) \
((__AP = (char *) ((__alignof__ (__type) > 4 \
? ((int)__AP + 8 - 1) & -8 \
: ((int)__AP + 4 - 1) & -4) \
? ((__PTRDIFF_TYPE__)__AP + 8 - 1) & -8 \
: ((__PTRDIFF_TYPE__)__AP + 4 - 1) & -4) \
+ __va_rounded_size (__type))), \
*(__type *) (void *) (__AP - __va_rounded_size (__type)))
#else
/* For little-endian machines. */
#define va_arg(__AP, __type) \
((__type *) (void *) (__AP = (char *) ((__alignof__(__type) > 4 \
? ((int)__AP + 8 - 1) & -8 \
: ((int)__AP + 4 - 1) & -4) \
? ((__PTRDIFF_TYPE__)__AP + 8 - 1) & -8 \
: ((__PTRDIFF_TYPE__)__AP + 4 - 1) & -4) \
+ __va_rounded_size(__type))))[-1]
#endif
#endif

3
gnu/dist/gcc/ginclude/va-v850.h vendored
View File

@ -1,5 +1,3 @@
/* CYGNUS LOCAL v850/law (entire file ) */
/* Define __gnuc_va_list. */
#ifndef __GNUC_VA_LIST
@ -34,4 +32,3 @@ void va_end (__gnuc_va_list);
: (AP = (__gnuc_va_list) ((char *) (AP) + __va_rounded_size (TYPE)), \
*((TYPE *) (void *) ((char *) (AP) - __va_rounded_size (TYPE)))))
#endif
/* END CYGNUS LOCAL */

2
gnu/dist/gcc/ginclude/varargs.h vendored
View File

@ -115,7 +115,7 @@ typedef void *__gnuc_va_list;
(((sizeof (TYPE) + sizeof (int) - 1) / sizeof (int)) * sizeof (int))
#endif
#if defined (__arm__) || defined (__i386__) || defined (__i860__) || defined (__ns32000__) || defined (__vax__)
#if (defined (__arm__) && ! defined (__ARMEB__)) || defined (__i386__) || defined (__i860__) || defined (__ns32000__) || defined (__vax__)
/* This is for little-endian machines; small args are padded upward. */
#define va_arg(AP, TYPE) \
(AP = (__gnuc_va_list) ((char *) (AP) + __va_rounded_size (TYPE)), \