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move arch/iyonix into evbarm - it's got less machine specific code than most 

evbarm/*...
does not quite work yet, but I don't want it to accumulate more differences
to what's in arch/iyonix
This commit is contained in:
macallan 2019-02-14 21:47:52 +00:00
parent dcaaa9c384
commit 6fe6c35acf
13 changed files with 2654 additions and 0 deletions
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423
sys/arch/evbarm/conf/IYONIX Normal file
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# $NetBSD: IYONIX,v 1.1 2019/02/14 21:47:52 macallan Exp $
#
# GENERIC machine description file
#
# This machine description file is used to generate the default NetBSD
# kernel. The generic kernel does not include all options, subsystems
# and device drivers, but should be useful for most applications.
#
# The machine description file can be customised for your specific
# machine to reduce the kernel size and improve its performance.
#
# For further information on compiling NetBSD kernels, see the config(8)
# man page.
#
# For further information on hardware support for this architecture, see
# the intro(4) man page. For further information about kernel options
# for this architecture, see the options(4) man page. For an explanation
# of each device driver in this file see the section 4 man page for the
# device.
include "arch/evbarm/conf/std.iyonix"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "GENERIC-$Revision: 1.1 $"
maxusers 32 # estimated number of users
options MSGBUFSIZE=65536
# CPU options
# For XScale systems
options CPU_XSCALE_80321 # Support the XScale core
makeoptions CPUFLAGS="-mcpu=xscale"
# Architecture options
options XSCALE_CACHE_READ_WRITE_ALLOCATE
#options HZ=512
makeoptions CPUFLAGS="-mcpu=xscale"
# Standard system options
options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
#options NTP # NTP phase/frequency locked loop
#options KTRACE # system call tracing via ktrace(1)
#options SYSVMSG # System V-like message queues
#options SYSVSEM # System V-like semaphores
#options SYSVSHM # System V-like memory sharing
# Device options
# Console options. The default console is speed is 115200 baud.
#options CONSPEED=9600 # Console speed
# Miscellaneous kernel options
options KTRACE # system call tracing, a la ktrace(1)
options IRQSTATS # manage IRQ statistics
#options SCSIVERBOSE # Verbose SCSI errors
options PCIVERBOSE # Verbose PCI descriptions
options MIIVERBOSE # Verbose MII autoconfuration messages
#options PCI_CONFIG_DUMP # verbosely dump PCI config space
options USERCONF # userconf(4) support
#options PIPE_SOCKETPAIR # smaller, but slower pipe(2)
#options SYSCTL_INCLUDE_DESCR # Include sysctl descriptions in kernel
# Development and Debugging options
# Alternate buffer queue strategies for better responsiveness under high
# disk I/O load.
#options BUFQ_READPRIO
#options BUFQ_PRIOCSCAN
# Diagnostic/debugging support options
#options DIAGNOSTIC # expensive kernel consistency checks
#options DEBUG # expensive debugging checks/support
options DDB # in-kernel debugger
#options DDB_ONPANIC=1 # see also sysctl(7): `ddb.onpanic'
options DDB_HISTORY_SIZE=512 # enable history editing in DDB
#options DDB_KEYCODE=0x40
#options KGDB # remote debugger
#options KGDB_DEVNAME="\"com\"",KGDB_DEVADDR=0x3f8,KGDB_DEVRATE=9600
#makeoptions DEBUG="-g" # compile full symbol table
makeoptions COPY_SYMTAB=1
#options PMAP_DEBUG # Enable pmap_debug_level code
#options VERBOSE_INIT_ARM # verbose bootstraping messages
#options PMAP_INCLUDE_PTE_SYNC
#options LOCKDEBUG
# Compatibility options
include "conf/compat_netbsd70.config"
options COMPAT_NETBSD32 # allow running arm (e.g. non-earm) binaries
# File systems
file-system FFS # UFS
#file-system EXT2FS # second extended file system (linux)
#file-system LFS # log-structured file system
#file-system MFS # memory file system
file-system NFS # Network File System client
#file-system NTFS # Windows/NT file system (experimental)
file-system CD9660 # ISO 9660 + Rock Ridge file system
file-system MSDOSFS # MS-DOS file system
#file-system FDESC # /dev/fd
file-system KERNFS # /kern
#file-system NULLFS # loopback file system
#file-system OVERLAY # overlay file system
file-system PROCFS # /proc
#file-system UMAPFS # NULLFS + uid and gid remapping
#file-system UNION # union file system
#file-system CODA # Coda File System; also needs vcoda (below)
#file-system SMBFS # experimental - CIFS; also needs nsmb (below)
file-system PTYFS # /dev/ptm support
file-system TMPFS # Efficient memory file-system
#file-system UDF # experimental - OSTA UDF CD/DVD file-system
#file-system HFS # experimental - Apple HFS+ (read-only)
file-system FILECORE # Acorn filecore file system
# File system options
#options QUOTA # legacy UFS quotas
#options QUOTA2 # new, in-filesystem UFS quotas
#options FFS_EI # FFS Endian Independent support
options WAPBL # File system journaling support
# Note that UFS_DIRHASH is suspected of causing kernel memory corruption.
# It is not recommended for general use.
#options UFS_DIRHASH # UFS Large Directory Hashing - Experimental
#options NFSSERVER # Network File System server
options FFS_NO_SNAPSHOT # No FFS snapshot support
#options UFS_EXTATTR # Extended attribute support for UFS1
#options EXT2FS_SYSTEM_FLAGS # makes ext2fs file flags (append and
# immutable) behave as system flags.
# Networking options
#options GATEWAY # packet forwarding
options INET # IP + ICMP + TCP + UDP
options INET6 # IPV6
#options IPSEC # IP security
#options IPSEC_DEBUG # debug for IP security
#options MROUTING # IP multicast routing
#options PIM # Protocol Independent Multicast
#options NETATALK # AppleTalk networking protocols
#options PPP_BSDCOMP # BSD-Compress compression support for PPP
#options PPP_DEFLATE # Deflate compression support for PPP
#options PPP_FILTER # Active filter support for PPP (requires bpf)
#options TCP_DEBUG # Record last TCP_NDEBUG packets with SO_DEBUG
#options ALTQ # Manipulate network interfaces' output queues
#options ALTQ_BLUE # Stochastic Fair Blue
#options ALTQ_CBQ # Class-Based Queueing
#options ALTQ_CDNR # Diffserv Traffic Conditioner
#options ALTQ_FIFOQ # First-In First-Out Queue
#options ALTQ_FLOWVALVE # RED/flow-valve (red-penalty-box)
#options ALTQ_HFSC # Hierarchical Fair Service Curve
#options ALTQ_LOCALQ # Local queueing discipline
#options ALTQ_PRIQ # Priority Queueing
#options ALTQ_RED # Random Early Detection
#options ALTQ_RIO # RED with IN/OUT
#options ALTQ_WFQ # Weighted Fair Queueing
options NFS_BOOT_DHCP,NFS_BOOT_BOOTPARAM
options DKWEDGE_AUTODISCOVER
options DKWEDGE_METHOD_BSDLABEL
#options DKWEDGE_METHOD_MBR
options INSECURE
# Kernel root file system and dump configuration.
#config netbsd root on ? type ?
#config netbsd root on wd1a type ffs
#config netbsd root on wm0 type nfs
config netbsd root on "wedge:system/a" type ffs
#
# Device configuration
#
mainbus0 at root
cpu0 at mainbus?
# i80321 I/O Processor peripheral support
iopxs* at mainbus?
iopaau* at iopxs? # Application Accelerator Unit
iopiic* at iopxs? # I2C Controller Unit(s)
iic0 at iopiic?
iic1 at iopiic?
iopwdog* at iopxs? # Watchdog timer
pci0 at iopxs? bus ? # PCI/PCI-X support
# The curious can see their RAM timings.
spdmem* at iic1 addr 0x56
# onboard RTC. RISC OS starts counting years at 2000
dsrtc0 at iic0 addr 0x68
# PCI bridges
ppb* at pci? dev ? function ? # PCI-PCI bridges
pci* at ppb? bus ?
# XXX 'puc's aren't really bridges, but there's no better place for them here
#puc* at pci? dev ? function ? # PCI "universal" comm. cards
#options COMCONSOLE
# VGA
#vga* at pci? dev ? function ?
genfb* at pci? dev ? function ?
#options GENFB_PCI_DEBUG
#gffb* at pci? dev ? function ?
# these exist but aren't configured by RISC OS
#alipm* at pci?
#iic* at alipm?
# Display
wsdisplay0 at wsemuldisplaydev? console 1
wsdisplay* at wsemuldisplaydev?
#options WSEMUL_SUN # sun terminal emulation
options WSEMUL_VT100 # vt100 terminal emulation
options WS_DEFAULT_FG=WSCOL_BLACK
options WS_DEFAULT_BG=WSCOL_LIGHT_WHITE
options WS_KERNEL_FG=WSCOL_GREEN
options WS_KERNEL_BG=WSCOL_LIGHT_WHITE
options WSDISPLAY_COMPAT_PCVT # emulate some ioctls
options WSDISPLAY_COMPAT_SYSCONS # emulate some ioctls
options WSDISPLAY_COMPAT_USL # VT handling
options WSDISPLAY_COMPAT_RAWKBD # can get raw scancodes
#options WSDISPLAY_DEFAULTSCREENS=4
options FONT_GO_MONO12x23
options WSDISPLAY_SCROLLSUPPORT
options VCONS_DRAW_INTR
options RASOPS_DEFAULT_WIDTH=100
options RASOPS_DEFAULT_HEIGHT=30
# IDE and related devices
# PCI IDE controllers - see pciide(4) for supported hardware.
# The 0x0001 flag force the driver to use DMA, even if the driver doesn't know
# how to set up DMA modes for this chip. This may work, or may cause
# a machine hang with some controllers.
#pciide* at pci? dev ? function ? flags 0x0000 # GENERIC pciide driver
aceride* at pci? dev ? function ? # Acer Lab IDE controllers
mvsata* at pci? dev ? function ?
# ATA (IDE) bus support
atabus* at ata?
#options ATADEBUG
# IDE drives
# Flags are used only with controllers that support DMA operations
# and mode settings (e.g. some pciide controllers)
# The lowest order four bits (rightmost digit) of the flags define the PIO
# mode to use, the next set of four bits the DMA mode and the third set the
# UltraDMA mode. For each set of four bits, the 3 lower bits define the mode
# to use, and the last bit must be 1 for this setting to be used.
# For DMA and UDMA, 0xf (1111) means 'disable'.
# 0x0fac means 'use PIO mode 4, DMA mode 2, disable UltraDMA'.
# (0xc=1100, 0xa=1010, 0xf=1111)
# 0x0000 means "use whatever the drive claims to support".
wd* at atabus? drive ? flags 0x0000
# ATAPI bus support
atapibus* at atapi?
# ATAPI devices
# flags have the same meaning as for IDE drives.
# XXX No DMA on IDE devices for now
cd* at atapibus? drive ? flags 0x0ff0 # ATAPI CD-ROM drives
sd* at atapibus? drive ? flags 0x0000 # ATAPI disk drives
st* at atapibus? drive ? flags 0x0000 # ATAPI tape drives
uk* at atapibus? drive ? flags 0x0000 # ATAPI unknown
# Network Interfaces
# onboard ethernet
wm* at pci? dev ? function ? # Intel 8254x gigabit
# MII/PHY support
makphy* at mii? phy ? # Marvell Semiconductor 88E1000 PHYs
ukphy* at mii? phy ? # generic unknown PHYs
# USB Controller and Devices
# Iyonix ships with an ehci/ohci card
ehci* at pci? dev ? function ? # Enhanced Host Controller
ohci* at pci? dev ? function ? # Open Host Controller
#uhci* at pci? dev ? function ? # Universal Host Controller (Intel)
# USB bus support
usb* at ehci?
usb* at ohci?
#usb* at uhci?
#usb* at slhci?
# USB Hubs
uhub* at usb?
uhub* at uhub? port ?
# USB HID device
uhidev* at uhub? port ? configuration ? interface ?
# USB Mice
ums* at uhidev? reportid ?
wsmouse* at ums? mux 0
# USB eGalax touch-panel
#uep* at uhub? port ?
#wsmouse* at uep? mux 0
# USB Keyboards
ukbd* at uhidev? reportid ?
wskbd* at ukbd? console ? mux 1
# USB Generic HID devices
uhid* at uhidev? reportid ?
# USB Mass Storage
umass* at uhub? port ? configuration ? interface ?
# USB audio
uaudio* at uhub? port ? configuration ?
# USB MIDI
#umidi* at uhub? port ? configuration ?
# USB Ethernet adapters
#axe* at uhub? port ? # ASIX AX88172 based adapters
uplcom* at uhub? port ? # I/O DATA USB-RSAQ2 serial adapter
ucom* at uplcom? portno ?
# USB Generic driver
#ugen* at uhub? port ?
# Iyonix onboard audio
autri* at pci? dev ? function ? # Trident 4DWAVE based AC'97 Audio
# Audio support
audio* at audiobus?
spkr* at audio? # PC speaker (synthesized)
# On-board device support
obio* at mainbus?
com1 at obio? addr 0x900003e8 xint 1 # on-board UART
com0 at obio? addr 0x900002f8 xint 1 # on-board UART
#com* at obio? addr 0x900003e8 xint 1 # on-board UART
#com* at obio? addr 0x900003f8 xint 1 # on-board UART
# Pseudo-Devices
#pseudo-device crypto # /dev/crypto device
#pseudo-device swcrypto # software crypto implementation
# disk/mass storage pseudo-devices
pseudo-device fss # file system snapshot device
# network pseudo-devices
pseudo-device bpfilter # Berkeley packet filter
#pseudo-device carp # Common Address Redundancy Protocol
#pseudo-device npf # NPF packet filter
pseudo-device loop # network loopback
#pseudo-device ppp # Point-to-Point Protocol
#pseudo-device pppoe # PPP over Ethernet (RFC 2516)
#pseudo-device sl # Serial Line IP
#pseudo-device strip # Starmode Radio IP (Metricom)
#pseudo-device irframetty # IrDA frame line discipline
#pseudo-device tap # virtual Ethernet
#pseudo-device tun # network tunneling over tty
#pseudo-device gre # generic L3 over IP tunnel
#pseudo-device gif # IPv[46] over IPv[46] tunnel (RFC1933)
#pseudo-device faith # IPv[46] tcp relay translation i/f#
#pseudo-device stf # 6to4 IPv6 over IPv4 encapsulation
#pseudo-device vlan # IEEE 802.1q encapsulation
#pseudo-device bridge # simple inter-network bridging
#options BRIDGE_IPF # bridge uses IP/IPv6 pfil hooks too
#pseudo-device agr # IEEE 802.3ad link aggregation
# srt is EXPERIMENTAL
#pseudo-device srt # source-address-based routing
#
# accept filters
pseudo-device accf_data # "dataready" accept filter
pseudo-device accf_http # "httpready" accept filter
# miscellaneous pseudo-devices
pseudo-device pty # pseudo-terminals
#options RND_COM # use "com" randomness as well (BROKEN)
pseudo-device clockctl # user control of clock subsystem
pseudo-device ksyms # /dev/ksyms
# wscons pseudo-devices
pseudo-device wsmux # mouse & keyboard multiplexor
pseudo-device wsfont
#options FILEASSOC # fileassoc(9) - required for Veriexec
# and PAX_SEGVGUARD
# Veriexec
#pseudo-device veriexec
#
# Uncomment the fingerprint methods below that are desired. Note that
# removing fingerprint methods will have almost no impact on the kernel
# code size.
#
#options VERIFIED_EXEC_FP_SHA256
#options VERIFIED_EXEC_FP_SHA384
#options VERIFIED_EXEC_FP_SHA512
#options PAX_MPROTECT=0 # PaX mprotect(2) restrictions

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sys/arch/evbarm/conf/files.iyonix Normal file
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# $NetBSD: files.iyonix,v 1.1 2019/02/14 21:47:52 macallan Exp $
#
# Machine dependent stuff
#
file arch/evbarm/iyonix/iyonix_machdep.c
file arch/evbarm/iyonix/iyonix_pci.c
# obio stuff moved from here
# i80321 I/O Processor CPU support
include "arch/arm/xscale/files.i80321"
attach iopxs at mainbus with iopxs_mainbus
file arch/evbarm/iyonix/i80321_mainbus.c iopxs_mainbus
# IQ80321 on-board devices
device obio {addr, [size = -1], [width = -1], [xint = -1]}: bus_space_generic
attach obio at mainbus
file arch/evbarm/iyonix/obio.c obio
file arch/evbarm/iyonix/obio_space.c obio
# on-board TI 165C50 UART
attach com at obio with com_obio
file arch/evbarm/iyonix/com_obio.c com_obio

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# $NetBSD: std.iyonix,v 1.1 2019/02/14 21:47:52 macallan Exp $
#
# standard NetBSD/iyonix for GENERIC options
machine evbarm arm
include "arch/evbarm/conf/std.evbarm" # arch standard options
# Pull in Iyonix config definitions.
include "arch/evbarm/conf/files.iyonix"
options KERNEL_BASE_EXT=0xf0000000
makeoptions LOADADDRESS="0xf0000000"
options ARM_INTR_IMPL="<arch/arm/xscale/i80321_intr.h>"
# We need to configure the PCI bus.
options PCI_NETBSD_CONFIGURE
options I80321_USE_DIRECT_WIN
options __BUS_SPACE_HAS_STREAM_METHODS
options __HAVE_PCI_CONF_HOOK

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/* $NetBSD: autoconf.c,v 1.1 2019/02/14 21:47:52 macallan Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.1 2019/02/14 21:47:52 macallan Exp $");
#include "opt_md.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/reboot.h>
#include <sys/disklabel.h>
#include <sys/device.h>
#include <sys/conf.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <net/if.h>
#include <net/if_ether.h>
#include <machine/autoconf.h>
#include <machine/intr.h>
#include <evbarm/iyonix/iyonixvar.h>
#include <acorn32/include/bootconfig.h>
extern struct bootconfig bootconfig;
/*
* Set up the root device from the boot args
*/
void
cpu_rootconf(void)
{
aprint_normal("boot device: %s\n",
booted_device != NULL ? device_xname(booted_device) : "<unknown>");
rootconf();
}
/*
* void cpu_configure()
*
* Configure all the root devices
* The root devices are expected to configure their own children
*/
void
cpu_configure(void)
{
struct mainbus_attach_args maa;
(void) splhigh();
(void) splserial(); /* XXX need an splextreme() */
maa.ma_name = "mainbus";
config_rootfound("mainbus", &maa);
/* Time to start taking interrupts so lets open the flood gates .... */
spl0();
}
#define BUILTIN_ETHERNET_P(pa) \
((pa)->pa_bus == 0 && (pa)->pa_device == 4 && (pa)->pa_function == 0)
#define SETPROP(x, y) \
do { \
if (prop_dictionary_set(device_properties(dev), \
x, y) == false) { \
printf("WARNING: unable to set " x " " \
"property for %s\n", device_xname(dev)); \
} \
prop_object_release(y); \
} while (/*CONSTCOND*/0)
void
device_register(device_t dev, void *aux)
{
device_t pdev;
if ((pdev = device_parent(dev)) != NULL &&
device_is_a(pdev, "pci")) {
struct pci_attach_args *pa = aux;
if (BUILTIN_ETHERNET_P(pa)) {
prop_number_t cfg1, cfg2, swdpin;
prop_data_t mac;
/*
* We set these configuration registers to 0,
* because it's the closest we have to "leave them
* alone". That and, it works.
*/
cfg1 = prop_number_create_integer(0);
KASSERT(cfg1 != NULL);
cfg2 = prop_number_create_integer(0);
KASSERT(cfg2 != NULL);
swdpin = prop_number_create_integer(0);
KASSERT(swdpin != NULL);
mac = prop_data_create_data_nocopy(iyonix_macaddr,
ETHER_ADDR_LEN);
KASSERT(mac != NULL);
SETPROP("mac-address", mac);
SETPROP("i82543-cfg1", cfg1);
SETPROP("i82543-cfg2", cfg2);
SETPROP("i82543-swdpin", swdpin);
}
}
if ((device_is_a(dev, "genfb") || device_is_a(dev, "gffb")) &&
device_is_a(device_parent(dev), "pci") ) {
prop_dictionary_t dict = device_properties(dev);
struct pci_attach_args *pa = aux;
pcireg_t bar0, bar1;
uint32_t fbaddr;
bus_space_handle_t vgah;
bar0 = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
bar1 = pci_conf_read(pa->pa_pc, pa->pa_tag,
PCI_MAPREG_START + 0x04);
/*
* We need to prod the VGA card to disable interrupts, since
* RISC OS has been using them and we don't know how to
* handle them. This assumes that we have a NVidia
* GeForce 2 MX card as supplied with the Iyonix and
* as (probably) required by RISC OS in order to boot.
* If you write your own RISC OS driver for a different card,
* you're on your own.
*/
/* We're guessing at the numbers here, guys */
#define VGASIZE 0x1000
#define IRQENABLE_ADDR 0x140
bus_space_map(pa->pa_memt, PCI_MAPREG_MEM_ADDR(bar0),
VGASIZE, 0, &vgah);
bus_space_write_4(pa->pa_memt, vgah, 0x140, 0);
bus_space_unmap(pa->pa_memt, vgah, 0x1000);
fbaddr = PCI_MAPREG_MEM_ADDR(bar1);
prop_dictionary_set_bool(dict, "is_console", 1);
prop_dictionary_set_uint32(dict, "width",
bootconfig.width + 1);
prop_dictionary_set_uint32(dict, "height",
bootconfig.height + 1);
prop_dictionary_set_uint32(dict, "depth",
1 << bootconfig.log2_bpp);
/*
* XXX
* at least RISC OS 5.28 seems to use the graphics hardware in
* BGR mode when in 32bit colour, so take that into account
*/
if (bootconfig.log2_bpp == 5)
prop_dictionary_set_bool(dict, "is_bgr", 1);
prop_dictionary_set_uint32(dict, "address", fbaddr);
}
if (device_is_a(dev, "dsrtc")) {
prop_dictionary_t dict = device_properties(dev);
prop_dictionary_set_bool(dict, "base_year_is_2000", 1);
}
}

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/* $NetBSD: com_obio.c,v 1.1 2019/02/14 21:47:52 macallan Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: com_obio.c,v 1.1 2019/02/14 21:47:52 macallan Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/termios.h>
#include <sys/bus.h>
#include <arm/xscale/i80321var.h>
#include <evbarm/iyonix/obiovar.h>
#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>
struct com_obio_softc {
struct com_softc sc_com;
void *sc_ih;
};
int com_obio_match(device_t, cfdata_t , void *);
void com_obio_attach(device_t, device_t, void *);
CFATTACH_DECL_NEW(com_obio, sizeof(struct com_obio_softc),
com_obio_match, com_obio_attach, NULL, NULL);
int
com_obio_match(device_t parent, cfdata_t cf, void *aux)
{
/* We take it on faith that the device is there. */
return (1);
}
void
com_obio_attach(device_t parent, device_t self, void *aux)
{
struct obio_attach_args *oba = aux;
struct com_obio_softc *osc = device_private(self);
struct com_softc *sc = &osc->sc_com;
bus_space_handle_t ioh;
int error;
sc->sc_dev = self;
sc->sc_frequency = COM_FREQ;
sc->sc_hwflags = COM_HW_NO_TXPRELOAD;
error = bus_space_map(oba->oba_st, oba->oba_addr, 8, 0, &ioh);
com_init_regs(&sc->sc_regs, oba->oba_st, ioh, oba->oba_addr);
if (error) {
aprint_error(": failed to map registers: %d\n", error);
return;
}
com_attach_subr(sc);
osc->sc_ih = i80321_intr_establish(oba->oba_irq, IPL_SERIAL,
comintr, sc);
if (osc->sc_ih == NULL)
aprint_error_dev(self,
"unable to establish interrupt at irq %d\n", oba->oba_irq);
}

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/* $NetBSD: i80321_mainbus.c,v 1.1 2019/02/14 21:47:52 macallan Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Iyonix front-end for the i80321 I/O Processor. We take care
* of setting up the i80321 memory map, PCI interrupt routing, etc.,
* which are all specific to the board the i80321 is wired up to.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: i80321_mainbus.c,v 1.1 2019/02/14 21:47:52 macallan Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/autoconf.h>
#include <sys/bus.h>
#include <evbarm/iyonix/iyonixreg.h>
#include <evbarm/iyonix/iyonixvar.h>
#include <arm/xscale/i80321reg.h>
#include <arm/xscale/i80321var.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcidevs.h>
int i80321_mainbus_match(device_t, cfdata_t, void *);
void i80321_mainbus_attach(device_t, device_t, void *);
CFATTACH_DECL_NEW(iopxs_mainbus, sizeof(struct i80321_softc),
i80321_mainbus_match, i80321_mainbus_attach, NULL, NULL);
/* There can be only one. */
int i80321_mainbus_found;
int
i80321_mainbus_match(device_t parent, cfdata_t cf, void *aux)
{
#if 0
struct mainbus_attach_args *ma = aux;
#endif
if (i80321_mainbus_found)
return (0);
#if 1
/* XXX Shoot arch/arm/mainbus in the head. */
return (1);
#else
if (strcmp(cf->cf_name, ma->ma_name) == 0)
return (1);
return (0);
#endif
}
void
i80321_mainbus_attach(device_t parent, device_t self, void *aux)
{
struct i80321_softc *sc = device_private(self);
pcireg_t b0u, b0l, b1u, b1l;
paddr_t memstart;
psize_t memsize;
i80321_mainbus_found = 1;
sc->sc_dev = self;
/*
* Fill in the space tag for the i80321's own devices,
* and hand-craft the space handle for it (the device
* was mapped during early bootstrap).
*/
i80321_bs_init(&i80321_bs_tag, sc);
sc->sc_st = &i80321_bs_tag;
sc->sc_sh = IYONIX_80321_VBASE;
/*
* Slice off a subregion for the Memory Controller -- we need it
* here in order read the memory size.
*/
if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_MCU_BASE,
VERDE_MCU_SIZE, &sc->sc_mcu_sh))
panic("%s: unable to subregion MCU registers",
device_xname(self));
if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_ATU_BASE,
VERDE_ATU_SIZE, &sc->sc_atu_sh))
panic("%s: unable to subregion ATU registers",
device_xname(self));
/*
* We have mapped the PCI I/O windows in the early bootstrap phase.
*/
sc->sc_iow_vaddr = IYONIX_IOW_VBASE;
/*
* Check the configuration of the ATU to see if another BIOS
* has configured us. If a PC BIOS didn't configure us, then
* BAR0 is 00000000.0000000c and BAR1 is 00000000.8000000c. If
* a BIOS has configured us, at least one of those should be
* different.
*/
b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0);
b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4);
b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8);
b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc);
if ((b0u != b1u) || (b0l != 0x0000000c) || (b1l != 0x8000000cU))
sc->sc_is_host = 0;
else
sc->sc_is_host = 1;
sc->sc_is_host = 1;
aprint_naive(": i80321 I/O Processor\n");
aprint_normal(": i80321 I/O Processor, acting as PCI %s\n",
sc->sc_is_host ? "host" : "slave");
i80321_intr_evcnt_attach();
i80321_sdram_bounds(sc->sc_st, sc->sc_mcu_sh, &memstart, &memsize);
/*
* We set up the Inbound Windows as follows:
*
* 0 Access to i80321 PMMRs
*
* 1 Reserve space for private devices
*
* 2 RAM access
*
* 3 Unused.
*
* This chunk needs to be customized for each IOP321 application.
*/
if (sc->sc_is_host) {
/* Map PCI:Local 1:1. */
sc->sc_iwin[1].iwin_base_lo = VERDE_OUT_XLATE_MEM_WIN0_BASE |
PCI_MAPREG_MEM_PREFETCHABLE_MASK |
PCI_MAPREG_MEM_TYPE_64BIT;
sc->sc_iwin[1].iwin_base_hi = 0;
} else {
sc->sc_iwin[1].iwin_base_lo = 0;
sc->sc_iwin[1].iwin_base_hi = 0;
}
sc->sc_iwin[1].iwin_xlate = VERDE_OUT_XLATE_MEM_WIN0_BASE;
sc->sc_iwin[1].iwin_size = VERDE_OUT_XLATE_MEM_WIN_SIZE;
if (sc->sc_is_host) {
sc->sc_iwin[2].iwin_base_lo = memstart |
PCI_MAPREG_MEM_PREFETCHABLE_MASK |
PCI_MAPREG_MEM_TYPE_64BIT;
sc->sc_iwin[2].iwin_base_hi = 0;
} else {
sc->sc_iwin[2].iwin_base_lo = 0;
sc->sc_iwin[2].iwin_base_hi = 0;
}
sc->sc_iwin[2].iwin_xlate = memstart;
sc->sc_iwin[2].iwin_size = memsize;
if (sc->sc_is_host) {
sc->sc_iwin[3].iwin_base_lo = 0 |
PCI_MAPREG_MEM_PREFETCHABLE_MASK |
PCI_MAPREG_MEM_TYPE_64BIT;
} else {
sc->sc_iwin[3].iwin_base_lo = 0;
}
sc->sc_iwin[3].iwin_base_hi = 0;
sc->sc_iwin[3].iwin_xlate = 0;
sc->sc_iwin[3].iwin_size = 0;
/*
* We set up the Outbound Windows as follows:
*
* 0 Access to private PCI space.
*
* 1 Unused.
*/
sc->sc_owin[0].owin_xlate_lo =
PCI_MAPREG_MEM_ADDR(sc->sc_iwin[1].iwin_base_lo);
sc->sc_owin[0].owin_xlate_hi = sc->sc_iwin[1].iwin_base_hi;
/*
* Set the Secondary Outbound I/O window to map
* to PCI address 0 for all 64K of the I/O space.
*/
sc->sc_ioout_xlate = 0;
sc->sc_ioout_xlate_offset = 0;
/*
* Initialize the interrupt part of our PCI chipset tag.
*/
iyonix_pci_init(&sc->sc_pci_chipset, sc);
i80321_attach(sc);
}

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/* $NetBSD: iyonix_machdep.c,v 1.1 2019/02/14 21:47:52 macallan Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
* All rights reserved.
*
* Based on code written by Jason R. Thorpe and Steve C. Woodford for
* Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1997,1998 Mark Brinicombe.
* Copyright (c) 1997,1998 Causality Limited.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Mark Brinicombe
* for the NetBSD Project.
* 4. The name of the company nor the name of the author may be used to
* endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* Machine dependent functions for kernel setup for Iyonix.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: iyonix_machdep.c,v 1.1 2019/02/14 21:47:52 macallan Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
#include "opt_pmap_debug.h"
#include <sys/param.h>
#include <sys/device.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/exec.h>
#include <sys/proc.h>
#include <sys/msgbuf.h>
#include <sys/reboot.h>
#include <sys/termios.h>
#include <sys/ksyms.h>
#include <sys/bus.h>
#include <sys/cpu.h>
#include <uvm/uvm_extern.h>
#include <dev/cons.h>
#include <dev/pci/ppbreg.h>
#include <dev/ic/i8259reg.h>
#include <net/if.h>
#include <net/if_ether.h>
#include <machine/db_machdep.h>
#include <ddb/db_sym.h>
#include <ddb/db_extern.h>
#include <acorn32/include/bootconfig.h>
#include <arm/locore.h>
#include <arm/undefined.h>
#include <arm/arm32/machdep.h>
#include <arm/xscale/i80321reg.h>
#include <arm/xscale/i80321var.h>
#include <evbarm/iyonix/iyonixreg.h>
#include <evbarm/iyonix/obiovar.h>
#include <dev/wscons/wsconsio.h>
#include <dev/wscons/wsdisplayvar.h>
#include <dev/rasops/rasops.h>
#include <dev/wscons/wsdisplay_vconsvar.h>
#include <dev/wsfont/wsfont.h>
#include "ksyms.h"
#define KERNEL_TEXT_BASE KERNEL_BASE
#define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
struct vcons_screen rascons_console_screen;
struct wsscreen_descr rascons_stdscreen = {
"std",
0, 0, /* will be filled in -- XXX shouldn't, it's global */
0,
0, 0,
WSSCREEN_REVERSE
};
/*
* The range 0xc1000000 - 0xccffffff is available for kernel VM space
* Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
*/
#define KERNEL_VM_SIZE 0x0C000000
struct bootconfig bootconfig; /* Boot config storage */
char *boot_args;
vaddr_t physical_start;
vaddr_t physical_freestart;
vaddr_t physical_freeend;
vaddr_t physical_end;
u_int free_pages;
vaddr_t pagetables_start;
/*int debug_flags;*/
#ifndef PMAP_STATIC_L1S
int max_processes = 64; /* Default number */
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
pv_addr_t minidataclean;
paddr_t msgbufphys;
#ifdef PMAP_DEBUG
extern int pmap_debug_level;
#endif
#define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
#define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
#define KERNEL_PT_KERNEL_NUM 4
/* L2 table for mapping i80321 */
#define KERNEL_PT_IOPXS (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
/* L2 tables for mapping kernel VM */
#define KERNEL_PT_VMDATA (KERNEL_PT_IOPXS + 1)
#define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
#define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
char iyonix_macaddr[ETHER_ADDR_LEN];
char boot_consdev[16];
/* Prototypes */
void iyonix_pic_init(void);
void iyonix_read_machineid(void);
void consinit(void);
static void consinit_com(const char *consdev);
static void consinit_genfb(const char *consdev);
static void process_kernel_args(void);
static void parse_iyonix_bootargs(char *args);
#include "com.h"
#if NCOM > 0
#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>
#endif
#include "genfb.h"
#if (NGENFB == 0) && (NCOM == 0)
# error "No valid console device (com or genfb)"
#elif defined(COMCONSOLE) || (NGENFB == 0)
# define DEFAULT_CONSDEV "com"
#else
# define DEFAULT_CONSDEV "genfb"
#endif
/*
* Define the default console speed for the machine.
*/
#ifndef CONSPEED
#define CONSPEED B9600
#endif /* ! CONSPEED */
#ifndef CONUNIT
#define CONUNIT 0
#endif
#ifndef CONMODE
#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
#endif
int comcnspeed = CONSPEED;
int comcnmode = CONMODE;
int comcnunit = CONUNIT;
#if KGDB
#ifndef KGDB_DEVNAME
#error Must define KGDB_DEVNAME
#endif
const char kgdb_devname[] = KGDB_DEVNAME;
#ifndef KGDB_DEVADDR
#error Must define KGDB_DEVADDR
#endif
unsigned long kgdb_devaddr = KGDB_DEVADDR;
#ifndef KGDB_DEVRATE
#define KGDB_DEVRATE CONSPEED
#endif
int kgdb_devrate = KGDB_DEVRATE;
#ifndef KGDB_DEVMODE
#define KGDB_DEVMODE CONMODE
#endif
int kgdb_devmode = KGDB_DEVMODE;
#endif /* KGDB */
/*
* void cpu_reboot(int howto, char *bootstr)
*
* Reboots the system
*
* Deal with any syncing, unmounting, dumping and shutdown hooks,
* then reset the CPU.
*/
void
cpu_reboot(int howto, char *bootstr)
{
/*
* If we are still cold then hit the air brakes
* and crash to earth fast
*/
if (cold) {
doshutdownhooks();
pmf_system_shutdown(boothowto);
printf("The operating system has halted.\n");
printf("Please press any key to reboot.\n\n");
cngetc();
printf("rebooting...\n");
goto reset;
}
/* Disable console buffering */
/*
* If RB_NOSYNC was not specified sync the discs.
* Note: Unless cold is set to 1 here, syslogd will die during the
* unmount. It looks like syslogd is getting woken up only to find
* that it cannot page part of the binary in as the filesystem has
* been unmounted.
*/
if (!(howto & RB_NOSYNC))
bootsync();
/* Say NO to interrupts */
splhigh();
/* Do a dump if requested. */
if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
dumpsys();
/* Run any shutdown hooks */
doshutdownhooks();
pmf_system_shutdown(boothowto);
/* Make sure IRQ's are disabled */
IRQdisable;
if (howto & RB_HALT) {
printf("The operating system has halted.\n");
printf("Please press any key to reboot.\n\n");
cngetc();
}
printf("rebooting...\n\r");
reset:
/*
* Make really really sure that all interrupts are disabled,
* and poke the Internal Bus and Peripheral Bus reset lines.
*/
(void) disable_interrupts(I32_bit|F32_bit);
*(volatile uint32_t *)(IYONIX_80321_VBASE + VERDE_ATU_BASE +
ATU_PCSR) = PCSR_RIB | PCSR_RPB;
/* ...and if that didn't work, just croak. */
printf("RESET FAILED!\n");
for (;;);
}
/* Static device mappings. */
static const struct pmap_devmap iyonix_devmap[] = {
/*
* Map the on-board devices VA == PA so that we can access them
* with the MMU on or off.
*/
{
IYONIX_OBIO_BASE,
IYONIX_OBIO_BASE,
IYONIX_OBIO_SIZE,
VM_PROT_READ|VM_PROT_WRITE,
PTE_NOCACHE,
},
{
IYONIX_IOW_VBASE,
VERDE_OUT_XLATE_IO_WIN0_BASE,
VERDE_OUT_XLATE_IO_WIN_SIZE,
VM_PROT_READ|VM_PROT_WRITE,
PTE_NOCACHE,
},
{
IYONIX_80321_VBASE,
VERDE_PMMR_BASE,
VERDE_PMMR_SIZE,
VM_PROT_READ|VM_PROT_WRITE,
PTE_NOCACHE,
},
{
IYONIX_FLASH_BASE,
IYONIX_FLASH_BASE,
IYONIX_FLASH_SIZE,
VM_PROT_READ|VM_PROT_WRITE,
PTE_NOCACHE,
},
{
0,
0,
0,
0,
0,
}
};
/* Read out the Machine ID from the flash, and stash it away for later use. */
void
iyonix_read_machineid(void)
{
volatile uint32_t *flashbase = (uint32_t *)IYONIX_FLASH_BASE;
volatile uint16_t *flashword = (uint16_t *)IYONIX_FLASH_BASE;
union {
uint32_t w[2];
uint8_t b[8];
} machid;
/* Enter SecSi Sector Region */
flashword[0x555] = 0xAA;
flashword[0x2AA] = 0x55;
flashword[0x555] = 0x88;
machid.w[0] = flashbase[0];
machid.w[1] = flashbase[1];
iyonix_macaddr[0] = machid.b[6];
iyonix_macaddr[1] = machid.b[5];
iyonix_macaddr[2] = machid.b[4];
iyonix_macaddr[3] = machid.b[3];
iyonix_macaddr[4] = machid.b[2];
iyonix_macaddr[5] = machid.b[1];
/* Exit SecSi Sector Region */
flashword[0x555] = 0xAA;
flashword[0x2AA] = 0x55;
flashword[0x555] = 0x90;
flashword[0x555] = 0x00;
}
#define IYONIX_PIC_WRITE(a,v) (*((char *)IYONIX_OBIO_BASE + (a)) = (v))
void
iyonix_pic_init(void)
{
IYONIX_PIC_WRITE(IYONIX_MASTER_PIC + PIC_ICW1, ICW1_IC4|ICW1_SELECT);
IYONIX_PIC_WRITE(IYONIX_MASTER_PIC + PIC_ICW2, ICW2_IRL(0));
IYONIX_PIC_WRITE(IYONIX_MASTER_PIC + PIC_ICW3, ICW3_CASCADE(2));
IYONIX_PIC_WRITE(IYONIX_MASTER_PIC + PIC_ICW4, ICW4_8086);
IYONIX_PIC_WRITE(IYONIX_MASTER_PIC + PIC_OCW1, 0x0); /* Unmask */
IYONIX_PIC_WRITE(IYONIX_SLAVE_PIC + PIC_ICW1, ICW1_IC4|ICW1_SELECT);
IYONIX_PIC_WRITE(IYONIX_SLAVE_PIC + PIC_ICW2, ICW2_IRL(0));
IYONIX_PIC_WRITE(IYONIX_SLAVE_PIC + PIC_ICW3, ICW3_CASCADE(1));
IYONIX_PIC_WRITE(IYONIX_SLAVE_PIC + PIC_ICW4, ICW4_8086);
IYONIX_PIC_WRITE(IYONIX_SLAVE_PIC + PIC_OCW1, 0x0); /* Unmask */
}
/*
* u_int initarm(...)
*
* Initial entry point on startup. This gets called before main() is
* entered.
* It should be responsible for setting up everything that must be
* in place when main is called.
* This includes
* Taking a copy of the boot configuration structure.
* Initialising the physical console so characters can be printed.
* Setting up page tables for the kernel
* Initialising interrupt controllers to a sane default state
*/
u_int
initarm(void *arg)
{
struct bootconfig *passed_bootconfig = arg;
extern vaddr_t xscale_cache_clean_addr;
#ifdef DIAGNOSTIC
extern vsize_t xscale_minidata_clean_size;
#endif
extern char _end[];
int loop;
int loop1;
u_int l1pagetable;
paddr_t memstart = 0;
psize_t memsize = 0;
/* Calibrate the delay loop. */
i80321_calibrate_delay();
/* Ensure bootconfig has valid magic */
if (passed_bootconfig->magic != BOOTCONFIG_MAGIC)
printf("Bad bootconfig magic: %x\n", bootconfig.magic);
bootconfig = *passed_bootconfig;
/* Fake bootconfig structure for anything that still needs it */
/* XXX must make the memory description h/w independent */
bootconfig.dram[0].address = memstart;
bootconfig.dram[0].pages = memsize / PAGE_SIZE;
bootconfig.dramblocks = 1;
/* process arguments - can update boothowto */
process_kernel_args();
/*
* Since we map the on-board devices VA==PA, and the kernel
* is running VA==PA, it's possible for us to initialize
* the console now.
*/
consinit();
#ifdef VERBOSE_INIT_ARM
/* Talk to the user */
printf("\nNetBSD/iyonix booting ...\n");
#endif
/*
* Heads up ... Setup the CPU / MMU / TLB functions
*/
if (set_cpufuncs())
panic("cpu not recognized!");
/*
* We are currently running with the MMU enabled and the
* entire address space mapped VA==PA.
*/
/*
* Fetch the SDRAM start/size from the i80321 SDRAM configuration
* registers.
*/
i80321_sdram_bounds(&obio_bs_tag, VERDE_PMMR_BASE + VERDE_MCU_BASE,
&memstart, &memsize);
#ifdef VERBOSE_INIT_ARM
printf("initarm: Configuring system ...\n");
#endif
/*
* Set up the variables that define the availability of
* physical memory.
*/
physical_start = memstart;
physical_end = physical_start + memsize;
physical_freestart = physical_start +
(((uintptr_t) _end - KERNEL_TEXT_BASE + PGOFSET) & ~PGOFSET);
physical_freeend = physical_end;
physmem = (physical_end - physical_start) / PAGE_SIZE;
#ifdef VERBOSE_INIT_ARM
/* Tell the user about the memory */
printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
physical_start, physical_end - 1);
#endif
/*
* The kernel is loaded at the base of physical memory. We allocate
* pages upwards from the top of the kernel.
*
* We need to allocate some fixed page tables to get the kernel
* going. We allocate one page directory and a number of page
* tables and store the physical addresses in the kernel_pt_table
* array.
*
* The kernel page directory must be on a 16K boundary. The page
* tables must be on 4K boundaries. What we do is allocate the
* page directory on the first 16K boundary that we encounter, and
* the page tables on 4K boundaries otherwise. Since we allocate
* at least 3 L2 page tables, we are guaranteed to encounter at
* least one 16K aligned region.
*/
#ifdef VERBOSE_INIT_ARM
printf("Allocating page tables\n");
#endif
free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
#ifdef VERBOSE_INIT_ARM
printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
physical_freestart, free_pages, free_pages);
#endif
/* Define a macro to simplify memory allocation */
#define valloc_pages(var, np) \
alloc_pages((var).pv_pa, (np)); \
(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
#define alloc_pages(var, np) \
(var) = physical_freestart; \
physical_freestart += ((np) * PAGE_SIZE); \
if (physical_freeend < physical_freestart) \
panic("initarm: out of memory"); \
free_pages -= (np); \
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
kernel_l1pt.pv_pa = kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if ((physical_freestart & (L1_TABLE_SIZE - 1)) == 0
&& kernel_l1pt.pv_pa == 0) {
valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
} else {
valloc_pages(kernel_pt_table[loop1],
L2_TABLE_SIZE / PAGE_SIZE);
++loop1;
}
}
/* This should never be able to happen but better confirm that. */
if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
panic("initarm: Failed to align the kernel page directory");
/*
* Allocate a page for the system page mapped to V0x00000000
* This page will just contain the system vectors and can be
* shared by all processes.
*/
alloc_pages(systempage.pv_pa, 1);
/* Allocate stacks for all modes */
valloc_pages(irqstack, IRQ_STACK_SIZE);
valloc_pages(abtstack, ABT_STACK_SIZE);
valloc_pages(undstack, UND_STACK_SIZE);
valloc_pages(kernelstack, UPAGES);
/* Allocate enough pages for cleaning the Mini-Data cache. */
KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
valloc_pages(minidataclean, 1);
#ifdef VERBOSE_INIT_ARM
printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
irqstack.pv_va);
printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
abtstack.pv_va);
printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
undstack.pv_va);
printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
kernelstack.pv_va);
#endif
alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
/*
* Ok we have allocated physical pages for the primary kernel
* page tables
*/
#ifdef VERBOSE_INIT_ARM
printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
#endif
/*
* Now we start construction of the L1 page table
* We start by mapping the L2 page tables into the L1.
* This means that we can replace L1 mappings later on if necessary
*/
l1pagetable = kernel_l1pt.pv_pa;
/* Map the L2 pages tables in the L1 page table */
pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
&kernel_pt_table[KERNEL_PT_SYS]);
for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
&kernel_pt_table[KERNEL_PT_KERNEL + loop]);
pmap_link_l2pt(l1pagetable, IYONIX_IOPXS_VBASE,
&kernel_pt_table[KERNEL_PT_IOPXS]);
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
/* update the top of the kernel VM */
pmap_curmaxkvaddr =
KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
#ifdef VERBOSE_INIT_ARM
printf("Mapping kernel\n");
#endif
/* Now we fill in the L2 pagetable for the kernel static code/data */
{
extern char etext[], _end[];
size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
u_int logical;
textsize = (textsize + PGOFSET) & ~PGOFSET;
totalsize = (totalsize + PGOFSET) & ~PGOFSET;
logical = 0; /* offset of kernel in RAM */
logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
physical_start + logical, textsize,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
physical_start + logical, totalsize - textsize,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
}
#ifdef VERBOSE_INIT_ARM
printf("Constructing L2 page tables\n");
#endif
/* Map the stack pages */
pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
}
/* Map the Mini-Data cache clean area. */
xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
minidataclean.pv_pa);
/* Map the vector page. */
pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
/* Map the statically mapped devices. */
pmap_devmap_bootstrap(l1pagetable, iyonix_devmap);
/*
* Give the XScale global cache clean code an appropriately
* sized chunk of unmapped VA space starting at 0xff000000
* (our device mappings end before this address).
*/
xscale_cache_clean_addr = 0xff000000U;
/*
* Now we have the real page tables in place so we can switch to them.
* Once this is done we will be running with the REAL kernel page
* tables.
*/
/* Switch tables */
#ifdef VERBOSE_INIT_ARM
printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
physical_freestart, free_pages, free_pages);
printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
#endif
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
cpu_setttb(kernel_l1pt.pv_pa, true);
cpu_tlb_flushID();
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
iyonix_read_machineid();
/*
* Moved from cpu_startup() as data_abort_handler() references
* this during uvm init
*/
uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
#ifdef VERBOSE_INIT_ARM
printf("done!\n");
#endif
#ifdef VERBOSE_INIT_ARM
printf("bootstrap done.\n");
#endif
arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
/*
* Pages were allocated during the secondary bootstrap for the
* stacks for different CPU modes.
* We must now set the r13 registers in the different CPU modes to
* point to these stacks.
* Since the ARM stacks use STMFD etc. we must set r13 to the top end
* of the stack memory.
*/
#ifdef VERBOSE_INIT_ARM
printf("init subsystems: stacks ");
#endif
set_stackptr(PSR_IRQ32_MODE,
irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_ABT32_MODE,
abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_UND32_MODE,
undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
/*
* Well we should set a data abort handler.
* Once things get going this will change as we will need a proper
* handler.
* Until then we will use a handler that just panics but tells us
* why.
* Initialisation of the vectors will just panic on a data abort.
* This just fills in a slightly better one.
*/
#ifdef VERBOSE_INIT_ARM
printf("vectors ");
#endif
data_abort_handler_address = (u_int)data_abort_handler;
prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
undefined_handler_address = (u_int)undefinedinstruction_bounce;
/* Initialise the undefined instruction handlers */
#ifdef VERBOSE_INIT_ARM
printf("undefined ");
#endif
undefined_init();
/* Load memory into UVM. */
#ifdef VERBOSE_INIT_ARM
printf("page ");
#endif
uvm_md_init();
uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
atop(physical_freestart), atop(physical_freeend),
VM_FREELIST_DEFAULT);
/* Boot strap pmap telling it where managed kernel virtual memory is */
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
printf("irq ");
#endif
i80321_intr_init();
#ifdef VERBOSE_INIT_ARM
printf("done.\n");
#endif
#ifdef DDB
db_machine_init();
if (boothowto & RB_KDB)
Debugger();
#endif
iyonix_pic_init();
printf("args: %s\n", bootconfig.args);
printf("howto: %x\n", boothowto);
/* We return the new stack pointer address */
return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
}
void
consinit(void)
{
static int consinit_called;
if (consinit_called != 0)
return;
consinit_called = 1;
/* We let consinit_<foo> worry about device numbers */
if (strncmp(boot_consdev, "genfb", 5) &&
strncmp(boot_consdev, "com", 3))
strcpy(boot_consdev, DEFAULT_CONSDEV);
if (!strncmp(boot_consdev, "com", 3))
consinit_com(boot_consdev);
else
consinit_genfb(boot_consdev);
}
static void
consinit_com(const char *consdev)
{
static const bus_addr_t comcnaddrs[] = {
IYONIX_UART1, /* com0 */
};
/*
* Console devices are mapped VA==PA. Our devmap reflects
* this, so register it now so drivers can map the console
* device.
*/
pmap_devmap_register(iyonix_devmap);
/* When we support more than the first serial port as console,
* we should check consdev for a number.
*/
#if NCOM > 0
if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
COM_FREQ, COM_TYPE_NORMAL, comcnmode))
{
panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
}
#else
panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
#endif
#if KGDB
#if NCOM > 0
if (strcmp(kgdb_devname, "com") == 0) {
com_kgdb_attach(&obio_bs_tag, kgdb_devaddr, kgdb_devrate,
COM_FREQ, COM_TYPE_NORMAL, kgdb_devmode);
}
#endif /* NCOM > 0 */
#endif /* KGDB */
}
static void
consinit_genfb(const char *consdev)
{
/* NOTYET */
}
static void
process_kernel_args(void)
{
char *args;
/* Ok now we will check the arguments for interesting parameters. */
args = bootconfig.args;
#ifdef BOOTHOWTO
boothowto = BOOTHOWTO;
#else
boothowto = 0;
#endif
/* Only arguments itself are passed from the bootloader */
while (*args == ' ')
++args;
boot_args = args;
parse_mi_bootargs(boot_args);
parse_iyonix_bootargs(boot_args);
}
static void
parse_iyonix_bootargs(char *args)
{
char *ptr;
if (get_bootconf_option(args, "consdev", BOOTOPT_TYPE_STRING, &ptr))
{
/* ptr may have trailing clutter */
strlcpy(boot_consdev, ptr, sizeof(boot_consdev));
if ( (ptr = strchr(boot_consdev, ' ')) )
*ptr = 0;
}
}

221
sys/arch/evbarm/iyonix/iyonix_pci.c Normal file
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/* $NetBSD: iyonix_pci.c,v 1.1 2019/02/14 21:47:52 macallan Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
* All rights reserved.
*
* Based on code written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Iyonix PCI interrupt support.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: iyonix_pci.c,v 1.1 2019/02/14 21:47:52 macallan Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/autoconf.h>
#include <sys/bus.h>
#include <evbarm/iyonix/iyonixreg.h>
#include <evbarm/iyonix/iyonixvar.h>
#include <arm/xscale/i80321reg.h>
#include <arm/xscale/i80321var.h>
#include <dev/pci/pcidevs.h>
#include <dev/pci/ppbreg.h>
#include <sys/extent.h>
#include <dev/pci/pciconf.h>
int iyonix_pci_intr_map(const struct pci_attach_args *,
pci_intr_handle_t *);
const char *iyonix_pci_intr_string(void *, pci_intr_handle_t, char *, size_t);
const struct evcnt *iyonix_pci_intr_evcnt(void *, pci_intr_handle_t);
void *iyonix_pci_intr_establish(void *, pci_intr_handle_t,
int, int (*func)(void *), void *, const char *);
void iyonix_pci_intr_disestablish(void *, void *);
void pci_conf_write_byte(pci_chipset_tag_t, pcitag_t, int, int);
int pci_conf_read_byte(pci_chipset_tag_t, pcitag_t, int);
int iyonix_pci_conf_hook(void *, int, int, int, pcireg_t);
void
iyonix_pci_init(pci_chipset_tag_t pc, void *cookie)
{
pc->pc_intr_v = cookie; /* the i80321 softc */
pc->pc_intr_map = iyonix_pci_intr_map;
pc->pc_intr_string = iyonix_pci_intr_string;
pc->pc_intr_evcnt = iyonix_pci_intr_evcnt;
pc->pc_intr_establish = iyonix_pci_intr_establish;
pc->pc_intr_disestablish = iyonix_pci_intr_disestablish;
pc->pc_conf_hook = iyonix_pci_conf_hook;
}
int
iyonix_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
{
struct i80321_softc *sc = pa->pa_pc->pc_intr_v;
int b, d, f;
uint32_t busno;
busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
busno = PCIXSR_BUSNO(busno);
if (busno == 0xff)
busno = 0;
pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, &b, &d, &f);
/* No mappings for devices not on our bus. */
if (b != busno)
goto no_mapping;
/*
* XXX We currently deal only with the southbridge and with
* regular PCI. IOC devices may need further attention.
*/
/* Devices on the southbridge are all routed through xint 1 */
if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI) {
switch (PCI_PRODUCT(pa->pa_id)) {
case PCI_PRODUCT_ALI_M1543: /* Southbridge */
case PCI_PRODUCT_ALI_M5229: /* ATA */
case PCI_PRODUCT_ALI_M5237: /* ohci */
case PCI_PRODUCT_ALI_M5257: /* Modem */
case PCI_PRODUCT_ALI_M5451: /* AC97 */
case PCI_PRODUCT_ALI_M7101: /* PMC */
*ihp = ICU_INT_XINT(1);
return (0);
}
}
/* Route other interrupts with default swizzling rule */
*ihp = ICU_INT_XINT((d + pa->pa_intrpin - 1) % 4);
return 0;
no_mapping:
printf("iyonix_pci_intr_map: no mapping for %d/%d/%d\n",
pa->pa_bus, pa->pa_device, pa->pa_function);
return (1);
}
const char *
iyonix_pci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len)
{
strlcpy(buf, i80321_irqnames[ih], len);
return buf;
}
const struct evcnt *
iyonix_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
{
/* XXX For now. */
return (NULL);
}
void *
iyonix_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
int (*func)(void *), void *arg, const char *xname)
{
return (i80321_intr_establish(ih, ipl, func, arg));
}
void
iyonix_pci_intr_disestablish(void *v, void *cookie)
{
i80321_intr_disestablish(cookie);
}
void
pci_conf_write_byte(pci_chipset_tag_t pc, pcitag_t tag, int addr, int value)
{
int temp;
temp = pci_conf_read(pc, tag, addr&~3);
temp = temp & ~(0xff << ((addr%4) * 8));
temp = temp | (value << ((addr%4) * 8));
pci_conf_write(pc, tag, addr&~3, temp);
}
int
pci_conf_read_byte(pci_chipset_tag_t pc, pcitag_t tag, int addr)
{
int temp;
temp = pci_conf_read(pc, tag, addr&~3);
temp = temp >> ((addr%4) * 8);
temp = temp & 0xff;
return temp;
}
int
iyonix_pci_conf_hook(void *v, int bus, int dev, int func, pcireg_t id)
{
/*
* We need to disable devices in the Southbridge, and as
* we have all the tags we need at this point, this is
* where we do it.
*/
if (PCI_VENDOR(id) == PCI_VENDOR_ALI &&
PCI_PRODUCT(id) == PCI_PRODUCT_ALI_M1543)
{
pcitag_t tag;
int status;
pci_chipset_tag_t pc = (pci_chipset_tag_t) v;
tag = pci_make_tag(pc, bus, dev, func);
/* Undocumented magic */
/* Disable USB */
pci_conf_write_byte(pc, tag, 0x53, 0x40);
pci_conf_write_byte(pc, tag, 0x52, 0x00);
status = pci_conf_read_byte(pc, tag, 0x7e);
pci_conf_write_byte(pc, tag, 0x7e, status & ~0x80);
/* Disable modem */
pci_conf_write_byte(pc, tag, 0x77, 1 << 6);
/* Disable SCI */
pci_conf_write_byte(pc, tag, 0x78, 1 << 7);
}
return (PCI_CONF_DEFAULT);
}

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sys/arch/evbarm/iyonix/iyonixreg.h Normal file
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/* $NetBSD: iyonixreg.h,v 1.1 2019/02/14 21:47:52 macallan Exp $ */
/*
* Copyright (c) 2002 Wasabi Systems, Inc.
* All rights reserved.
*
* Based on code written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _IYONIXREG_H_
#define _IYONIXREG_H_
/*
* Memory map and register definitions for the Tungsten motherboard
*/
/*
* We allocate a page table for VA 0xfe400000 (4MB) and map the
* PCI I/O space (64K) and i80321 memory-mapped registers (4K) there.
*/
#define IYONIX_IOPXS_VBASE 0xfe400000UL
#define IYONIX_IOW_VBASE IYONIX_IOPXS_VBASE
#define IYONIX_80321_VBASE (IYONIX_IOW_VBASE + \
VERDE_OUT_XLATE_IO_WIN_SIZE)
#define IYONIX_UART1 0x900002f8
/*
* The on-board devices are mapped VA==PA during bootstrap.
*/
#define IYONIX_OBIO_BASE 0x90000000UL
#define IYONIX_OBIO_SIZE 0x00100000UL /* 1MB */
#define IYONIX_FLASH_BASE 0xA0000000UL
#define IYONIX_FLASH_SIZE 0x00800000UL /* 8MB */
#define IYONIX_MASTER_PIC 0x20
#define IYONIX_SLAVE_PIC 0xa0
#endif /* _IYONIXREG_H_ */

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/* $NetBSD: iyonixvar.h,v 1.1 2019/02/14 21:47:52 macallan Exp $ */
#ifndef _IYONIXVAR_H_
#define _IYONIXVAR_H_
#include <dev/pci/pcivar.h>
void iyonix_pci_init(pci_chipset_tag_t, void *);
extern char iyonix_macaddr[];
#endif /* _IYONIXVAR_H_ */

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/* $NetBSD: obio.c,v 1.1 2019/02/14 21:47:52 macallan Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* On-board device autoconfiguration support for Tungsten motherboards.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.1 2019/02/14 21:47:52 macallan Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/autoconf.h>
#include <sys/bus.h>
#include <arm/xscale/i80321reg.h>
#include <evbarm/iyonix/iyonixreg.h>
#include <evbarm/iyonix/obiovar.h>
#include "locators.h"
int obio_match(device_t, cfdata_t, void *);
void obio_attach(device_t, device_t, void *);
CFATTACH_DECL_NEW(obio, 0,
obio_match, obio_attach, NULL, NULL);
int obio_print(void *, const char *);
int obio_search(device_t, cfdata_t, const int *, void *);
/* there can be only one */
bool obio_found;
int
obio_match(device_t parent, cfdata_t cf, void *aux)
{
#if 0
struct mainbus_attach_args *ma = aux;
#endif
if (obio_found)
return (0);
#if 1
/* XXX Shoot arch/arm/mainbus in the head. */
return (1);
#else
if (strcmp(cf->cf_name, ma->ma_name) == 0)
return (1);
return (0);
#endif
}
void
obio_attach(device_t parent, device_t self, void *aux)
{
obio_found = true;
aprint_naive("\n");
aprint_normal("\n");
/*
* Attach all on-board devices as described in the kernel
* configuration file.
*/
config_search_ia(obio_search, self, "obio", NULL);
}
int
obio_print(void *aux, const char *pnp)
{
struct obio_attach_args *oba = aux;
aprint_normal(" addr 0x%08lx", oba->oba_addr);
if (oba->oba_size != OBIOCF_SIZE_DEFAULT)
aprint_normal("-0x%08lx", oba->oba_addr + (oba->oba_size - 1));
if (oba->oba_width != OBIOCF_WIDTH_DEFAULT)
aprint_normal(" width %d", oba->oba_width);
if (oba->oba_irq != -1)
aprint_normal(" xint %d", oba->oba_irq - ICU_INT_XINT0);
return (UNCONF);
}
int
obio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
{
struct obio_attach_args oba;
oba.oba_st = &obio_bs_tag;
oba.oba_addr = cf->cf_loc[OBIOCF_ADDR];
oba.oba_size = cf->cf_loc[OBIOCF_SIZE];
oba.oba_width = cf->cf_loc[OBIOCF_WIDTH];
if (cf->cf_loc[OBIOCF_XINT] != OBIOCF_XINT_DEFAULT)
oba.oba_irq = ICU_INT_XINT(cf->cf_loc[OBIOCF_XINT]);
else
oba.oba_irq = -1;
if (config_match(parent, cf, &oba) > 0)
config_attach(parent, cf, &oba, obio_print);
return (0);
}

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/* $NetBSD: obio_space.c,v 1.1 2019/02/14 21:47:52 macallan Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* bus_space functions for Tungsten on-board devices
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: obio_space.c,v 1.1 2019/02/14 21:47:52 macallan Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <uvm/uvm_extern.h>
#include <sys/bus.h>
/* Prototypes for all the bus_space structure functions */
bs_protos(obio);
bs_protos(generic);
bs_protos(generic_armv4);
bs_protos(bs_notimpl);
/*
* The obio bus space tag. This is constant for all instances, so
* we never have to explicitly "create" it.
*/
struct bus_space obio_bs_tag = {
/* cookie */
.bs_cookie = (void *) 0,
/* mapping/unmapping */
.bs_map = obio_bs_map,
.bs_unmap = obio_bs_unmap,
.bs_subregion = obio_bs_subregion,
/* allocation/deallocation */
.bs_alloc = obio_bs_alloc,
.bs_free = obio_bs_free,
/* get kernel virtual address */
.bs_vaddr = obio_bs_vaddr,
/* mmap */
.bs_mmap = bs_notimpl_bs_mmap,
/* barrier */
.bs_barrier = obio_bs_barrier,
/* read (single) */
.bs_r_1 = generic_bs_r_1,
.bs_r_2 = generic_armv4_bs_r_2,
.bs_r_4 = generic_bs_r_4,
.bs_r_8 = bs_notimpl_bs_r_8,
/* read multiple */
.bs_rm_1 = generic_bs_rm_1,
.bs_rm_2 = bs_notimpl_bs_rm_2,
.bs_rm_4 = bs_notimpl_bs_rm_4,
.bs_rm_8 = bs_notimpl_bs_rm_8,
/* read region */
.bs_rr_1 = generic_bs_rr_1,
.bs_rr_2 = bs_notimpl_bs_rr_2,
.bs_rr_4 = bs_notimpl_bs_rr_4,
.bs_rr_8 = bs_notimpl_bs_rr_8,
/* write (single) */
.bs_w_1 = generic_bs_w_1,
.bs_w_2 = generic_armv4_bs_w_2,
.bs_w_4 = generic_bs_w_4,
.bs_w_8 = bs_notimpl_bs_w_8,
/* write multiple */
.bs_wm_1 = generic_bs_wm_1,
.bs_wm_2 = bs_notimpl_bs_wm_2,
.bs_wm_4 = bs_notimpl_bs_wm_4,
.bs_wm_8 = bs_notimpl_bs_wm_8,
/* write region */
.bs_wr_1 = bs_notimpl_bs_wr_1,
.bs_wr_2 = bs_notimpl_bs_wr_2,
.bs_wr_4 = bs_notimpl_bs_wr_4,
.bs_wr_8 = bs_notimpl_bs_wr_8,
/* set multiple */
.bs_sm_1 = bs_notimpl_bs_sm_1,
.bs_sm_2 = bs_notimpl_bs_sm_2,
.bs_sm_4 = bs_notimpl_bs_sm_4,
.bs_sm_8 = bs_notimpl_bs_sm_8,
/* set region */
.bs_sr_1 = bs_notimpl_bs_sr_1,
.bs_sr_2 = bs_notimpl_bs_sr_2,
.bs_sr_4 = bs_notimpl_bs_sr_4,
.bs_sr_8 = bs_notimpl_bs_sr_8,
/* copy */
.bs_c_1 = bs_notimpl_bs_c_1,
.bs_c_2 = bs_notimpl_bs_c_2,
.bs_c_4 = bs_notimpl_bs_c_4,
.bs_c_8 = bs_notimpl_bs_c_8,
};
int
obio_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flag,
bus_space_handle_t *bshp)
{
const struct pmap_devmap *pd;
paddr_t startpa, endpa, pa, offset;
vaddr_t va;
if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
/* Device was statically mapped. */
*bshp = pd->pd_va + (bpa - pd->pd_pa);
return (0);
}
endpa = round_page(bpa + size);
offset = bpa & PAGE_MASK;
startpa = trunc_page(bpa);
va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
if (va == 0)
return (ENOMEM);
*bshp = va + offset;
const int pmapflags =
(flag & (BUS_SPACE_MAP_CACHEABLE|BUS_SPACE_MAP_PREFETCHABLE))
? 0
: PMAP_NOCACHE;
for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, pmapflags);
}
pmap_update(pmap_kernel());
return (0);
}
int
obio_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
bus_size_t alignment, bus_size_t boundary, int flags, bus_addr_t *bpap,
bus_space_handle_t *bshp)
{
panic("obio_bs_alloc(): not implemented");
}
void
obio_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
{
vaddr_t va, endva;
if (pmap_devmap_find_va(bsh, size) != NULL) {
/* Device was statically mapped; nothing to do. */
return;
}
endva = round_page(bsh + size);
va = trunc_page(bsh);
pmap_kremove(va, endva - va);
uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY);
}
void
obio_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
{
panic("obio_bs_free(): not implemented");
}
int
obio_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
bus_size_t size, bus_space_handle_t *nbshp)
{
*nbshp = bsh + offset;
return (0);
}
void *
obio_bs_vaddr(void *t, bus_space_handle_t bsh)
{
return ((void *)bsh);
}
void
obio_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
bus_size_t len, int flags)
{
/* Nothing to do. */
}

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/* $NetBSD: obiovar.h,v 1.1 2019/02/14 21:47:52 macallan Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _IYONIX_OBIOVAR_H_
#define _IYONIX_OBIOVAR_H_
struct obio_attach_args {
bus_space_tag_t oba_st; /* bus space tag */
bus_addr_t oba_addr; /* address of device */
bus_size_t oba_size; /* size of device */
int oba_width; /* bus width */
int oba_irq; /* XINT interrupt bit # */
};
extern struct bus_space obio_bs_tag;
#endif /* _IYONIX_OBIOVAR_H_ */