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CCU SCLK soft reset 1 bit 1 is for USB DRD, not host controller

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This commit is contained in:
jmcneill 2014-12-07 16:20:33 +00:00
parent cc94747316
commit 6d8fb4d26f
2 changed files with 2 additions and 6 deletions
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2
sys/arch/arm/allwinner/awin_reg.h
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@ -2771,7 +2771,7 @@ struct awin_a31_dma_desc {
#define AWIN_A80_CCU_SCLK_BUS_SOFT_RST1_DMA __BIT(24)
#define AWIN_A80_CCU_SCLK_BUS_SOFT_RST1_GMAC __BIT(17)
#define AWIN_A80_CCU_SCLK_BUS_SOFT_RST1_USB_HOST __BIT(1)
#define AWIN_A80_CCU_SCLK_BUS_SOFT_RST1_USB_DRD __BIT(1)
#define AWIN_A80_CCU_SCLK_BUS_SOFT_RST4_TWI4 __BIT(4)
#define AWIN_A80_CCU_SCLK_BUS_SOFT_RST4_TWI3 __BIT(3)

6
sys/arch/arm/allwinner/awin_usb.c
View File

@ -34,7 +34,7 @@
#include <sys/cdefs.h>
__KERNEL_RCSID(1, "$NetBSD: awin_usb.c,v 1.18 2014/12/05 17:32:08 jmcneill Exp $");
__KERNEL_RCSID(1, "$NetBSD: awin_usb.c,v 1.19 2014/12/07 16:20:33 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@ -473,10 +473,6 @@ awinusb_attach(device_t parent, device_t self, void *aux)
awin_reg_set_clear(usbsc->usbsc_bst, aio->aio_ccm_bsh,
AWIN_A80_CCU_SCLK_BUS_CLK_GATING1_REG,
AWIN_A80_CCU_SCLK_BUS_CLK_GATING1_USB_HOST, 0);
/* Soft reset */
awin_reg_set_clear(usbsc->usbsc_bst, aio->aio_ccm_bsh,
AWIN_A80_CCU_SCLK_BUS_SOFT_RST1_REG,
AWIN_A80_CCU_SCLK_BUS_SOFT_RST1_USB_HOST, 0);
/* Enable USB PHY */
awin_reg_set_clear(usbsc->usbsc_bst, usb_bsh,