PR/49259: J. Lorec: Add support for Realtek 8111G chipset into re(4)

This commit is contained in:
christos 2014-10-10 17:41:05 +00:00
parent 16faa5e7a0
commit 6cf29cdbef
3 changed files with 32 additions and 4 deletions

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@ -1,4 +1,4 @@
/* $NetBSD: rtl8169.c,v 1.140 2014/08/10 16:44:35 tls Exp $ */
/* $NetBSD: rtl8169.c,v 1.141 2014/10/10 17:41:05 christos Exp $ */
/*
* Copyright (c) 1997, 1998-2003
@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: rtl8169.c,v 1.140 2014/08/10 16:44:35 tls Exp $");
__KERNEL_RCSID(0, "$NetBSD: rtl8169.c,v 1.141 2014/10/10 17:41:05 christos Exp $");
/* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
/*
@ -611,6 +611,14 @@ re_attach(struct rtk_softc *sc)
sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
RTKQ_MACSTAT | RTKQ_CMDSTOP | RTKQ_NOJUMBO;
break;
case RTK_HWREV_8168G:
case RTK_HWREV_8168G_SPIN1:
case RTK_HWREV_8168G_SPIN2:
case RTK_HWREV_8168G_SPIN4:
sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
RTKQ_MACSTAT | RTKQ_CMDSTOP | RTKQ_NOJUMBO |
RTKQ_RXDV_GATED;
break;
case RTK_HWREV_8100E:
case RTK_HWREV_8100E_SPIN2:
case RTK_HWREV_8101E:
@ -1834,6 +1842,11 @@ re_init(struct ifnet *ifp)
CSR_WRITE_4(sc, RTK_TXLIST_ADDR_LO,
RE_ADDR_LO(sc->re_ldata.re_tx_list_map->dm_segs[0].ds_addr));
if (sc->sc_quirk & RTKQ_RXDV_GATED) {
CSR_WRITE_4(sc, RTK_MISC,
CSR_READ_4(sc, RTK_MISC) & ~RTK_MISC_RXDV_GATED_EN);
}
/*
* Enable transmit and receive.
*/

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@ -1,4 +1,4 @@
/* $NetBSD: rtl81x9reg.h,v 1.45 2013/12/13 20:52:48 jakllsch Exp $ */
/* $NetBSD: rtl81x9reg.h,v 1.46 2014/10/10 17:41:05 christos Exp $ */
/*
* Copyright (c) 1997, 1998
@ -136,6 +136,7 @@
#define RTK_DBG_REG 0x00D1
#define RTK_MAXRXPKTLEN 0x00DA /* 16 bits, chip multiplies by 8 */
#define RTK_IM 0x00E2
#define RTK_MISC 0x00F0
/*
* TX config register bits
@ -165,6 +166,11 @@
#define RTK_HWREV_8168E 0x2C000000
#define RTK_HWREV_8168E_VL 0x2C800000
#define RTK_HWREV_8168_SPIN1 0x30000000
#define RTK_HWREV_8168G 0x4c000000
#define RTK_HWREV_8168G_SPIN1 0x4c100000
#define RTK_HWREV_8168G_SPIN2 0x50900000
#define RTK_HWREV_8168G_SPIN4 0x5c800000
#define RTK_HWREV_8168GU 0x50800000
#define RTK_HWREV_8100E 0x30800000
#define RTK_HWREV_8101E 0x34000000
#define RTK_HWREV_8102E 0x34800000
@ -214,6 +220,14 @@
#define RTK_TXTH_256 8 /* (x) * 32 bytes */
#define RTK_TXTH_1536 48
/* MISC register */
#define RTK_MISC_TXPLA_RST __BIT(29)
#define RTK_MISC_DISABLE_LAN_EN __BIT(23) /* Enable GPIO pin */
#define RTK_MISC_PWM_EN __BIT(22)
#define RTK_MISC_RXDV_GATED_EN __BIT(19)
#define RTK_MISC_EARLY_TALLY_EN __BIT(16)
/*
* Interrupt status register bits.
*/

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@ -1,4 +1,4 @@
/* $NetBSD: rtl81x9var.h,v 1.53 2012/02/02 19:43:03 tls Exp $ */
/* $NetBSD: rtl81x9var.h,v 1.54 2014/10/10 17:41:05 christos Exp $ */
/*
* Copyright (c) 1997, 1998
@ -192,6 +192,7 @@ struct rtk_softc {
#define RTKQ_MACSTAT 0x00000100 /* set MACSTAT_DIS on init */
#define RTKQ_CMDSTOP 0x00000200 /* set STOPREQ on stop */
#define RTKQ_PHYWAKE_PM 0x00000400 /* wake PHY from power down */
#define RTKQ_RXDV_GATED 0x00000800
bus_dma_tag_t sc_dmat;