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As a stopgap fix: disable a pci_conf_ access at offset 0x82 on archs 

that would mind ;-) IMHO this access violates the PCI spec, so this
should be solved differently.
This commit is contained in:
martin 2007-12-11 11:11:22 +00:00
parent a0dda790c5
commit 6cdfaa0c8f
1 changed files with 8 additions and 2 deletions
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10
sys/dev/pci/pccbb.c
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@ -1,4 +1,4 @@
/* $NetBSD: pccbb.c,v 1.156 2007/12/09 20:28:11 jmcneill Exp $ */
/* $NetBSD: pccbb.c,v 1.157 2007/12/11 11:11:22 martin Exp $ */
/*
* Copyright (c) 1998, 1999 and 2000
@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pccbb.c,v 1.156 2007/12/09 20:28:11 jmcneill Exp $");
__KERNEL_RCSID(0, "$NetBSD: pccbb.c,v 1.157 2007/12/11 11:11:22 martin Exp $");
/*
#define CBB_DEBUG
@ -3243,9 +3243,12 @@ pccbb_suspend(device_t dv)
bus_space_write_4(base_memt, base_memh, CB_SOCKET_MASK, reg);
/* XXX joerg Disable power to the socket? */
#ifdef __NO_STRICT_ALIGNMENT
/* XXX - the register is at 0x82, so this access is not valid */
if (sc->sc_chipset == CB_RX5C47X)
sc->sc_ricoh_misc_ctrl = pci_conf_read(sc->sc_pc,
sc->sc_tag, RICOH_PCI_MISC_CTRL);
#endif
return true;
}
@ -3262,9 +3265,12 @@ pccbb_resume(device_t dv)
/* setup memory and io space window for CB */
pccbb_winset(0x1000, sc, sc->sc_memt);
pccbb_winset(0x04, sc, sc->sc_iot);
#ifdef __NO_STRICT_ALIGNMENT
/* XXX - the register is at 0x82, so this access is not valid */
if (sc->sc_chipset == CB_RX5C47X)
pci_conf_write(sc->sc_pc, sc->sc_tag,
RICOH_PCI_MISC_CTRL, sc->sc_ricoh_misc_ctrl);
#endif
/* CSC Interrupt: Card detect interrupt on */
reg = bus_space_read_4(base_memt, base_memh, CB_SOCKET_MASK);