Initial import of an SD/MMC driver for the Winbond W83L518D (and probably
W83L519D) Integrated Media Reader with PNP bus attachment glue.
This commit is contained in:
jmcneill
parent
89f6fc1189
commit
6c62f91733
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@ -1,4 +1,4 @@
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# $NetBSD: files,v 1.957 2009/09/26 19:05:07 jakllsch Exp $
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# $NetBSD: files,v 1.958 2009/09/30 20:44:49 jmcneill Exp $
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# @(#)files.newconf 7.5 (Berkeley) 5/10/93
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version 20090313
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@ -1147,6 +1147,11 @@ file dev/usb/hid.c hid
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device sdhc: sdmmcbus
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file dev/sdmmc/sdhc.c sdhc needs-flag
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# Winbond Integrated Media Reader
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device wb: sdmmcbus
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file dev/ic/w83l518d.c wb
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file dev/ic/w83l518d_sdmmc.c wb
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# Myson MTD803 3-in-1 Fast Ethernet Controller
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device mtd: arp, ether, ifnet, mii
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file dev/ic/mtd803.c mtd
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@ -1,4 +1,4 @@
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# $NetBSD: files.acpi,v 1.58 2009/08/31 14:48:41 cube Exp $
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# $NetBSD: files.acpi,v 1.59 2009/09/30 20:44:50 jmcneill Exp $
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include "dev/acpi/acpica/files.acpica"
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@ -141,3 +141,7 @@ file dev/acpi/thinkpad_acpi.c thinkpad
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device acpidalb
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attach acpidalb at acpinodebus
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file dev/acpi/dalb_acpi.c acpidalb
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# Winbond Integrated Media Reader
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attach wb at acpinodebus with wb_acpi
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file dev/acpi/wb_acpi.c wb_acpi
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@ -0,0 +1,159 @@
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/* $NetBSD: wb_acpi.c,v 1.1 2009/09/30 20:44:50 jmcneill Exp $ */
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/*
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* Copyright (c) 2009 Jared D. McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: wb_acpi.c,v 1.1 2009/09/30 20:44:50 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <sys/proc.h>
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#include <sys/bus.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmavar.h>
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#include <dev/acpi/acpica.h>
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#include <dev/acpi/acpireg.h>
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#include <dev/acpi/acpivar.h>
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#include <dev/sdmmc/sdmmcvar.h>
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#include <dev/ic/w83l518dvar.h>
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#include <dev/ic/w83l518dreg.h>
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static int wb_acpi_match(device_t, cfdata_t, void *);
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static void wb_acpi_attach(device_t, device_t, void *);
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static int wb_acpi_detach(device_t, int);
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struct wb_acpi_softc {
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struct wb_softc sc_wb;
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isa_chipset_tag_t sc_ic;
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void *sc_ih;
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int sc_ioh_length;
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};
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CFATTACH_DECL_NEW(wb_acpi, sizeof(struct wb_acpi_softc),
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wb_acpi_match,
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wb_acpi_attach,
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wb_acpi_detach,
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NULL
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);
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static const char * const wb_acpi_ids[] = {
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#if notyet
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"WEC0515", /* Memory Stick interface */
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#endif
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"WEC0517", /* SD Memory Card interface */
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NULL
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};
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static int
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wb_acpi_match(device_t parent, cfdata_t match, void *opaque)
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{
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struct acpi_attach_args *aa = opaque;
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if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
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return 0;
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return acpi_match_hid(aa->aa_node->ad_devinfo, wb_acpi_ids);
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}
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static void
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wb_acpi_attach(device_t parent, device_t self, void *opaque)
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{
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struct wb_acpi_softc *sc = device_private(self);
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struct acpi_attach_args *aa = opaque;
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struct acpi_resources res;
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struct acpi_io *io;
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struct acpi_irq *irq;
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bus_space_handle_t ioh;
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ACPI_STATUS rv;
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sc->sc_ic = aa->aa_ic;
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rv = acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS",
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&res, &acpi_resource_parse_ops_default);
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if (ACPI_FAILURE(rv))
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return;
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io = acpi_res_io(&res, 0);
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irq = acpi_res_irq(&res, 0);
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if (io == NULL || irq == NULL) {
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aprint_error_dev(self, "incomplete resources\n");
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goto cleanup;
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}
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if (bus_space_map(aa->aa_iot, io->ar_base, io->ar_length, 0, &ioh)) {
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aprint_error_dev(self, "couldn't map registers\n");
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goto cleanup;
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}
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sc->sc_ioh_length = io->ar_length;
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sc->sc_ih = isa_intr_establish(sc->sc_ic, irq->ar_irq,
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(irq->ar_type == ACPI_EDGE_SENSITIVE) ? IST_EDGE : IST_LEVEL,
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IPL_SDMMC, wb_intr, &sc->sc_wb);
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if (sc->sc_ih == NULL) {
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aprint_error_dev(self,
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"couldn't establish interrupt handler\n");
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goto cleanup;
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}
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sc->sc_wb.wb_dev = self;
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sc->sc_wb.wb_type = WB_DEVNO_SD;
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sc->sc_wb.wb_iot = aa->aa_iot;
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sc->sc_wb.wb_ioh = ioh;
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sc->sc_wb.wb_irq = irq->ar_irq;
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sc->sc_wb.wb_base = io->ar_base;
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wb_attach(&sc->sc_wb);
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cleanup:
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acpi_resource_cleanup(&res);
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}
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static int
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wb_acpi_detach(device_t self, int flags)
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{
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struct wb_acpi_softc *sc = device_private(self);
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int rv;
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rv = wb_detach(&sc->sc_wb, flags);
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if (rv)
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return rv;
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if (sc->sc_ih)
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isa_intr_disestablish(sc->sc_ic, sc->sc_ih);
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if (sc->sc_ioh_length > 0)
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bus_space_unmap(sc->sc_wb.wb_iot, sc->sc_wb.wb_ioh,
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sc->sc_ioh_length);
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return 0;
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}
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@ -0,0 +1,139 @@
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/* $NetBSD: w83l518d.c,v 1.1 2009/09/30 20:44:50 jmcneill Exp $ */
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/*
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* Copyright (c) 2009 Jared D. McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: w83l518d.c,v 1.1 2009/09/30 20:44:50 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <sys/proc.h>
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#include <sys/bus.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmavar.h>
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#include <dev/ic/w83l518dreg.h>
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#include <dev/ic/w83l518dvar.h>
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#include <dev/ic/w83l518d_sdmmc.h>
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uint8_t
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wb_idx_read(struct wb_softc *wb, uint8_t reg)
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{
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bus_space_write_1(wb->wb_iot, wb->wb_ioh, WB_SD_INDEX, reg);
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return bus_space_read_1(wb->wb_iot, wb->wb_ioh, WB_SD_DATA);
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}
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void
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wb_idx_write(struct wb_softc *wb, uint8_t reg, uint8_t val)
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{
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bus_space_write_1(wb->wb_iot, wb->wb_ioh, WB_SD_INDEX, reg);
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bus_space_write_1(wb->wb_iot, wb->wb_ioh, WB_SD_DATA, val);
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}
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uint8_t
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wb_read(struct wb_softc *wb, uint8_t reg)
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{
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return bus_space_read_1(wb->wb_iot, wb->wb_ioh, reg);
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}
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void
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wb_write(struct wb_softc *wb, uint8_t reg, uint8_t val)
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{
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bus_space_write_1(wb->wb_iot, wb->wb_ioh, reg, val);
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}
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void
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wb_led(struct wb_softc *wb, bool enable)
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{
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uint8_t val;
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val = wb_read(wb, WB_SD_CSR);
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if (enable)
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val |= WB_CSR_MS_LED;
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else
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val &= ~WB_CSR_MS_LED;
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wb_write(wb, WB_SD_CSR, val);
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}
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void
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wb_attach(struct wb_softc *wb)
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{
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switch (wb->wb_type) {
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case WB_DEVNO_SD:
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aprint_verbose_dev(wb->wb_dev,
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"SD/MMC Reader\n");
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wb_sdmmc_attach(wb);
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break;
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case WB_DEVNO_MS:
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aprint_verbose_dev(wb->wb_dev,
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"Memory Stick Reader (not supported)\n");
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break;
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case WB_DEVNO_SC:
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aprint_verbose_dev(wb->wb_dev,
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"Smart Card Reader (not supported)\n");
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break;
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case WB_DEVNO_GPIO:
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aprint_verbose_dev(wb->wb_dev,
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"GPIO (not supported)\n");
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break;
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}
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}
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int
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wb_detach(struct wb_softc *wb, int flags)
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{
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switch (wb->wb_type) {
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case WB_DEVNO_SD:
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wb_sdmmc_detach(wb, flags);
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break;
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}
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return 0;
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}
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/*
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* intr handler
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*/
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int
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wb_intr(void *opaque)
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{
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struct wb_softc *wb = opaque;
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switch (wb->wb_type) {
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case WB_DEVNO_SD:
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return wb_sdmmc_intr(wb);
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break;
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}
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return 0;
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}
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@ -0,0 +1,576 @@
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/* $NetBSD: w83l518d_sdmmc.c,v 1.1 2009/09/30 20:44:50 jmcneill Exp $ */
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/*
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* Copyright (c) 2009 Jared D. McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
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* SUCH DAMAGE.
|
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: w83l518d_sdmmc.c,v 1.1 2009/09/30 20:44:50 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <sys/proc.h>
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#include <sys/bus.h>
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#include <dev/sdmmc/sdmmcvar.h>
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#include <dev/sdmmc/sdmmcchip.h>
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#include <dev/sdmmc/sdmmc_ioreg.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmavar.h>
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#include <dev/ic/w83l518dreg.h>
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#include <dev/ic/w83l518dvar.h>
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#include <dev/ic/w83l518d_sdmmc.h>
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/* #define WB_SDMMC_DEBUG */
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#ifdef WB_SDMMC_DEBUG
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static int wb_sdmmc_debug = 1;
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#else
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static int wb_sdmmc_debug = 0;
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#endif
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#if defined(__NetBSD__) && __NetBSD_Version__ < 599000600
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#define snprintb(b, l, f, v) bitmask_snprintf((v), (f), (b), (l))
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#endif
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#define REPORT(_wb, ...) \
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if (wb_sdmmc_debug > 0) \
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aprint_normal_dev(((struct wb_softc *)(_wb))->wb_dev, \
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__VA_ARGS__)
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static int wb_sdmmc_host_reset(sdmmc_chipset_handle_t);
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static uint32_t wb_sdmmc_host_ocr(sdmmc_chipset_handle_t);
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static int wb_sdmmc_host_maxblklen(sdmmc_chipset_handle_t);
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static int wb_sdmmc_card_detect(sdmmc_chipset_handle_t);
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static int wb_sdmmc_write_protect(sdmmc_chipset_handle_t);
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static int wb_sdmmc_bus_power(sdmmc_chipset_handle_t, uint32_t);
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static int wb_sdmmc_bus_clock(sdmmc_chipset_handle_t, int);
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static int wb_sdmmc_bus_width(sdmmc_chipset_handle_t, int);
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static void wb_sdmmc_exec_command(sdmmc_chipset_handle_t,
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struct sdmmc_command *);
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static void wb_sdmmc_card_enable_intr(sdmmc_chipset_handle_t, int);
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static void wb_sdmmc_card_intr_ack(sdmmc_chipset_handle_t);
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static struct sdmmc_chip_functions wb_sdmmc_chip_functions = {
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.host_reset = wb_sdmmc_host_reset,
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.host_ocr = wb_sdmmc_host_ocr,
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.host_maxblklen = wb_sdmmc_host_maxblklen,
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.card_detect = wb_sdmmc_card_detect,
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.write_protect = wb_sdmmc_write_protect,
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.bus_power = wb_sdmmc_bus_power,
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.bus_clock = wb_sdmmc_bus_clock,
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.bus_width = wb_sdmmc_bus_width,
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.exec_command = wb_sdmmc_exec_command,
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.card_enable_intr = wb_sdmmc_card_enable_intr,
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.card_intr_ack = wb_sdmmc_card_intr_ack,
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};
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static void
|
||||
wb_sdmmc_read_data(struct wb_softc *wb, uint8_t *data, int len)
|
||||
{
|
||||
bus_space_read_multi_1(wb->wb_iot, wb->wb_ioh, WB_SD_FIFO, data, len);
|
||||
}
|
||||
|
||||
static void
|
||||
wb_sdmmc_write_data(struct wb_softc *wb, uint8_t *data, int len)
|
||||
{
|
||||
bus_space_write_multi_1(wb->wb_iot, wb->wb_ioh, WB_SD_FIFO, data, len);
|
||||
}
|
||||
|
||||
static void
|
||||
wb_sdmmc_discover(void *opaque)
|
||||
{
|
||||
struct wb_softc *wb = opaque;
|
||||
|
||||
REPORT(wb, "TRACE: discover(wb)\n");
|
||||
|
||||
sdmmc_needs_discover(wb->wb_sdmmc_dev);
|
||||
}
|
||||
|
||||
static bool
|
||||
wb_sdmmc_enable(struct wb_softc *wb)
|
||||
{
|
||||
int i = 5000;
|
||||
|
||||
REPORT(wb, "TRACE: enable(wb)\n");
|
||||
|
||||
/* put the device in a known state */
|
||||
wb_idx_write(wb, WB_INDEX_SETUP, WB_SETUP_SOFT_RST);
|
||||
while (--i > 0 && wb_idx_read(wb, WB_INDEX_SETUP) & WB_SETUP_SOFT_RST)
|
||||
delay(10);
|
||||
if (i == 0) {
|
||||
aprint_error_dev(wb->wb_dev, "timeout resetting device\n");
|
||||
return false;
|
||||
}
|
||||
wb_idx_write(wb, WB_INDEX_CLK, WB_CLK_375K);
|
||||
wb_idx_write(wb, WB_INDEX_FIFOEN, 0);
|
||||
wb_idx_write(wb, WB_INDEX_DMA, 0);
|
||||
wb_idx_write(wb, WB_INDEX_PBSMSB, 0);
|
||||
wb_idx_write(wb, WB_INDEX_PBSLSB, 0);
|
||||
/* drain FIFO */
|
||||
while ((wb_read(wb, WB_SD_FIFOSTS) & WB_FIFO_EMPTY) == 0)
|
||||
wb_read(wb, WB_SD_FIFO);
|
||||
|
||||
wb_write(wb, WB_SD_CSR, 0);
|
||||
|
||||
wb_write(wb, WB_SD_INTCTL, WB_INT_DEFAULT);
|
||||
|
||||
wb_sdmmc_card_detect(wb);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static bool
|
||||
wb_sdmmc_disable(struct wb_softc *wb)
|
||||
{
|
||||
uint8_t val;
|
||||
|
||||
REPORT(wb, "TRACE: disable(wb)\n");
|
||||
|
||||
val = wb_read(wb, WB_SD_CSR);
|
||||
val |= WB_CSR_POWER_N;
|
||||
wb_write(wb, WB_SD_CSR, val);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void
|
||||
wb_sdmmc_attach(struct wb_softc *wb)
|
||||
{
|
||||
struct sdmmcbus_attach_args saa;
|
||||
|
||||
callout_init(&wb->wb_sdmmc_callout, 0);
|
||||
callout_setfunc(&wb->wb_sdmmc_callout, wb_sdmmc_discover, wb);
|
||||
|
||||
wb->wb_sdmmc_width = 1;
|
||||
|
||||
if (wb_sdmmc_enable(wb) == false)
|
||||
return;
|
||||
|
||||
memset(&saa, 0, sizeof(saa));
|
||||
saa.saa_busname = "sdmmc";
|
||||
saa.saa_sct = &wb_sdmmc_chip_functions;
|
||||
saa.saa_sch = wb;
|
||||
saa.saa_clkmin = 375;
|
||||
saa.saa_clkmax = 24000;
|
||||
saa.saa_caps = SMC_CAPS_4BIT_MODE;
|
||||
|
||||
wb->wb_sdmmc_dev = config_found(wb->wb_dev, &saa, NULL);
|
||||
}
|
||||
|
||||
int
|
||||
wb_sdmmc_detach(struct wb_softc *wb, int flags)
|
||||
{
|
||||
int rv;
|
||||
|
||||
if (wb->wb_sdmmc_dev) {
|
||||
rv = config_detach(wb->wb_sdmmc_dev, flags);
|
||||
if (rv)
|
||||
return rv;
|
||||
}
|
||||
wb_sdmmc_disable(wb);
|
||||
|
||||
callout_halt(&wb->wb_sdmmc_callout, NULL);
|
||||
callout_destroy(&wb->wb_sdmmc_callout);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* SD/MMC interface
|
||||
*/
|
||||
static int
|
||||
wb_sdmmc_host_reset(sdmmc_chipset_handle_t sch)
|
||||
{
|
||||
REPORT(sch, "TRACE: sdmmc/host_reset(wb)\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
wb_sdmmc_host_ocr(sdmmc_chipset_handle_t sch)
|
||||
{
|
||||
REPORT(sch, "TRACE: sdmmc/host_ocr(wb)\n");
|
||||
|
||||
return MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V;
|
||||
}
|
||||
|
||||
static int
|
||||
wb_sdmmc_host_maxblklen(sdmmc_chipset_handle_t sch)
|
||||
{
|
||||
REPORT(sch, "TRACE: sdmmc/host_maxblklen(wb)\n");
|
||||
|
||||
return 512; /* XXX */
|
||||
}
|
||||
|
||||
static int
|
||||
wb_sdmmc_card_detect(sdmmc_chipset_handle_t sch)
|
||||
{
|
||||
struct wb_softc *wb = sch;
|
||||
int rv;
|
||||
|
||||
wb_led(wb, true);
|
||||
rv = (wb_read(wb, WB_SD_CSR) & WB_CSR_CARD_PRESENT) ? 1 : 0;
|
||||
wb_led(wb, false);
|
||||
|
||||
REPORT(wb, "TRACE: sdmmc/card_detect(wb) -> %d\n", rv);
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
||||
static int
|
||||
wb_sdmmc_write_protect(sdmmc_chipset_handle_t sch)
|
||||
{
|
||||
struct wb_softc *wb = sch;
|
||||
int rv;
|
||||
|
||||
wb_led(wb, true);
|
||||
rv = (wb_read(wb, WB_SD_CSR) & WB_CSR_WRITE_PROTECT) ? 1 : 0;
|
||||
wb_led(wb, false);
|
||||
|
||||
REPORT(wb, "TRACE: sdmmc/write_protect(wb) -> %d\n", rv);
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
||||
static int
|
||||
wb_sdmmc_bus_power(sdmmc_chipset_handle_t sch, uint32_t ocr)
|
||||
{
|
||||
REPORT(sch, "TRACE: sdmmc/bus_power(wb, ocr=%d)\n", ocr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
wb_sdmmc_bus_clock(sdmmc_chipset_handle_t sch, int freq)
|
||||
{
|
||||
struct wb_softc *wb = sch;
|
||||
uint8_t clk;
|
||||
|
||||
REPORT(wb, "TRACE: sdmmc/bus_clock(wb, freq=%d)\n", freq);
|
||||
|
||||
if (freq >= 24000)
|
||||
clk = WB_CLK_24M;
|
||||
else if (freq >= 16000)
|
||||
clk = WB_CLK_16M;
|
||||
else if (freq >= 12000)
|
||||
clk = WB_CLK_12M;
|
||||
else
|
||||
clk = WB_CLK_375K;
|
||||
|
||||
if (wb_idx_read(wb, WB_INDEX_CLK) != clk)
|
||||
wb_idx_write(wb, WB_INDEX_CLK, clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
wb_sdmmc_bus_width(sdmmc_chipset_handle_t sch, int width)
|
||||
{
|
||||
struct wb_softc *wb = sch;
|
||||
|
||||
REPORT(wb, "TRACE: sdmmc/bus_width(wb, width=%d)\n", width);
|
||||
|
||||
if (width != 1 && width != 4)
|
||||
return 1;
|
||||
|
||||
wb->wb_sdmmc_width = width;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
wb_sdmmc_rsp_read_long(struct wb_softc *wb, struct sdmmc_command *cmd)
|
||||
{
|
||||
uint8_t *p = (uint8_t *)cmd->c_resp;
|
||||
int i;
|
||||
|
||||
if (wb_idx_read(wb, WB_INDEX_RESPLEN) != 1) {
|
||||
cmd->c_error = ENXIO;
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 12; i >= 0; i -= 4) {
|
||||
p[3] = wb_idx_read(wb, WB_INDEX_RESP(i + 0));
|
||||
p[2] = wb_idx_read(wb, WB_INDEX_RESP(i + 1));
|
||||
p[1] = wb_idx_read(wb, WB_INDEX_RESP(i + 2));
|
||||
p[0] = wb_idx_read(wb, WB_INDEX_RESP(i + 3));
|
||||
p += 4;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
wb_sdmmc_rsp_read_short(struct wb_softc *wb, struct sdmmc_command *cmd)
|
||||
{
|
||||
uint8_t *p = (uint8_t *)cmd->c_resp;
|
||||
|
||||
if (wb_idx_read(wb, WB_INDEX_RESPLEN) != 0) {
|
||||
cmd->c_error = ENXIO;
|
||||
return;
|
||||
}
|
||||
|
||||
p[3] = wb_idx_read(wb, WB_INDEX_RESP(12));
|
||||
p[2] = wb_idx_read(wb, WB_INDEX_RESP(13));
|
||||
p[1] = wb_idx_read(wb, WB_INDEX_RESP(14));
|
||||
p[0] = wb_idx_read(wb, WB_INDEX_RESP(15));
|
||||
}
|
||||
|
||||
static int
|
||||
wb_sdmmc_transfer_data(struct wb_softc *wb, struct sdmmc_command *cmd)
|
||||
{
|
||||
uint8_t fifosts;
|
||||
int datalen, retry = 5000;
|
||||
|
||||
if (wb->wb_sdmmc_intsts & WB_INT_CARD)
|
||||
return EIO;
|
||||
|
||||
fifosts = wb_read(wb, WB_SD_FIFOSTS);
|
||||
if (ISSET(cmd->c_flags, SCF_CMD_READ)) {
|
||||
if (fifosts & WB_FIFO_EMPTY) {
|
||||
while (--retry > 0) {
|
||||
fifosts = wb_read(wb, WB_SD_FIFOSTS);
|
||||
if ((fifosts & WB_FIFO_EMPTY) == 0)
|
||||
break;
|
||||
delay(100);
|
||||
}
|
||||
if (retry == 0)
|
||||
return EBUSY;
|
||||
}
|
||||
|
||||
if (fifosts & WB_FIFO_FULL)
|
||||
datalen = 16;
|
||||
else
|
||||
datalen = fifosts & WB_FIFO_DEPTH_MASK;
|
||||
} else {
|
||||
if (fifosts & WB_FIFO_FULL) {
|
||||
while (--retry > 0) {
|
||||
fifosts = wb_read(wb, WB_SD_FIFOSTS);
|
||||
if ((fifosts & WB_FIFO_FULL) == 0)
|
||||
break;
|
||||
delay(100);
|
||||
}
|
||||
if (retry == 0)
|
||||
return EBUSY;
|
||||
}
|
||||
|
||||
if (fifosts & WB_FIFO_EMPTY)
|
||||
datalen = 16;
|
||||
else
|
||||
datalen = 16 - (fifosts & WB_FIFO_DEPTH_MASK);
|
||||
}
|
||||
|
||||
datalen = MIN(datalen, cmd->c_resid);
|
||||
if (datalen > 0) {
|
||||
if (ISSET(cmd->c_flags, SCF_CMD_READ))
|
||||
wb_sdmmc_read_data(wb, cmd->c_buf, datalen);
|
||||
else
|
||||
wb_sdmmc_write_data(wb, cmd->c_buf, datalen);
|
||||
|
||||
cmd->c_buf += datalen;
|
||||
cmd->c_resid -= datalen;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
wb_sdmmc_exec_command(sdmmc_chipset_handle_t sch, struct sdmmc_command *cmd)
|
||||
{
|
||||
static const int opcodes[] = {
|
||||
11, 17, 18, 20, 24, 25, 26, 27, 30, 42, 51, 56
|
||||
};
|
||||
struct wb_softc *wb = sch;
|
||||
uint8_t val;
|
||||
int blklen;
|
||||
int error;
|
||||
int i, retry;
|
||||
int s;
|
||||
|
||||
REPORT(wb, "TRACE: sdmmc/exec_command(wb, cmd) "
|
||||
"opcode %d flags 0x%x data %p datalen %d\n",
|
||||
cmd->c_opcode, cmd->c_flags, cmd->c_data, cmd->c_datalen);
|
||||
|
||||
if (cmd->c_datalen > 0) {
|
||||
/* controller only supports a select number of data opcodes */
|
||||
for (i = 0; i < __arraycount(opcodes); i++)
|
||||
if (opcodes[i] == cmd->c_opcode)
|
||||
break;
|
||||
if (i == __arraycount(opcodes)) {
|
||||
cmd->c_error = EINVAL;
|
||||
goto done;
|
||||
}
|
||||
|
||||
/* Fragment the data into proper blocks */
|
||||
blklen = MIN(cmd->c_datalen, cmd->c_blklen);
|
||||
|
||||
if (cmd->c_datalen % blklen > 0) {
|
||||
aprint_error_dev(wb->wb_dev,
|
||||
"data is not a multiple of %u bytes\n", blklen);
|
||||
cmd->c_error = EINVAL;
|
||||
goto done;
|
||||
}
|
||||
|
||||
/* setup block size registers */
|
||||
blklen = blklen + 2 * wb->wb_sdmmc_width;
|
||||
wb_idx_write(wb, WB_INDEX_PBSMSB,
|
||||
((blklen >> 4) & 0xf0) | (wb->wb_sdmmc_width / 4));
|
||||
wb_idx_write(wb, WB_INDEX_PBSLSB, blklen & 0xff);
|
||||
|
||||
/* clear FIFO */
|
||||
val = wb_idx_read(wb, WB_INDEX_SETUP);
|
||||
val |= WB_SETUP_FIFO_RST;
|
||||
wb_idx_write(wb, WB_INDEX_SETUP, val);
|
||||
while (wb_idx_read(wb, WB_INDEX_SETUP) & WB_SETUP_FIFO_RST)
|
||||
;
|
||||
|
||||
cmd->c_resid = cmd->c_datalen;
|
||||
cmd->c_buf = cmd->c_data;
|
||||
|
||||
/* setup FIFO thresholds */
|
||||
if (ISSET(cmd->c_flags, SCF_CMD_READ))
|
||||
wb_idx_write(wb, WB_INDEX_FIFOEN, WB_FIFOEN_FULL | 8);
|
||||
else {
|
||||
wb_idx_write(wb, WB_INDEX_FIFOEN, WB_FIFOEN_EMPTY | 8);
|
||||
|
||||
/* pre-fill the FIFO on write */
|
||||
error = wb_sdmmc_transfer_data(wb, cmd);
|
||||
if (error) {
|
||||
cmd->c_error = error;
|
||||
goto done;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
s = splsdmmc();
|
||||
wb->wb_sdmmc_intsts = 0;
|
||||
wb_write(wb, WB_SD_COMMAND, cmd->c_opcode);
|
||||
wb_write(wb, WB_SD_COMMAND, (cmd->c_arg >> 24) & 0xff);
|
||||
wb_write(wb, WB_SD_COMMAND, (cmd->c_arg >> 16) & 0xff);
|
||||
wb_write(wb, WB_SD_COMMAND, (cmd->c_arg >> 8) & 0xff);
|
||||
wb_write(wb, WB_SD_COMMAND, (cmd->c_arg >> 0) & 0xff);
|
||||
splx(s);
|
||||
|
||||
retry = 100000;
|
||||
while (wb_idx_read(wb, WB_INDEX_STATUS) & WB_STATUS_CARD_TRAFFIC) {
|
||||
if (--retry == 0)
|
||||
break;
|
||||
delay(1);
|
||||
}
|
||||
if (wb_idx_read(wb, WB_INDEX_STATUS) & WB_STATUS_CARD_TRAFFIC) {
|
||||
REPORT(wb,
|
||||
"command timed out, WB_INDEX_STATUS = 0x%02x\n",
|
||||
wb_idx_read(wb, WB_INDEX_STATUS));
|
||||
cmd->c_error = ETIMEDOUT;
|
||||
goto done;
|
||||
}
|
||||
|
||||
if (ISSET(cmd->c_flags, SCF_RSP_PRESENT)) {
|
||||
if (wb->wb_sdmmc_intsts & WB_INT_TIMEOUT) {
|
||||
cmd->c_error = ETIMEDOUT;
|
||||
goto done;
|
||||
}
|
||||
|
||||
if (ISSET(cmd->c_flags, SCF_RSP_136))
|
||||
wb_sdmmc_rsp_read_long(wb, cmd);
|
||||
else
|
||||
wb_sdmmc_rsp_read_short(wb, cmd);
|
||||
}
|
||||
|
||||
if (cmd->c_error == 0 && cmd->c_datalen > 0) {
|
||||
wb_led(wb, true);
|
||||
while (cmd->c_resid > 0) {
|
||||
error = wb_sdmmc_transfer_data(wb, cmd);
|
||||
if (error) {
|
||||
cmd->c_error = error;
|
||||
break;
|
||||
}
|
||||
}
|
||||
wb_led(wb, false);
|
||||
}
|
||||
|
||||
done:
|
||||
SET(cmd->c_flags, SCF_ITSDONE);
|
||||
|
||||
if (cmd->c_error) {
|
||||
REPORT(wb,
|
||||
"cmd error = %d, op = %d [%s] "
|
||||
"blklen %d datalen %d resid %d\n",
|
||||
cmd->c_error, cmd->c_opcode,
|
||||
ISSET(cmd->c_flags, SCF_CMD_READ) ? "rd" : "wr",
|
||||
cmd->c_blklen, cmd->c_datalen, cmd->c_resid);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
wb_sdmmc_card_enable_intr(sdmmc_chipset_handle_t sch, int enable)
|
||||
{
|
||||
REPORT(sch, "TRACE: sdmmc/card_enable_intr(wb, enable=%d)\n", enable);
|
||||
}
|
||||
|
||||
static void
|
||||
wb_sdmmc_card_intr_ack(sdmmc_chipset_handle_t sch)
|
||||
{
|
||||
REPORT(sch, "TRACE: sdmmc/card_intr_ack(wb)\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* intr handler
|
||||
*/
|
||||
int
|
||||
wb_sdmmc_intr(struct wb_softc *wb)
|
||||
{
|
||||
uint8_t val;
|
||||
|
||||
val = wb_read(wb, WB_SD_INTSTS);
|
||||
if (val == 0xff || val == 0x00)
|
||||
return 0;
|
||||
|
||||
if (wb->wb_sdmmc_dev == NULL)
|
||||
return 1;
|
||||
|
||||
wb->wb_sdmmc_intsts |= val;
|
||||
|
||||
if (wb_sdmmc_debug) {
|
||||
char buf[64];
|
||||
snprintb(buf, sizeof(buf),
|
||||
"\20\1TC\2BUSYEND\3PROGEND\4TIMEOUT"
|
||||
"\5CRC\6FIFO\7CARD\010PENDING",
|
||||
val);
|
||||
REPORT(wb, "WB_SD_INTSTS = %s\n", buf);
|
||||
}
|
||||
|
||||
if (val & WB_INT_CARD)
|
||||
callout_schedule(&wb->wb_sdmmc_callout, hz / 4);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
@ -0,0 +1,35 @@
|
|||
/* $NetBSD: w83l518d_sdmmc.h,v 1.1 2009/09/30 20:44:50 jmcneill Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2009 Jared D. McNeill <jmcneill@invisible.ca>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SYS_DEV_IC_W83L518D_SDMMC_H
|
||||
#define _SYS_DEV_IC_W83L518D_SDMMC_H
|
||||
|
||||
void wb_sdmmc_attach(struct wb_softc *);
|
||||
int wb_sdmmc_detach(struct wb_softc *, int);
|
||||
int wb_sdmmc_intr(struct wb_softc *);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,168 @@
|
|||
/* $NetBSD: w83l518dreg.h,v 1.1 2009/09/30 20:44:50 jmcneill Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2009 Jared D. McNeill <jmcneill@invisible.ca>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SYS_DEV_IC_W83L518DREG_H
|
||||
#define _SYS_DEV_IC_W83L518DREG_H
|
||||
|
||||
/*
|
||||
* Global Registers
|
||||
*/
|
||||
|
||||
#define WB_REG_RESET 0x02
|
||||
#define WB_RESET_SWRST 0x01 /* software reset */
|
||||
|
||||
#define WB_REG_DEVNO 0x07
|
||||
#define WB_DEVNO_SC 0x00 /* Smart Card interface */
|
||||
#define WB_DEVNO_MS 0x01 /* Memory Stick interface */
|
||||
#define WB_DEVNO_GPIO 0x02 /* GPIO */
|
||||
#define WB_DEVNO_SD 0x03 /* SD memory card interface */
|
||||
|
||||
#define WB_REG_DEVID_HI 0x20
|
||||
#define WB_REG_DEVID_LO 0x21
|
||||
#define WB_DEVID_W83L518D 0x7110
|
||||
#define WB_DEVID_W83L519D 0x7120
|
||||
#define WB_DEVID_REVISION(id) ((id) & 0xf)
|
||||
|
||||
#define WB_REG_POWER 0x22
|
||||
#define WB_POWER_SC 0x80 /* Smart Card interface */
|
||||
#define WB_POWER_MS 0x40 /* Memory Stick interface */
|
||||
#define WB_POWER_SD 0x20 /* SD memory card interface */
|
||||
|
||||
#define WB_REG_PME 0x23
|
||||
#define WB_PME_PME_EN 0x80 /* Global PM event enable */
|
||||
#define WB_PME_MSPME_EN 0x40 /* MS PM event enable */
|
||||
#define WB_PME_SDPME_EN 0x20 /* SD PM event enable */
|
||||
#define WB_PME_SCPME_EN 0x10 /* SC PM event enable */
|
||||
|
||||
#define WB_REG_PMESTS 0x24 /* PM event status */
|
||||
#define WB_PMESTS_MSPME_STS 0x40 /* MS PM event status */
|
||||
#define WB_PMESTS_SDPME_STS 0x20 /* SD PM event status */
|
||||
#define WB_PMESTS_SCPME_STS 0x10 /* SC PM event status */
|
||||
|
||||
#define WB_REG_CFG 0x26
|
||||
#define WB_CFG_HEFRAS 0x40 /* Extended func reg addr select */
|
||||
#define WB_CFG_LOCKREG 0x20 /* Config register access control */
|
||||
|
||||
#define WB_REG_MFSEL 0x29 /* Multi-function sel (518 only) */
|
||||
|
||||
/*
|
||||
* Logical Device Interface
|
||||
*/
|
||||
|
||||
#define WB_REG_DEV_EN 0x30
|
||||
#define WB_DEV_EN_ACTIVE 0x01 /* Logical device active bit */
|
||||
|
||||
#define WB_REG_DEV_BASE_HI 0x60
|
||||
#define WB_REG_DEV_BASE_LO 0x61
|
||||
|
||||
#define WB_REG_DEV_IRQ 0x70
|
||||
#define WB_DEV_IRQ_MASK 0x0f
|
||||
|
||||
#define WB_REG_DEV_DRQ 0x74
|
||||
#define WB_DEV_DRQ_MASK 0x0f
|
||||
|
||||
#define WB_REG_DEV_MISC 0xf0
|
||||
#define WB_DEV_MISC_SCIRQ_SHR 0x80 /* SC: IRQ sharing control */
|
||||
#define WB_DEV_MISC_SCPSNT_POL 0x01 /* SC: SC present polarity */
|
||||
#define WB_DEV_MISC_MSIRQ_POLL 0x10 /* MS: IRQ polarity control (level) */
|
||||
#define WB_DEV_MISC_MSIRQ_POLP 0x08 /* MS: IRQ polarity control (pulse) */
|
||||
#define WB_DEV_MISC_MSIRQ_SHR 0x04 /* MS: IRQ sharing control */
|
||||
#define WB_DEV_MISC_MS4OUT_POL 0x02 /* MS: MS4 output polarity control */
|
||||
#define WB_DEV_MISC_MS4OUT_EN 0x01 /* MS: MS4 output enable */
|
||||
#define WB_DEV_MISC_SDDATA3_HI 0x20 /* SD: DATA3 pin will output high */
|
||||
#define WB_DEV_MISC_SDDATA3_OUT 0x10 /* SD: DATA3 pin to output pin */
|
||||
#define WB_DEV_MISC_SDGP11_HI 0x04 /* SD: GP11 card-detect pin pole */
|
||||
#define WB_DEV_MISC_SDGP11_DET 0x02 /* SD: GP11 card-detect enable */
|
||||
#define WB_DEV_MISC_SDDATA3_DET 0x01 /* SD: DATA3 card-detect enable */
|
||||
|
||||
#define WB_REG_DEV_IRQCFG 0xf1
|
||||
#define WB_DEV_IRQCFG_HI_L 0x08
|
||||
#define WB_DEV_IRQCFG_HI_P 0x04
|
||||
#define WB_DEV_IRQCFG_MODE 0x02
|
||||
#define WB_DEV_IRQCFG_DEBOUNCE 0x01
|
||||
|
||||
/*
|
||||
* SD Card interface registers
|
||||
*/
|
||||
|
||||
#define WB_SD_COMMAND 0x00
|
||||
#define WB_SD_FIFO 0x01
|
||||
#define WB_SD_INTCTL 0x02
|
||||
#define WB_SD_INTSTS 0x03
|
||||
#define WB_INT_PENDING 0x80
|
||||
#define WB_INT_CARD 0x40
|
||||
#define WB_INT_FIFO 0x20
|
||||
#define WB_INT_CRC 0x10
|
||||
#define WB_INT_TIMEOUT 0x08
|
||||
#define WB_INT_PROGEND 0x04
|
||||
#define WB_INT_BUSYEND 0x02
|
||||
#define WB_INT_TC 0x01
|
||||
#define WB_INT_DEFAULT \
|
||||
(WB_INT_CARD|WB_INT_FIFO|WB_INT_CRC|WB_INT_TIMEOUT)
|
||||
#define WB_SD_FIFOSTS 0x04
|
||||
#define WB_FIFO_EMPTY 0x80
|
||||
#define WB_FIFO_FULL 0x40
|
||||
#define WB_FIFO_EMPTY_THRES 0x20
|
||||
#define WB_FIFO_FULL_THRES 0x10
|
||||
#define WB_FIFO_DEPTH_MASK 0x0f
|
||||
#define WB_SD_INDEX 0x05
|
||||
#define WB_INDEX_CLK 0x01
|
||||
#define WB_CLK_375K 0x00
|
||||
#define WB_CLK_12M 0x01
|
||||
#define WB_CLK_16M 0x02
|
||||
#define WB_CLK_24M 0x03
|
||||
#define WB_INDEX_PBSMSB 0x02
|
||||
#define WB_INDEX_TAAC 0x03
|
||||
#define WB_INDEX_NSAC 0x04
|
||||
#define WB_INDEX_PBSLSB 0x05
|
||||
#define WB_INDEX_SETUP 0x06
|
||||
#define WB_SETUP_DATA3_HI 0x08
|
||||
#define WB_SETUP_FIFO_RST 0x04
|
||||
#define WB_SETUP_SOFT_RST 0x02
|
||||
#define WB_INDEX_DMA 0x07
|
||||
#define WB_INDEX_FIFOEN 0x08
|
||||
#define WB_FIFOEN_EMPTY 0x20
|
||||
#define WB_FIFOEN_FULL 0x10
|
||||
#define WB_INDEX_STATUS 0x10
|
||||
#define WB_STATUS_BLOCK_READ 0x80
|
||||
#define WB_STATUS_BLOCK_WRITE 0x40
|
||||
#define WB_STATUS_BUSY 0x20
|
||||
#define WB_STATUS_CARD_TRAFFIC 0x04
|
||||
#define WB_STATUS_SEND_COMMAND 0x02
|
||||
#define WB_STATUS_RECV_RES 0x01
|
||||
#define WB_INDEX_RESPLEN 0x1e
|
||||
#define WB_INDEX_RESP(n) (0x1f + (n))
|
||||
#define WB_INDEX_CRCSTS 0x30
|
||||
#define WB_INDEX_ISR 0x3f
|
||||
#define WB_SD_DATA 0x06
|
||||
#define WB_SD_CSR 0x07
|
||||
#define WB_CSR_MS_LED 0x20
|
||||
#define WB_CSR_POWER_N 0x10
|
||||
#define WB_CSR_WRITE_PROTECT 0x04
|
||||
#define WB_CSR_CARD_PRESENT 0x01
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
/* $NetBSD: w83l518dvar.h,v 1.1 2009/09/30 20:44:50 jmcneill Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2009 Jared D. McNeill <jmcneill@invisible.ca>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SYS_DEV_IC_W83L518DVAR_H
|
||||
#define _SYS_DEV_IC_W83L518DVAR_H
|
||||
|
||||
struct wb_softc {
|
||||
device_t wb_dev;
|
||||
|
||||
/* to be filled in by bus driver */
|
||||
bus_space_tag_t wb_iot;
|
||||
bus_space_handle_t wb_ioh;
|
||||
uint8_t wb_type;
|
||||
uint16_t wb_base;
|
||||
uint8_t wb_irq;
|
||||
|
||||
/* private */
|
||||
device_t wb_sdmmc_dev;
|
||||
int wb_sdmmc_width;
|
||||
uint8_t wb_sdmmc_intsts;
|
||||
callout_t wb_sdmmc_callout;
|
||||
};
|
||||
|
||||
void wb_attach(struct wb_softc *);
|
||||
int wb_detach(struct wb_softc *, int);
|
||||
int wb_intr(void *);
|
||||
|
||||
uint8_t wb_read(struct wb_softc *, uint8_t);
|
||||
void wb_write(struct wb_softc *, uint8_t, uint8_t);
|
||||
uint8_t wb_idx_read(struct wb_softc *, uint8_t);
|
||||
void wb_idx_write(struct wb_softc *, uint8_t, uint8_t);
|
||||
|
||||
void wb_led(struct wb_softc *, bool);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue