add some more casts to shut up gcc.
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mrg
parent
736ce53ae5
commit
6b64191106
@ -1,4 +1,4 @@
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/* $NetBSD: emul.c,v 1.5 1999/11/06 20:18:50 eeh Exp $ */
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/* $NetBSD: emul.c,v 1.6 2000/04/06 12:49:00 mrg Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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@ -52,8 +52,8 @@
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# define DPRINTF(a)
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#endif
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#define GPR(tf, i) ((int32_t *) &tf->tf_global)[i]
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#define IPR(tf, i) ((int32_t *) tf->tf_out[6])[i - 16]
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#define GPR(tf, i) ((int32_t *)(u_long)&tf->tf_global)[i]
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#define IPR(tf, i) ((int32_t *)(u_long)tf->tf_out[6])[i - 16]
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#define FPR(p, i) ((int32_t) p->p_md.md_fpstate->fs_regs[i])
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static __inline int readgpreg __P((struct trapframe64 *, int, void *));
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@ -209,17 +209,17 @@ muldiv(tf, code, rd, rs1, rs2)
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tf->tf_tstate &= ~(TSTATE_CCR);
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if (*rd == 0)
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tf->tf_tstate |= (ICC_Z|XCC_Z) << TSTATE_CCR_SHIFT;
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tf->tf_tstate |= (u_int64_t)(ICC_Z|XCC_Z) << TSTATE_CCR_SHIFT;
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else {
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if (op.bits.sgn && *rd < 0)
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tf->tf_tstate |= (ICC_N|XCC_N) << TSTATE_CCR_SHIFT;
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tf->tf_tstate |= (u_int64_t)(ICC_N|XCC_N) << TSTATE_CCR_SHIFT;
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if (op.bits.div) {
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if (*rd * *rs2 != *rs1)
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tf->tf_tstate |= (ICC_V|XCC_V) << TSTATE_CCR_SHIFT;
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tf->tf_tstate |= (u_int64_t)(ICC_V|XCC_V) << TSTATE_CCR_SHIFT;
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}
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else {
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if (*rd / *rs2 != *rs1)
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tf->tf_tstate |= (ICC_V|XCC_V) << TSTATE_CCR_SHIFT;
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tf->tf_tstate |= (u_int64_t)(ICC_V|XCC_V) << TSTATE_CCR_SHIFT;
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}
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}
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}
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@ -268,7 +268,7 @@ fixalign(p, tf)
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int error;
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/* fetch and check the instruction that caused the fault */
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error = copyin((caddr_t) tf->tf_pc, &code.i_int, sizeof(code.i_int));
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error = copyin((caddr_t)(u_long)tf->tf_pc, &code.i_int, sizeof(code.i_int));
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if (error != 0) {
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DPRINTF(("fixalign: Bad instruction fetch\n"));
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return EINVAL;
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@ -345,13 +345,13 @@ fixalign(p, tf)
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}
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if (size == 2)
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return copyout(&data.s[1], (caddr_t) rs1, size);
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return copyout(&data.s[1], (caddr_t)(u_long)rs1, size);
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else
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return copyout(&data.d, (caddr_t) rs1, size);
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return copyout(&data.d, (caddr_t)(u_long)rs1, size);
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}
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else { /* load */
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if (size == 2) {
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error = copyin((caddr_t) rs1, &data.s[1], size);
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error = copyin((caddr_t)(u_long)rs1, &data.s[1], size);
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if (error)
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return error;
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@ -362,7 +362,7 @@ fixalign(p, tf)
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data.s[0] = 0;
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}
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else
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error = copyin((caddr_t) rs1, &data.d, size);
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error = copyin((caddr_t)(u_long)rs1, &data.d, size);
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if (error)
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return error;
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@ -1,4 +1,4 @@
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/* $NetBSD: openfirm.c,v 1.8 1999/10/31 15:22:32 mrg Exp $ */
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/* $NetBSD: openfirm.c,v 1.9 2000/04/06 12:49:00 mrg Exp $ */
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/*
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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@ -458,7 +458,7 @@ OF_read(handle, addr, len)
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args.nreturns = 1;
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args.ihandle = HDL2CELL(handle);
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args.addr = ADR2CELL(addr);
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for (; len > 0; len -= l, addr += l) {
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for (; len > 0; len -= l, (char *)addr += l) {
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l = min(NBPG, len);
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args.len = l;
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if (openfirmware(&args) == -1)
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@ -507,7 +507,7 @@ Debugger();
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panic("OF_write");
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#endif
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}
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for (; len > 0; len -= l, addr += l) {
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for (; len > 0; len -= l, (char *)addr += l) {
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l = min(NBPG, len);
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args.len = l;
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if (openfirmware(&args) == -1)
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@ -615,8 +615,8 @@ OF_poweroff()
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}
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void
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(*OF_set_callback(newfunc))()
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void (*newfunc)();
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(*OF_set_callback(newfunc))(void *)
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void (*newfunc)(void *);
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{
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struct {
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cell_t name;
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@ -690,7 +690,7 @@ void OF_sym2val(cells)
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args->result = -1;
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return;
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}
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symbol = (db_sym_t)args->symbol;
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symbol = (db_sym_t)(u_long)args->symbol;
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prom_printf("looking up symbol %s\n", symbol);
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db_symbol_values(symbol, (char**)NULL, &value);
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args->result = 0;
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.48 2000/03/16 02:37:00 eeh Exp $ */
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/* $NetBSD: pmap.c,v 1.49 2000/04/06 12:49:00 mrg Exp $ */
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#undef NO_VCACHE /* Don't forget the locked TLB in dostart */
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#define HWREF 1
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#undef BOOT_DEBUG
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@ -244,7 +244,9 @@ static int pmap_initialized;
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int avail_start, avail_end; /* These are used by ps & family */
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static int ptelookup_va __P((vaddr_t va)); /* sun4u */
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#if notyet
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static void tsb_enter __P((int ctx, int64_t va, int64_t data));
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#endif
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static void pmap_pinit __P((struct pmap *));
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static void pmap_release __P((pmap_t));
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@ -893,7 +895,7 @@ pmap_bootstrap(kernelstart, kernelend, maxctx)
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pmap_get_page(&newp);
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pmap_zero_page(newp);
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} while (!newp); /* Throw away page zero */
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pmap_kernel()->pm_segs=(paddr_t*)newp;
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pmap_kernel()->pm_segs=(paddr_t *)(u_long)newp;
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pmap_kernel()->pm_physaddr = newp;
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/* mark kernel context as busy */
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((paddr_t*)ctxbusy)[0] = (int)pmap_kernel()->pm_physaddr;
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@ -1128,7 +1130,7 @@ pmap_pinit(pm)
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}
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pm->pm_physaddr = (paddr_t)VM_PAGE_TO_PHYS(page);
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pmap_zero_page(pm->pm_physaddr);
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pm->pm_segs = (paddr_t*)pm->pm_physaddr;
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pm->pm_segs = (paddr_t *)(u_long)pm->pm_physaddr;
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if (!pm->pm_physaddr) panic("pmap_pinit");
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#ifdef NOTDEF_DEBUG
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printf("pmap_pinit: segs %p == %p\n", pm->pm_segs, (void*)page->phys_addr);
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@ -1189,18 +1191,18 @@ pmap_release(pm)
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for(i=0; i<STSZ; i++)
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if((pdir = (paddr_t *)ldxa(&pm->pm_segs[i], ASI_PHYS_CACHED))) {
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for (k=0; k<PDSZ; k++) {
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if ((ptbl = (paddr_t *)ldxa(&pdir[k], ASI_PHYS_CACHED))) {
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if ((ptbl = (paddr_t *)(u_long)ldxa(&pdir[k], ASI_PHYS_CACHED))) {
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for (j=0; j<PTSZ; j++) {
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int64_t data = ldxa(&ptbl[j], ASI_PHYS_CACHED);
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if (data&TLB_V &&
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IS_VM_PHYSADDR(data&TLB_PA_MASK)) {
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#ifdef DEBUG
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printf("pmap_release: pm=%p page %p still in use\n", pm,
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((long)i<<STSHIFT)|((long)k<<PDSHIFT)|((long)j<<PTSHIFT));
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printf("pmap_release: pm=%p page %llx still in use\n", pm,
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((u_int64_t)i<<STSHIFT)|((u_int64_t)k<<PDSHIFT)|((u_int64_t)j<<PTSHIFT));
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Debugger();
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#endif
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pmap_remove_pv(pm,
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((long)i<<STSHIFT)|((long)k<<PDSHIFT)|((long)j<<PTSHIFT),
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(long)((u_int64_t)i<<STSHIFT)|((long)k<<PDSHIFT)|((long)j<<PTSHIFT),
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data&TLB_PA_MASK);
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}
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}
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@ -1396,7 +1398,7 @@ pmap_kenter_pa(va, pa, prot)
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paddr_t pa;
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vm_prot_t prot;
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{
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return pmap_enter(pmap_kernel(), va, pa, prot, prot|PMAP_WIRED);
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pmap_enter(pmap_kernel(), va, pa, prot, prot|PMAP_WIRED);
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}
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#else
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void
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@ -1471,7 +1473,6 @@ pmap_kenter_pa(va, pa, prot)
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#endif
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tsb_enter(pm->pm_ctx, va, tte.data.data);
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ASSERT((tsb[i].data.data & TLB_NFO) == 0);
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#if 1
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#if 1
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/* this is correct */
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dcache_flush_page(va);
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@ -1479,7 +1480,6 @@ pmap_kenter_pa(va, pa, prot)
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/* Go totally crazy */
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blast_vcache();
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#endif
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#endif
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}
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#endif
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@ -1621,9 +1621,9 @@ pmap_enter(pm, va, pa, prot, flags)
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int flags;
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{
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pte_t tte;
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int s, i, aliased = 0;
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register pv_entry_t pv=NULL, npv;
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paddr_t pg;
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int i, aliased = 0;
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pv_entry_t pv = NULL;
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int size = 0; /* PMAP_SZ_TO_TTE(pa); */
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boolean_t wired = (flags & PMAP_WIRED) != 0;
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@ -1691,7 +1691,10 @@ pmap_enter(pm, va, pa, prot, flags)
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#ifdef DEBUG
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enter_stats.ci ++;
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#endif
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/* tte.tag.tag = TSB_TAG(0,pm->pm_ctx,va); /* Not used any more. */
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/*
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* Not used any more.
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tte.tag.tag = TSB_TAG(0,pm->pm_ctx,va);
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*/
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tte.data.data = TSB_DATA(0, size, pa, pm == pmap_kernel(),
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(flags & VM_PROT_WRITE),
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(!(pa & PMAP_NC)),aliased,1,(pa & PMAP_LITTLE));
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@ -1733,14 +1736,16 @@ pmap_enter(pm, va, pa, prot, flags)
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}
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#if 1
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if (pv) pmap_enter_pv(pm, va, pa);
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if (pv)
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pmap_enter_pv(pm, va, pa);
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#else
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if (pv) {
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/*
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* Enter the pmap and virtual address into the
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* physical to virtual map table.
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*/
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s = splimp();
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int npv;
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int s = splimp();
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#ifdef DEBUG
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if (pmapdebug & PDB_ENTER)
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printf("pmap_enter: pv %x: was %x/%x/%x ",
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@ -2431,7 +2436,9 @@ ptelookup_va(va)
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return (tsbptr/sizeof(pte_t));
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}
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void tsb_enter(ctx, va, data)
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#if notyet
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void
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tsb_enter(ctx, va, data)
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int ctx;
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int64_t va;
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int64_t data;
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@ -2453,6 +2460,7 @@ void tsb_enter(ctx, va, data)
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tlb_flush_pte(va, ctx); /* Force reload -- protections may be changed */
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splx(s);
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}
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#endif
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/*
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* Do whatever is needed to sync the MOD/REF flags
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@ -2540,9 +2548,6 @@ pmap_clear_modify(pg)
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printf("pmap_clear_modify(): %p still modified!\n", pg);
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Debugger();
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}
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#endif
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out:
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#ifdef DEBUG
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if (pmapdebug & (PDB_CHANGEPROT|PDB_REF))
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printf("pmap_clear_modify: page %lx %s\n", (long)pa,
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(changed?"was modified":"was not modified"));
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@ -2642,9 +2647,6 @@ pmap_clear_reference(pg)
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printf("pmap_clear_reference(): %p still referenced!\n", pg);
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Debugger();
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}
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#endif
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out:
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#ifdef DEBUG
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if (pmapdebug & (PDB_CHANGEPROT|PDB_REF))
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printf("pmap_clear_reference: page %lx %s\n", (long)pa,
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(changed?"was referenced":"was not referenced"));
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@ -3028,7 +3030,9 @@ pmap_page_protect(pg, prot)
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pv->pv_pmap = NULL;
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pv->pv_next = NULL;
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}
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#if 0
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skipit:
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#endif
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}
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splx(s);
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}
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