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pmap_pageidlezero: use sse2 non-temporal store insn if available

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to avoid undesired cache pollution.
This commit is contained in:
yamt 2004-10-10 09:55:24 +00:00
parent 61c1570d03
commit 6b5cc3859a
1 changed files with 21 additions and 5 deletions
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26
sys/arch/i386/i386/pmap.c
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@ -1,4 +1,4 @@
/* $NetBSD: pmap.c,v 1.178 2004/10/10 09:54:46 yamt Exp $ */
/* $NetBSD: pmap.c,v 1.179 2004/10/10 09:55:24 yamt Exp $ */
/*
*
@ -60,7 +60,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.178 2004/10/10 09:54:46 yamt Exp $");
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.179 2004/10/10 09:55:24 yamt Exp $");
#include "opt_cputype.h"
#include "opt_user_ldt.h"
@ -2296,7 +2296,11 @@ pmap_pageidlezero(pa)
pt_entry_t *zpte = PTESLEW(zero_pte, id);
caddr_t zerova = VASLEW(zerop, id);
boolean_t rv = TRUE;
int i, *ptr;
int *ptr;
int *ep;
#if defined(I686_CPU)
const u_int32_t cpu_features = curcpu()->ci_feature_flags;
#endif /* defined(I686_CPU) */
#ifdef DIAGNOSTIC
if (*zpte)
@ -2304,7 +2308,8 @@ pmap_pageidlezero(pa)
#endif
*zpte = (pa & PG_FRAME) | PG_V | PG_RW | PG_M | PG_U; /* map in */
pmap_update_pg((vaddr_t)zerova); /* flush TLB */
for (i = 0, ptr = (int *) zerova; i < PAGE_SIZE / sizeof(int); i++) {
for (ptr = (int *) zerova, ep = ptr + PAGE_SIZE / sizeof(int);
ptr < ep; ptr++) {
if (sched_whichqs != 0) {
/*
@ -2317,9 +2322,20 @@ pmap_pageidlezero(pa)
rv = FALSE;
break;
}
*ptr++ = 0;
#if defined(I686_CPU)
if (cpu_features & CPUID_SSE2)
__asm __volatile ("movnti %1, %0" :
"=m"(*ptr) : "r" (0));
else
#endif /* defined(I686_CPU) */
*ptr = 0;
}
#if defined(I686_CPU)
if (cpu_features & CPUID_SSE2)
__asm __volatile ("sfence" ::: "memory");
#endif /* defined(I686_CPU) */
#ifdef DIAGNOSTIC
*zpte = 0; /* zap! */
#endif