Tweak previous: use shorter instructions to accomplish the same
#task (minimizes overhead).
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/* $NetBSD: locore.s,v 1.115 1999/06/09 06:59:53 scottr Exp $ */
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/* $NetBSD: locore.s,v 1.116 1999/06/09 15:34:08 scottr Exp $ */
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/*
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/*
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1988 University of Utah.
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@ -1499,20 +1499,23 @@ Lm68881rdone:
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* the loops will run from a single cache half-line.
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* the loops will run from a single cache half-line.
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*/
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*/
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.align 8 | align to half-line boundary
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.align 8 | align to half-line boundary
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nop | pad to align Ldelay
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nop
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nop
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ENTRY(_delay)
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ENTRY(_delay)
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movl sp@(4),d0
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movl sp@(4),d0 | get iterations
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jeq Ldelayexit
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jeq Ldelayexit | bail out if nothing to do
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movl d0,d1
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movql #0,d1 | put bits 15-0 in d1 for the
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andl #0xffff,d0
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movw d0,d1 | inner loop, and move bits
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swap d1
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movw #0,d0 | 31-16 to the low-order word
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subql #1,d0
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subql #1,d1 | of d0 for the outer loop
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andl #0xffff,d1
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swap d0
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Ldelay:
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Ldelay:
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tstl _C_LABEL(delay_flag)
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tstl _C_LABEL(delay_flag) | this never changes for delay()!
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dbeq d1,Ldelay | (used only for timing purposes)
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dbeq d0,Ldelay
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dbeq d0,Ldelay
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dbeq d1,Ldelay
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addqw #1,d1 | adjust end count and
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addql #1,d0
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swap d0 | return the longword result
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swap d1
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orl d1,d0
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orl d1,d0
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Ldelayexit:
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Ldelayexit:
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rts
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rts
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