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Account for changed bus attachment scheme.

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This commit is contained in:
pk 1998-03-21 20:11:30 +00:00
parent 165120cfaf
commit 69fe6f242f
21 changed files with 2005 additions and 1281 deletions
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123
sys/arch/sparc/dev/am7930_sparc.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: am7930_sparc.c,v 1.35 1998/01/12 20:23:40 thorpej Exp $ */
/* $NetBSD: am7930_sparc.c,v 1.36 1998/03/21 20:14:13 pk Exp $ */
/*
* Copyright (c) 1995 Rolf Grossmann
@ -40,6 +40,7 @@
#include <sys/device.h>
#include <sys/proc.h>
#include <machine/bus.h>
#include <machine/autoconf.h>
#include <machine/cpu.h>
@ -65,7 +66,8 @@ int amd7930debug = 0;
*/
struct amd7930_softc {
struct device sc_dev; /* base device */
struct intrhand sc_hwih; /* hardware interrupt vector */
bus_space_tag_t sc_bustag;
/*struct intrhand sc_hwih; -* hardware interrupt vector */
struct intrhand sc_swih; /* software interrupt vector */
int sc_open; /* single use device */
@ -111,11 +113,19 @@ void audio_setmap __P((volatile struct amd7930 *, struct mapreg *));
static void init_amd __P((volatile struct amd7930 *));
/* autoconfiguration driver */
void amd7930attach __P((struct device *, struct device *, void *));
int amd7930match __P((struct device *, struct cfdata *, void *));
void amd7930attach_mainbus __P((struct device *, struct device *, void *));
int amd7930match_mainbus __P((struct device *, struct cfdata *, void *));
void amd7930attach_sbus __P((struct device *, struct device *, void *));
int amd7930match_sbus __P((struct device *, struct cfdata *, void *));
struct cfattach audioamd_ca = {
sizeof(struct amd7930_softc), amd7930match, amd7930attach
void amd7930attach __P((struct amd7930_softc *, int));
struct cfattach audioamd_mainbus_ca = {
sizeof(struct amd7930_softc), amd7930match_mainbus, amd7930attach_mainbus
};
struct cfattach audioamd_sbus_ca = {
sizeof(struct amd7930_softc), amd7930match_sbus, amd7930attach_sbus
};
struct audio_device amd7930_device = {
@ -250,64 +260,113 @@ struct audio_hw_if sa_hw_if = {
/* autoconfig routines */
int
amd7930match(parent, cf, aux)
amd7930match_mainbus(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
register struct confargs *ca = aux;
register struct romaux *ra = &ca->ca_ra;
struct mainbus_attach_args *ma = aux;
if (CPU_ISSUN4)
return (0);
return (strcmp(AUDIO_ROM_NAME, ra->ra_name) == 0);
return (strcmp(AUDIO_ROM_NAME, ma->ma_name) == 0);
}
int
amd7930match_sbus(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct sbus_attach_args *sa = aux;
return (strcmp(AUDIO_ROM_NAME, sa->sa_name) == 0);
}
/*
* Audio chip found.
*/
void
amd7930attach(parent, self, args)
amd7930attach_mainbus(parent, self, aux)
struct device *parent, *self;
void *args;
void *aux;
{
register struct amd7930_softc *sc = (struct amd7930_softc *)self;
register struct confargs *ca = args;
register struct romaux *ra = &ca->ca_ra;
register volatile struct amd7930 *amd;
register int pri;
struct mainbus_attach_args *ma = aux;
struct amd7930_softc *sc = (struct amd7930_softc *)self;
bus_space_handle_t bh;
if (ra->ra_nintr != 1) {
printf(": expected 1 interrupt, got %d\n", ra->ra_nintr);
sc->sc_bustag = ma->ma_bustag;
if (sparc_bus_map(
ma->ma_bustag,
ma->ma_iospace,
(bus_addr_t)ma->ma_paddr,
sizeof(struct amd7930),
BUS_SPACE_MAP_LINEAR,
0,
&bh) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
pri = ra->ra_intr[0].int_pri;
printf(" pri %d, softpri %d\n", pri, PIL_AUSOFT);
amd = (volatile struct amd7930 *)(ra->ra_vaddr ?
ra->ra_vaddr : mapiodev(ra->ra_reg, 0, sizeof (*amd)));
sc->sc_au.au_amd = (volatile struct amd7930 *)bh;
amd7930attach(sc, ma->ma_pri);
}
void
amd7930attach_sbus(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct sbus_attach_args *sa = aux;
struct amd7930_softc *sc = (struct amd7930_softc *)self;
bus_space_handle_t bh;
sc->sc_bustag = sa->sa_bustag;
if (sbus_bus_map(
sa->sa_bustag,
sa->sa_slot,
sa->sa_offset,
sizeof(struct amd7930),
0, 0,
&bh) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
sc->sc_au.au_amd = (volatile struct amd7930 *)bh;
amd7930attach(sc, sa->sa_pri);
}
void
amd7930attach(sc, pri)
struct amd7930_softc *sc;
int pri;
{
printf(" softpri %d\n", PIL_AUSOFT);
sc->sc_map.mr_mmr1 = AMD_MMR1_GX | AMD_MMR1_GER |
AMD_MMR1_GR | AMD_MMR1_STG;
sc->sc_au.au_amd = amd;
/* set boot defaults */
sc->sc_rlevel = 128;
sc->sc_plevel = 128;
sc->sc_mlevel = 0;
sc->sc_out_port = SUNAUDIO_SPEAKER;
init_amd(amd);
init_amd(sc->sc_au.au_amd);
#ifndef AUDIO_C_HANDLER
auiop = &sc->sc_au;
intr_fasttrap(pri, amd7930_trap);
(void)bus_intr_establish(sc->sc_bustag, pri,
BUS_INTR_ESTABLISH_FASTTRAP,
(int (*) __P((void *)))amd7930_trap, NULL);
#else
sc->sc_hwih.ih_fun = amd7930hwintr;
sc->sc_hwih.ih_arg = &sc->sc_au;
intr_establish(pri, &sc->sc_hwih);
(void)bus_intr_establish(sc->sc_bustag, pri, 0,
amd7930hwintr, &sc->sc_au);
#endif
sc->sc_swih.ih_fun = amd7930swintr;
sc->sc_swih.ih_arg = sc;
intr_establish(PIL_AUSOFT, &sc->sc_swih);
(void)bus_intr_establish(sc->sc_bustag, PIL_AUSOFT,
BUS_INTR_ESTABLISH_SOFTINTR,
amd7930swintr, sc);
evcnt_attach(&sc->sc_dev, "intr", &sc->sc_intrcnt);

123
sys/arch/sparc/dev/amd7930.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: amd7930.c,v 1.35 1998/01/12 20:23:40 thorpej Exp $ */
/* $NetBSD: amd7930.c,v 1.36 1998/03/21 20:14:13 pk Exp $ */
/*
* Copyright (c) 1995 Rolf Grossmann
@ -40,6 +40,7 @@
#include <sys/device.h>
#include <sys/proc.h>
#include <machine/bus.h>
#include <machine/autoconf.h>
#include <machine/cpu.h>
@ -65,7 +66,8 @@ int amd7930debug = 0;
*/
struct amd7930_softc {
struct device sc_dev; /* base device */
struct intrhand sc_hwih; /* hardware interrupt vector */
bus_space_tag_t sc_bustag;
/*struct intrhand sc_hwih; -* hardware interrupt vector */
struct intrhand sc_swih; /* software interrupt vector */
int sc_open; /* single use device */
@ -111,11 +113,19 @@ void audio_setmap __P((volatile struct amd7930 *, struct mapreg *));
static void init_amd __P((volatile struct amd7930 *));
/* autoconfiguration driver */
void amd7930attach __P((struct device *, struct device *, void *));
int amd7930match __P((struct device *, struct cfdata *, void *));
void amd7930attach_mainbus __P((struct device *, struct device *, void *));
int amd7930match_mainbus __P((struct device *, struct cfdata *, void *));
void amd7930attach_sbus __P((struct device *, struct device *, void *));
int amd7930match_sbus __P((struct device *, struct cfdata *, void *));
struct cfattach audioamd_ca = {
sizeof(struct amd7930_softc), amd7930match, amd7930attach
void amd7930attach __P((struct amd7930_softc *, int));
struct cfattach audioamd_mainbus_ca = {
sizeof(struct amd7930_softc), amd7930match_mainbus, amd7930attach_mainbus
};
struct cfattach audioamd_sbus_ca = {
sizeof(struct amd7930_softc), amd7930match_sbus, amd7930attach_sbus
};
struct audio_device amd7930_device = {
@ -250,64 +260,113 @@ struct audio_hw_if sa_hw_if = {
/* autoconfig routines */
int
amd7930match(parent, cf, aux)
amd7930match_mainbus(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
register struct confargs *ca = aux;
register struct romaux *ra = &ca->ca_ra;
struct mainbus_attach_args *ma = aux;
if (CPU_ISSUN4)
return (0);
return (strcmp(AUDIO_ROM_NAME, ra->ra_name) == 0);
return (strcmp(AUDIO_ROM_NAME, ma->ma_name) == 0);
}
int
amd7930match_sbus(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct sbus_attach_args *sa = aux;
return (strcmp(AUDIO_ROM_NAME, sa->sa_name) == 0);
}
/*
* Audio chip found.
*/
void
amd7930attach(parent, self, args)
amd7930attach_mainbus(parent, self, aux)
struct device *parent, *self;
void *args;
void *aux;
{
register struct amd7930_softc *sc = (struct amd7930_softc *)self;
register struct confargs *ca = args;
register struct romaux *ra = &ca->ca_ra;
register volatile struct amd7930 *amd;
register int pri;
struct mainbus_attach_args *ma = aux;
struct amd7930_softc *sc = (struct amd7930_softc *)self;
bus_space_handle_t bh;
if (ra->ra_nintr != 1) {
printf(": expected 1 interrupt, got %d\n", ra->ra_nintr);
sc->sc_bustag = ma->ma_bustag;
if (sparc_bus_map(
ma->ma_bustag,
ma->ma_iospace,
(bus_addr_t)ma->ma_paddr,
sizeof(struct amd7930),
BUS_SPACE_MAP_LINEAR,
0,
&bh) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
pri = ra->ra_intr[0].int_pri;
printf(" pri %d, softpri %d\n", pri, PIL_AUSOFT);
amd = (volatile struct amd7930 *)(ra->ra_vaddr ?
ra->ra_vaddr : mapiodev(ra->ra_reg, 0, sizeof (*amd)));
sc->sc_au.au_amd = (volatile struct amd7930 *)bh;
amd7930attach(sc, ma->ma_pri);
}
void
amd7930attach_sbus(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct sbus_attach_args *sa = aux;
struct amd7930_softc *sc = (struct amd7930_softc *)self;
bus_space_handle_t bh;
sc->sc_bustag = sa->sa_bustag;
if (sbus_bus_map(
sa->sa_bustag,
sa->sa_slot,
sa->sa_offset,
sizeof(struct amd7930),
0, 0,
&bh) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
sc->sc_au.au_amd = (volatile struct amd7930 *)bh;
amd7930attach(sc, sa->sa_pri);
}
void
amd7930attach(sc, pri)
struct amd7930_softc *sc;
int pri;
{
printf(" softpri %d\n", PIL_AUSOFT);
sc->sc_map.mr_mmr1 = AMD_MMR1_GX | AMD_MMR1_GER |
AMD_MMR1_GR | AMD_MMR1_STG;
sc->sc_au.au_amd = amd;
/* set boot defaults */
sc->sc_rlevel = 128;
sc->sc_plevel = 128;
sc->sc_mlevel = 0;
sc->sc_out_port = SUNAUDIO_SPEAKER;
init_amd(amd);
init_amd(sc->sc_au.au_amd);
#ifndef AUDIO_C_HANDLER
auiop = &sc->sc_au;
intr_fasttrap(pri, amd7930_trap);
(void)bus_intr_establish(sc->sc_bustag, pri,
BUS_INTR_ESTABLISH_FASTTRAP,
(int (*) __P((void *)))amd7930_trap, NULL);
#else
sc->sc_hwih.ih_fun = amd7930hwintr;
sc->sc_hwih.ih_arg = &sc->sc_au;
intr_establish(pri, &sc->sc_hwih);
(void)bus_intr_establish(sc->sc_bustag, pri, 0,
amd7930hwintr, &sc->sc_au);
#endif
sc->sc_swih.ih_fun = amd7930swintr;
sc->sc_swih.ih_arg = sc;
intr_establish(PIL_AUSOFT, &sc->sc_swih);
(void)bus_intr_establish(sc->sc_bustag, PIL_AUSOFT,
BUS_INTR_ESTABLISH_SOFTINTR,
amd7930swintr, sc);
evcnt_attach(&sc->sc_dev, "intr", &sc->sc_intrcnt);

135
sys/arch/sparc/dev/cgeight.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: cgeight.c,v 1.15 1998/01/12 20:23:41 thorpej Exp $ */
/* $NetBSD: cgeight.c,v 1.16 1998/03/21 20:11:30 pk Exp $ */
/*-
* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
@ -116,9 +116,11 @@
struct cgeight_softc {
struct device sc_dev; /* base device */
struct fbdevice sc_fb; /* frame buffer device */
struct rom_reg sc_phys; /* display RAM (phys addr) */
bus_space_tag_t sc_bustag;
bus_type_t sc_btype; /* phys address description */
bus_addr_t sc_paddr; /* for device mmap() */
volatile struct fbcontrol *sc_fbc; /* Brooktree registers */
int sc_bustype; /* type of bus we live on */
union bt_cmap sc_cmap; /* Brooktree color map */
};
@ -129,6 +131,8 @@ static int cgeightmatch(struct device *, struct cfdata *, void *);
static void cgeightunblank __P((struct device *));
#endif
static int cg8_pfour_probe __P((void *, void *));
/* cdevsw prototypes */
cdev_decl(cgeight);
@ -162,95 +166,79 @@ cgeightmatch(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
struct confargs *ca = aux;
struct romaux *ra = &ca->ca_ra;
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba;
if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
if (uoba->uoba_isobio4 == 0)
return (0);
/*
* Mask out invalid flags from the user.
*/
cf->cf_flags &= FB_USERMASK;
oba = &uoba->uoba_oba4;
return (obio_bus_probe(oba->oba_bustag, oba->oba_paddr,
0, 4, cg8_pfour_probe, NULL));
/*
* Only exists on a sun4.
*/
if (!CPU_ISSUN4)
return (0);
}
/*
* Only exists on obio.
*/
if (ca->ca_bustype != BUS_OBIO)
return (0);
int
cg8_pfour_probe(vaddr, arg)
void *vaddr;
void *arg;
{
/*
* Make sure there's hardware there.
*/
if (probeget(ra->ra_vaddr, 4) == -1)
return (0);
#if defined(SUN4)
/*
* Check the pfour register.
*/
if (fb_pfour_id(ra->ra_vaddr) == PFOUR_ID_COLOR24) {
cf->cf_flags |= FB_PFOUR;
return (1);
}
#endif
return (0);
return (fb_pfour_id(vaddr) == PFOUR_ID_COLOR24);
}
/*
* Attach a display. We need to notice if it is the console, too.
*/
void
cgeightattach(parent, self, args)
cgeightattach(parent, self, aux)
struct device *parent, *self;
void *args;
void *aux;
{
#if defined(SUN4)
register struct cgeight_softc *sc = (struct cgeight_softc *)self;
register struct confargs *ca = args;
register int node = 0, ramsize, i;
register volatile struct bt_regs *bt;
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba = &uoba->uoba_oba4;
struct cgeight_softc *sc = (struct cgeight_softc *)self;
struct fbdevice *fb = &sc->sc_fb;
int isconsole;
bus_space_handle_t bh;
volatile struct bt_regs *bt;
int ramsize, i, isconsole;
sc->sc_bustag = oba->oba_bustag;
sc->sc_btype = (bus_type_t)0;
sc->sc_paddr = (bus_addr_t)oba->oba_paddr;
/* Map the pfour register. */
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
0,
sizeof(u_int32_t),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map pfour register\n", self->dv_xname);
return;
}
fb->fb_pfour = (volatile u_int32_t *)bh;
fb->fb_driver = &cgeightfbdriver;
fb->fb_device = &sc->sc_dev;
fb->fb_type.fb_type = FBTYPE_MEMCOLOR;
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags;
/*
* Only pfour cgfours, thank you...
*/
if ((ca->ca_bustype != BUS_OBIO) ||
((fb->fb_flags & FB_PFOUR) == 0)) {
printf("%s: ignoring; not a pfour\n", sc->sc_dev.dv_xname);
return;
}
/* Map the pfour register. */
fb->fb_pfour = (volatile u_int32_t *)
mapiodev(ca->ca_ra.ra_reg, 0, sizeof(u_int32_t));
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags & FB_USERMASK;
fb->fb_flags |= FB_PFOUR;
ramsize = PFOUR_COLOR_OFF_END - PFOUR_COLOR_OFF_OVERLAY;
fb->fb_type.fb_depth = 24;
fb_setsize(fb, fb->fb_type.fb_depth, 1152, 900, node, ca->ca_bustype);
fb_setsize_eeprom(fb, fb->fb_type.fb_depth, 1152, 900);
sc->sc_fb.fb_type.fb_cmsize = 256;
sc->sc_fb.fb_type.fb_size = ramsize;
printf(": cgeight/p4, %d x %d", fb->fb_type.fb_width,
printf(": cgeight/p4, %d x %d",
fb->fb_type.fb_width,
fb->fb_type.fb_height);
isconsole = 0;
if (cputyp == CPU_SUN4) {
if (CPU_ISSUN4) {
struct eeprom *eep = (struct eeprom *)eeprom_va;
/*
@ -285,12 +273,15 @@ cgeightattach(parent, self, args)
#endif
/* Map the Brooktree. */
sc->sc_fbc = (volatile struct fbcontrol *)
mapiodev(ca->ca_ra.ra_reg,
PFOUR_COLOR_OFF_CMAP, sizeof(struct fbcontrol));
sc->sc_phys = ca->ca_ra.ra_reg[0];
sc->sc_bustype = ca->ca_bustype;
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
PFOUR_COLOR_OFF_CMAP,
sizeof(struct fbcontrol),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map control registers\n", self->dv_xname);
return;
}
sc->sc_fbc = (volatile struct fbcontrol *)bh;
#if 0 /* XXX thorpej ??? */
/* tell the enable plane to look at the mono image */
@ -497,11 +488,11 @@ cgeightmmap(dev, off, prot)
poff = 0x8000 + (off - (START_SPECIAL + (NBPG * 2)));
} else
return (-1);
/*
* I turned on PMAP_NC here to disable the cache as I was
* getting horribly broken behaviour with it on.
*/
return (REG2PHYS(&sc->sc_phys, poff) | PMAP_NC);
return (bus_space_mmap (sc->sc_bustag,
sc->sc_btype,
sc->sc_paddr + poff,
BUS_SPACE_MAP_LINEAR));
}
#if defined(SUN4)

131
sys/arch/sparc/dev/cgfour.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: cgfour.c,v 1.15 1998/01/12 20:23:42 thorpej Exp $ */
/* $NetBSD: cgfour.c,v 1.16 1998/03/21 20:11:30 pk Exp $ */
/*-
* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
@ -120,19 +120,24 @@
struct cgfour_softc {
struct device sc_dev; /* base device */
struct fbdevice sc_fb; /* frame buffer device */
struct rom_reg sc_phys; /* display RAM (phys addr) */
bus_space_tag_t sc_bustag;
bus_type_t sc_btype; /* phys address description */
bus_addr_t sc_paddr; /* for device mmap() */
volatile struct fbcontrol *sc_fbc; /* Brooktree registers */
int sc_bustype; /* type of bus we live on */
union bt_cmap sc_cmap; /* Brooktree color map */
};
/* autoconfiguration driver */
static void cgfourattach __P((struct device *, struct device *, void *));
static int cgfourmatch __P((struct device *, struct cfdata *, void *));
#if defined(SUN4)
static void cgfourunblank __P((struct device *));
#endif
static int cg4_pfour_probe __P((void *, void *));
/* cdevsw prototypes */
cdev_decl(cgfour);
@ -166,91 +171,73 @@ cgfourmatch(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
struct confargs *ca = aux;
struct romaux *ra = &ca->ca_ra;
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba;
if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
if (uoba->uoba_isobio4 == 0)
return (0);
/*
* Mask out invalid flags from the user.
*/
cf->cf_flags &= FB_USERMASK;
oba = &uoba->uoba_oba4;
return (obio_bus_probe(oba->oba_bustag, oba->oba_paddr,
0, 4, cg4_pfour_probe, NULL));
}
/*
* Only exists on a sun4.
*/
if (!CPU_ISSUN4)
return (0);
int
cg4_pfour_probe(vaddr, arg)
void *vaddr;
void *arg;
{
/*
* Only exists on obio.
*/
if (ca->ca_bustype != BUS_OBIO)
return (0);
/*
* Make sure there's hardware there.
*/
if (probeget(ra->ra_vaddr, 4) == -1)
return (0);
#if defined(SUN4)
/*
* Check the pfour register.
*/
if (fb_pfour_id(ra->ra_vaddr) == PFOUR_ID_COLOR8P1) {
cf->cf_flags |= FB_PFOUR;
return (1);
}
#endif
return (0);
return (fb_pfour_id(vaddr) == PFOUR_ID_COLOR8P1);
}
/*
* Attach a display. We need to notice if it is the console, too.
*/
void
cgfourattach(parent, self, args)
cgfourattach(parent, self, aux)
struct device *parent, *self;
void *args;
void *aux;
{
#if defined(SUN4)
register struct cgfour_softc *sc = (struct cgfour_softc *)self;
register struct confargs *ca = args;
register int node = 0, ramsize, i;
register volatile struct bt_regs *bt;
struct cgfour_softc *sc = (struct cgfour_softc *)self;
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba = &uoba->uoba_oba4;
bus_space_handle_t bh;
volatile struct bt_regs *bt;
struct fbdevice *fb = &sc->sc_fb;
int isconsole;
int ramsize, i, isconsole;
sc->sc_bustag = oba->oba_bustag;
sc->sc_btype = (bus_type_t)0;
sc->sc_paddr = (bus_addr_t)oba->oba_paddr;
/* Map the pfour register. */
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
0,
sizeof(u_int32_t),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map control registers\n", self->dv_xname);
return;
}
fb->fb_pfour = (volatile u_int32_t *)bh;
fb->fb_driver = &cgfourfbdriver;
fb->fb_device = &sc->sc_dev;
fb->fb_type.fb_type = FBTYPE_SUN4COLOR;
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags;
/*
* Only pfour cgfours, thank you...
*/
if ((ca->ca_bustype != BUS_OBIO) ||
((fb->fb_flags & FB_PFOUR) == 0)) {
printf("%s: ignoring; not a pfour\n", sc->sc_dev.dv_xname);
return;
}
/* Map the pfour register. */
fb->fb_pfour = (volatile u_int32_t *)
mapiodev(ca->ca_ra.ra_reg, 0, sizeof(u_int32_t));
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags & FB_USERMASK;
fb->fb_flags |= FB_PFOUR;
ramsize = PFOUR_COLOR_OFF_END - PFOUR_COLOR_OFF_OVERLAY;
fb->fb_type.fb_depth = 8;
fb_setsize(fb, fb->fb_type.fb_depth, 1152, 900, node, ca->ca_bustype);
fb_setsize_eeprom(fb, fb->fb_type.fb_depth, 1152, 900);
fb->fb_type.fb_cmsize = 256;
fb->fb_type.fb_size = ramsize;
printf(": cgfour/p4, %d x %d", fb->fb_type.fb_width,
fb->fb_type.fb_height);
printf(": cgfour/p4, %d x %d",
fb->fb_type.fb_width, fb->fb_type.fb_height);
isconsole = 0;
@ -289,12 +276,15 @@ cgfourattach(parent, self, args)
#endif
/* Map the Brooktree. */
sc->sc_fbc = (volatile struct fbcontrol *)
mapiodev(ca->ca_ra.ra_reg,
PFOUR_COLOR_OFF_CMAP, sizeof(struct fbcontrol));
sc->sc_phys = ca->ca_ra.ra_reg[0];
sc->sc_bustype = ca->ca_bustype;
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
PFOUR_COLOR_OFF_CMAP,
sizeof(struct fbcontrol),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map control registers\n", self->dv_xname);
return;
}
sc->sc_fbc = (volatile struct fbcontrol *)bh;
/* grab initial (current) color map */
bt = &sc->sc_fbc->fbc_dac;
@ -475,7 +465,10 @@ cgfourmmap(dev, off, prot)
} else
return (-1);
return (REG2PHYS(&sc->sc_phys, poff) | PMAP_NC);
return (bus_space_mmap (sc->sc_bustag,
sc->sc_btype,
sc->sc_paddr + poff,
BUS_SPACE_MAP_LINEAR));
}
#if defined(SUN4)

232
sys/arch/sparc/dev/cgfourteen.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: cgfourteen.c,v 1.10 1998/02/10 14:11:32 mrg Exp $ */
/* $NetBSD: cgfourteen.c,v 1.11 1998/03/21 20:11:30 pk Exp $ */
/*
* Copyright (c) 1996
@ -144,17 +144,8 @@ cgfourteenmatch(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
struct confargs *ca = aux;
struct romaux *ra = &ca->ca_ra;
/*
* Mask out invalid flags from the user.
*/
cf->cf_flags &= FB_USERMASK;
/* Check driver name */
if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
return (0);
union obio_attach_args *uoba = aux;
struct sbus_attach_args *sa = &uoba->uoba_sbus;
/*
* The cgfourteen is a local-bus video adaptor, accessed directly
@ -162,102 +153,105 @@ cgfourteenmatch(parent, cf, aux)
* bus. Thus we look _only_ at the obio bus.
* Additionally, these things exist only on the Sun4m.
*/
if (CPU_ISSUN4M && ca->ca_bustype == BUS_OBIO)
return(1);
if (uoba->uoba_isobio4 != 0 || !CPU_ISSUN4M)
return (0);
/* Check driver name */
return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0);
}
/*
* Attach a display. We need to notice if it is the console, too.
*/
void
cgfourteenattach(parent, self, args)
cgfourteenattach(parent, self, aux)
struct device *parent, *self;
void *args;
void *aux;
{
register struct cgfourteen_softc *sc = (struct cgfourteen_softc *)self;
register struct confargs *ca = args;
register int node = 0, ramsize;
register u_int32_t *lut;
union obio_attach_args *uoba = aux;
struct sbus_attach_args *sa = &uoba->uoba_sbus;
struct cgfourteen_softc *sc = (struct cgfourteen_softc *)self;
struct fbdevice *fb = &sc->sc_fb;
bus_space_handle_t bh;
int nreg;
int node, ramsize;
u_int32_t *lut;
int i, isconsole;
void *p;
sc->sc_fb.fb_driver = &cgfourteenfbdriver;
sc->sc_fb.fb_device = &sc->sc_dev;
sc->sc_fb.fb_flags = sc->sc_dev.dv_cfdata->cf_flags;
node = sa->sa_node;
/* Remember cookies for cgfourteenmmap() */
sc->sc_bustag = sa->sa_bustag;
fb->fb_driver = &cgfourteenfbdriver;
fb->fb_device = &sc->sc_dev;
/* Mask out invalid flags from the user. */
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags & FB_USERMASK;
/*
* We're emulating a cg3/8, so represent ourselves as one
*/
#ifdef CG14_CG8
sc->sc_fb.fb_type.fb_type = FBTYPE_MEMCOLOR;
fb->fb_type.fb_type = FBTYPE_MEMCOLOR;
fb->fb_type.fb_depth = 32;
#else
sc->sc_fb.fb_type.fb_type = FBTYPE_SUN3COLOR;
fb->fb_type.fb_type = FBTYPE_SUN3COLOR;
fb->fb_type.fb_depth = 8;
#endif
fb_setsize_obp(fb, sc->sc_fb.fb_type.fb_depth, 1152, 900, node);
node = ca->ca_ra.ra_node;
#ifdef CG14_CG8
sc->sc_fb.fb_type.fb_depth = 32;
#else
sc->sc_fb.fb_type.fb_depth = 8;
#endif
fb_setsize(&sc->sc_fb, sc->sc_fb.fb_type.fb_depth,
1152, 900, node, ca->ca_bustype);
ramsize = roundup(fb->fb_type.fb_height * fb->fb_linebytes, NBPG);
fb->fb_type.fb_cmsize = CG14_CLUT_SIZE;
fb->fb_type.fb_size = ramsize;
ramsize = roundup(sc->sc_fb.fb_type.fb_height * sc->sc_fb.fb_linebytes,
NBPG);
sc->sc_fb.fb_type.fb_cmsize = CG14_CLUT_SIZE;
sc->sc_fb.fb_type.fb_size = ramsize;
p = sc->sc_physadr;
if (getpropA(node, "reg", sizeof(struct rom_reg), &nreg, &p) != 0) {
printf("%s: cannot get register property\n", self->dv_xname);
return;
}
if (nreg < 2) {
printf("%s: only %d register sets\n", self->dv_xname, nreg);
return;
}
/*
* Now map in the 8 useful pages of registers
*/
if (ca->ca_ra.ra_len < 0x10000) {
if (sa->sa_size < 0x10000) {
#ifdef DIAGNOSTIC
printf("warning: can't find all cgfourteen registers...\n");
#endif
ca->ca_ra.ra_len = 0x10000;
sa->sa_size = 0x10000;
}
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset,
sa->sa_size,
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map control registers\n", self->dv_xname);
return;
}
sc->sc_ctl = (struct cg14ctl *) mapiodev(ca->ca_ra.ra_reg, 0,
ca->ca_ra.ra_len);
sc->sc_hwc = (struct cg14curs *) ((u_int)sc->sc_ctl +
CG14_OFFSET_CURS);
sc->sc_dac = (struct cg14dac *) ((u_int)sc->sc_ctl +
CG14_OFFSET_DAC);
sc->sc_xlut = (struct cg14xlut *) ((u_int)sc->sc_ctl +
CG14_OFFSET_XLUT);
sc->sc_clut1 = (struct cg14clut *) ((u_int)sc->sc_ctl +
CG14_OFFSET_CLUT1);
sc->sc_clut2 = (struct cg14clut *) ((u_int)sc->sc_ctl +
CG14_OFFSET_CLUT2);
sc->sc_clut3 = (struct cg14clut *) ((u_int)sc->sc_ctl +
CG14_OFFSET_CLUT3);
sc->sc_clutincr = (u_int *) ((u_int)sc->sc_ctl +
CG14_OFFSET_CLUTINCR);
/*
* Stash the physical address of the framebuffer for use by mmap
*/
if (ca->ca_ra.ra_nreg < 2)
panic("cgfourteen with only one register set; can't find"
" framebuffer");
sc->sc_phys = ca->ca_ra.ra_reg[1];
#if defined(DEBUG) && defined(CG14_MAP_REGS)
/* Store the physical address of the control registers */
sc->sc_regphys = ca->ca_ra.ra_reg[0];
#endif
sc->sc_ctl = (struct cg14ctl *) (bh);
sc->sc_hwc = (struct cg14curs *) (bh + CG14_OFFSET_CURS);
sc->sc_dac = (struct cg14dac *) (bh + CG14_OFFSET_DAC);
sc->sc_xlut = (struct cg14xlut *) (bh + CG14_OFFSET_XLUT);
sc->sc_clut1 = (struct cg14clut *) (bh + CG14_OFFSET_CLUT1);
sc->sc_clut2 = (struct cg14clut *) (bh + CG14_OFFSET_CLUT2);
sc->sc_clut3 = (struct cg14clut *) (bh + CG14_OFFSET_CLUT3);
sc->sc_clutincr = (u_int *) (bh + CG14_OFFSET_CLUTINCR);
/*
* Let the user know that we're here
*/
#ifdef CG14_CG8
printf(": cgeight emulated at %dx%dx24bpp",
sc->sc_fb.fb_type.fb_width, sc->sc_fb.fb_type.fb_height);
fb->fb_type.fb_width, fb->fb_type.fb_height);
#else
printf(": cgthree emulated at %dx%dx8bpp",
sc->sc_fb.fb_type.fb_width, sc->sc_fb.fb_type.fb_height);
fb->fb_type.fb_width, fb->fb_type.fb_height);
#endif
/*
* Enable the video, but don't change the pixel depth.
@ -274,30 +268,15 @@ cgfourteenattach(parent, self, args)
/* See if we're the console */
isconsole = node == fbnode && fbconstty != NULL;
/*
* We don't use the raster console since the cg14 is fast enough
* already.
*/
#ifdef notdef
/*
* When the ROM has mapped in a cgfourteen display, the address
* maps only the video RAM, so in any case we have to map the
* registers ourselves. We only need the video RAM if we are
* going to print characters via rconsole.
*/
if ((sc->sc_fb.fb_pixels = ca->ca_ra.ra_vaddr) == NULL && isconsole) {
/* this probably cannot happen, but what the heck */
sc->sc_fb.fb_pixels = mapiodev(ca->ca_ra.ra_reg, CG3REG_MEM,
ramsize);
}
#endif /* notdef */
if (isconsole) {
printf(" (console)\n");
#ifdef notdef
/*
* We don't use the raster console since the cg14 is
* fast enough already.
*/
#ifdef RASTERCONSOLE
fbrcons_init(&sc->sc_fb);
fbrcons_init(fb);
#endif
#endif /* notdef */
} else
@ -322,7 +301,7 @@ cgfourteenopen(dev, flags, mode, p)
int flags, mode;
struct proc *p;
{
register struct cgfourteen_softc *sc = cgfourteen_cd.cd_devs[minor(dev)];
struct cgfourteen_softc *sc = cgfourteen_cd.cd_devs[minor(dev)];
int unit = minor(dev);
int s, oldopens;
@ -347,7 +326,7 @@ cgfourteenclose(dev, flags, mode, p)
int flags, mode;
struct proc *p;
{
register struct cgfourteen_softc *sc = cgfourteen_cd.cd_devs[minor(dev)];
struct cgfourteen_softc *sc = cgfourteen_cd.cd_devs[minor(dev)];
int s, opens;
s = splhigh();
@ -369,12 +348,12 @@ int
cgfourteenioctl(dev, cmd, data, flags, p)
dev_t dev;
u_long cmd;
register caddr_t data;
caddr_t data;
int flags;
struct proc *p;
{
register struct cgfourteen_softc *sc = cgfourteen_cd.cd_devs[minor(dev)];
register struct fbgattr *fba;
struct cgfourteen_softc *sc = cgfourteen_cd.cd_devs[minor(dev)];
struct fbgattr *fba;
union cg14cursor_cmap tcm;
int v, error;
u_int count;
@ -573,7 +552,7 @@ cgfourteenmmap(dev, off, prot)
dev_t dev;
int off, prot;
{
register struct cgfourteen_softc *sc = cgfourteen_cd.cd_devs[minor(dev)];
struct cgfourteen_softc *sc = cgfourteen_cd.cd_devs[minor(dev)];
#define CG3START (128*1024 + 128*1024)
#define CG8START (256*1024)
@ -589,7 +568,11 @@ cgfourteenmmap(dev, off, prot)
*/
if ((u_int)off >= 0x10000000 && (u_int)off < 0x10000000 + 16*4096) {
off -= 0x10000000;
return (REG2PHYS(&sc->sc_regphys, off, 0) | PMAP_NC);
return (bus_space_mmap(
sc->sc_bustag,
sc->sc_physadr[CG14_CTL_IDX].rr_iospace,
sc->sc_physadr[CG14_CTL_IDX].rr_paddr + off,
BUS_SPACE_MAP_LINEAR));
}
#endif
@ -616,11 +599,10 @@ cgfourteenmmap(dev, off, prot)
return (-1);
}
/*
* Use PMAP_NC to disable the cache, since otherwise refresh is
* very confused.
*/
return (REG2PHYS(&sc->sc_phys, off) | PMAP_NC);
return (bus_space_mmap (sc->sc_bustag,
sc->sc_physadr[CG14_PXL_IDX].rr_iospace,
sc->sc_physadr[CG14_PXL_IDX].rr_paddr + off,
BUS_SPACE_MAP_LINEAR));
}
int
@ -642,9 +624,9 @@ static void
cg14_init(sc)
struct cgfourteen_softc *sc;
{
register u_int32_t *clut;
register u_int8_t *xlut;
register int i;
u_int32_t *clut;
u_int8_t *xlut;
int i;
/*
* We stash away the following to restore on close:
@ -688,9 +670,9 @@ static void
cg14_reset(sc) /* Restore the state saved on cg14_init */
struct cgfourteen_softc *sc;
{
register u_int32_t *clut;
register u_int8_t *xlut;
register int i;
u_int32_t *clut;
u_int8_t *xlut;
int i;
/*
* We restore the following, saved in cg14_init:
@ -753,12 +735,12 @@ cg14_get_video(sc)
/* Read the software shadow colormap */
static int
cg14_get_cmap(p, cm, cmsize)
register struct fbcmap *p;
struct fbcmap *p;
union cg14cmap *cm;
int cmsize;
{
register u_int i, start, count;
register u_char *cp;
u_int i, start, count;
u_char *cp;
start = p->index;
count = p->count;
@ -795,12 +777,12 @@ cg14_get_cmap(p, cm, cmsize)
/* Write the software shadow colormap */
static int
cg14_put_cmap(p, cm, cmsize)
register struct fbcmap *p;
struct fbcmap *p;
union cg14cmap *cm;
int cmsize;
{
register u_int i, start, count;
register u_char *cp;
u_int i, start, count;
u_char *cp;
start = p->index;
count = p->count;
@ -837,14 +819,14 @@ cg14_put_cmap(p, cm, cmsize)
static void
cg14_load_hwcmap(sc, start, ncolors)
register struct cgfourteen_softc *sc;
register int start, ncolors;
struct cgfourteen_softc *sc;
int start, ncolors;
{
/* XXX switch to auto-increment, and on retrace intr */
/* Setup pointers to source and dest */
register u_int32_t *colp = &sc->sc_cmap.cm_chip[start];
volatile register u_int32_t *lutp = &sc->sc_clut1->clut_lut[start];
u_int32_t *colp = &sc->sc_cmap.cm_chip[start];
volatile u_int32_t *lutp = &sc->sc_clut1->clut_lut[start];
/* Copy by words */
while (--ncolors >= 0)
@ -856,7 +838,7 @@ cg14_load_hwcmap(sc, start, ncolors)
*/
static void
cg14_setcursor(sc)
register struct cgfourteen_softc *sc;
struct cgfourteen_softc *sc;
{
/* we need to subtract the hot-spot value here */
#define COORD(f) (sc->sc_cursor.cc_pos.f - sc->sc_cursor.cc_hot.f)
@ -870,11 +852,11 @@ cg14_setcursor(sc)
static void
cg14_loadcursor(sc)
register struct cgfourteen_softc *sc;
struct cgfourteen_softc *sc;
{
register volatile struct cg14curs *hwc;
register u_int edgemask, m;
register int i;
volatile struct cg14curs *hwc;
u_int edgemask, m;
int i;
/*
* Keep the top size.x bits. Here we *throw out* the top
@ -897,7 +879,7 @@ cg14_loadcursor(sc)
static void
cg14_loadomap(sc)
register struct cgfourteen_softc *sc;
struct cgfourteen_softc *sc;
{
/* set background color */
sc->sc_hwc->curs_color1 = sc->sc_cursor.cc_color.cm_chip[0];

12
sys/arch/sparc/dev/cgfourteenvar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cgfourteenvar.h,v 1.1 1996/09/30 22:41:03 abrown Exp $ */
/* $NetBSD: cgfourteenvar.h,v 1.2 1998/03/21 20:11:31 pk Exp $ */
/*
* Copyright (c) 1996
@ -68,15 +68,13 @@ struct cg14_cursor { /* cg14 hardware cursor status */
struct cgfourteen_softc {
struct device sc_dev; /* base device */
struct fbdevice sc_fb; /* frame buffer device */
bus_space_tag_t sc_bustag;
struct rom_reg sc_physadr[2]; /* phys addrs of h/w */
#define CG14_CTL_IDX 0
#define CG14_PXL_IDX 1
struct rom_reg sc_phys; /* phys address of frame buffer */
#if defined(DEBUG) && defined(CG14_MAP_REGS)
struct rom_reg sc_regphys; /* phys addr of fb regs; for debug */
#endif
union cg14cmap sc_cmap; /* current colormap */
struct cg14_cursor sc_cursor; /* Hardware cursor state */
union cg14cmap sc_saveclut; /* a place to stash PROM state */
u_int8_t sc_savexlut[256];
u_int8_t sc_savectl;

398
sys/arch/sparc/dev/cgsix.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: cgsix.c,v 1.37 1998/02/10 14:11:33 mrg Exp $ */
/* $NetBSD: cgsix.c,v 1.38 1998/03/21 20:11:31 pk Exp $ */
/*
* Copyright (c) 1993
@ -72,22 +72,19 @@
#include <vm/vm.h>
#include <machine/bus.h>
#include <machine/autoconf.h>
#include <machine/pmap.h>
#include <machine/fbvar.h>
#include <machine/cpu.h>
#if defined(SUN4)
#include <machine/eeprom.h>
#endif
#include <machine/conf.h>
#include <sparc/dev/btreg.h>
#include <sparc/dev/btvar.h>
#include <sparc/dev/cgsixreg.h>
#include <sparc/dev/sbusvar.h>
#if defined(SUN4)
#include <sparc/dev/pfourreg.h>
#endif
union cursor_cmap { /* colormap, like bt_cmap, but tiny */
u_char cm_map[2][3]; /* 2 R/G/B entries */
@ -108,8 +105,10 @@ struct cgsix_softc {
struct device sc_dev; /* base device */
struct sbusdev sc_sd; /* sbus device */
struct fbdevice sc_fb; /* frame buffer device */
struct rom_reg sc_physadr; /* phys addr of h/w */
int sc_bustype; /* type of bus we live on */
bus_space_tag_t sc_bustag;
bus_type_t sc_btype; /* phys address description */
bus_addr_t sc_paddr; /* for device mmap() */
volatile struct bt_regs *sc_bt; /* Brooktree registers */
volatile int *sc_fhc; /* FHC register */
volatile struct cg6_thc *sc_thc; /* THC registers */
@ -121,17 +120,26 @@ struct cgsix_softc {
};
/* autoconfiguration driver */
static void cgsixattach __P((struct device *, struct device *, void *));
static int cgsixmatch __P((struct device *, struct cfdata *, void *));
static int cgsixmatch_sbus __P((struct device *, struct cfdata *, void *));
static int cgsixmatch_obio __P((struct device *, struct cfdata *, void *));
static void cgsixattach_sbus __P((struct device *, struct device *, void *));
static void cgsixattach_obio __P((struct device *, struct device *, void *));
static void cg6_unblank __P((struct device *));
static int cg6_pfour_probe __P((void *, void *));
static void cg6attach __P((struct cgsix_softc *, char *, int, int));
/* cdevsw prototypes */
cdev_decl(cgsix);
struct cfattach cgsix_ca = {
sizeof(struct cgsix_softc), cgsixmatch, cgsixattach
struct cfattach cgsix_sbus_ca = {
sizeof(struct cgsix_softc), cgsixmatch_sbus, cgsixattach_sbus
};
struct cfattach cgsix_obio_ca = {
sizeof(struct cgsix_softc), cgsixmatch_obio, cgsixattach_obio
};
extern struct cfdriver cgsix_cd;
/* frame buffer generic driver */
@ -146,6 +154,8 @@ static struct fbdriver cg6_fbdriver = {
*/
#ifdef RASTERCONSOLE
int cgsix_use_rasterconsole = 0;
#else
#define cgsix_use_rasterconsole 0
#endif
extern int fbnode;
@ -160,139 +170,230 @@ static void cg6_loadcursor __P((struct cgsix_softc *));/* set shape */
* Match a cgsix.
*/
int
cgsixmatch(parent, cf, aux)
cgsixmatch_sbus(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct confargs *ca = aux;
struct romaux *ra = &ca->ca_ra;
struct sbus_attach_args *sa = aux;
if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
return (0);
/*
* Mask out invalid flags from the user.
*/
cf->cf_flags &= FB_USERMASK;
if (ca->ca_bustype == BUS_SBUS)
return (1);
#if defined(SUN4)
if (CPU_ISSUN4 && (ca->ca_bustype == BUS_OBIO)) {
void *tmp;
/*
* Check for a pfour framebuffer. This is done somewhat
* differently on the cgsix than other pfour framebuffers.
*/
obio_bus_untmp();
tmp = (caddr_t)mapdev(ra->ra_reg, TMPMAP_VA, CGSIX_FHC_OFFSET,
NBPG);
if (probeget(tmp, 4) == -1)
return (0);
if (fb_pfour_id(tmp) == PFOUR_ID_FASTCOLOR) {
cf->cf_flags |= FB_PFOUR;
return (1);
}
}
#endif
return (0);
return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0);
}
int
cgsixmatch_obio(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba;
if (uoba->uoba_isobio4 == 0)
return (0);
oba = &uoba->uoba_oba4;
return (obio_bus_probe(oba->oba_bustag, oba->oba_paddr,
CGSIX_FHC_OFFSET, 4,
cg6_pfour_probe, NULL));
}
int
cg6_pfour_probe(vaddr, arg)
void *vaddr;
void *arg;
{
return (fb_pfour_id(vaddr) == PFOUR_ID_FASTCOLOR);
}
/*
* Attach a display.
*/
void
cgsixattach(parent, self, args)
cgsixattach_sbus(parent, self, aux)
struct device *parent, *self;
void *args;
void *aux;
{
register struct cgsix_softc *sc = (struct cgsix_softc *)self;
register struct confargs *ca = args;
register int node = 0, ramsize, i;
register volatile struct bt_regs *bt;
register struct sbus_attach_args *sa = aux;
struct fbdevice *fb = &sc->sc_fb;
int isconsole = 0, sbus = 1;
char *nam = NULL;
int node, isconsole;
char *name;
bus_space_handle_t bh;
extern struct tty *fbconstty;
/* Remember cookies for cgsix_mmap() */
sc->sc_bustag = sa->sa_bustag;
sc->sc_btype = (bus_type_t)sa->sa_slot;
sc->sc_paddr = (bus_addr_t)sa->sa_offset;
node = sa->sa_node;
fb->fb_driver = &cg6_fbdriver;
fb->fb_device = &sc->sc_dev;
fb->fb_type.fb_type = FBTYPE_SUNFAST_COLOR;
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags;
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags & FB_USERMASK;
fb->fb_type.fb_depth = 8;
fb_setsize_obp(fb, fb->fb_type.fb_depth, 1152, 900, node);
/*
* Dunno what the PROM has mapped, though obviously it must have
* the video RAM mapped. Just map what we care about for ourselves
* (the FHC, THC, and Brooktree registers).
*/
#define O(memb) ((u_int)(&((struct cg6_layout *)0)->memb))
sc->sc_physadr = ca->ca_ra.ra_reg[0];
sc->sc_bustype = ca->ca_bustype;
sc->sc_bt = bt = (volatile struct bt_regs *)
mapiodev(ca->ca_ra.ra_reg, O(cg6_bt_un.un_btregs),sizeof *sc->sc_bt);
sc->sc_fhc = (volatile int *)
mapiodev(ca->ca_ra.ra_reg, O(cg6_fhc_un.un_fhc), sizeof *sc->sc_fhc);
sc->sc_thc = (volatile struct cg6_thc *)
mapiodev(ca->ca_ra.ra_reg, O(cg6_thc_un.un_thc), sizeof *sc->sc_thc);
sc->sc_tec = (volatile struct cg6_tec_xxx *)
mapiodev(ca->ca_ra.ra_reg, O(cg6_tec_un.un_tec), sizeof *sc->sc_tec);
switch (ca->ca_bustype) {
case BUS_OBIO:
sbus = node = 0;
if (fb->fb_flags & FB_PFOUR)
nam = "cgsix/p4";
else
nam = "cgsix";
#if defined(SUN4M)
if (CPU_ISSUN4M) { /* 4m has framebuffer on obio */
node = ca->ca_ra.ra_node;
nam = getpropstring(node, "model");
break;
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset + CGSIX_RAM_OFFSET,
sizeof(*sc->sc_bt),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map brooktree registers\n", self->dv_xname);
return;
}
#endif
break;
sc->sc_bt = (struct bt_regs *)bh;
case BUS_VME32:
case BUS_VME16:
sbus = node = 0;
nam = "cgsix";
break;
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset + CGSIX_FHC_OFFSET,
sizeof(*sc->sc_fhc),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map FHC registers\n", self->dv_xname);
return;
}
sc->sc_fhc = (int *)bh;
case BUS_SBUS:
node = ca->ca_ra.ra_node;
nam = getpropstring(node, "model");
break;
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset + CGSIX_THC_OFFSET,
sizeof(*sc->sc_thc),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map THC registers\n", self->dv_xname);
return;
}
sc->sc_thc = (struct cg6_thc *)bh;
case BUS_MAIN:
printf("cgsix on mainbus?\n");
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset + CGSIX_TEC_OFFSET,
sizeof(*sc->sc_tec),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map TEC registers\n", self->dv_xname);
return;
}
sc->sc_tec = (struct cg6_tec_xxx *)bh;
sbus_establish(&sc->sc_sd, &sc->sc_dev);
name = getpropstring(node, "model");
isconsole = node == fbnode && fbconstty != NULL;
if (isconsole && cgsix_use_rasterconsole) {
int ramsize = fb->fb_type.fb_height * fb->fb_linebytes;
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset + CGSIX_RAM_OFFSET,
ramsize,
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map pixels\n", self->dv_xname);
return;
}
sc->sc_fb.fb_pixels = (caddr_t)bh;
}
cg6attach(sc, name, isconsole, node == fbnode);
}
void
cgsixattach_obio(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct cgsix_softc *sc = (struct cgsix_softc *)self;
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba;
struct eeprom *eep = (struct eeprom *)eeprom_va;
struct fbdevice *fb = &sc->sc_fb;
bus_space_handle_t bh;
int constype, isconsole;
char *name;
extern struct tty *fbconstty;
if (uoba->uoba_isobio4 == 0) {
cgsixattach_sbus(parent, self, aux);
return;
}
/* Don't have to map the pfour register on the cgsix. */
fb->fb_pfour = NULL;
oba = &uoba->uoba_oba4;
/* Remember cookies for cgsix_mmap() */
sc->sc_bustag = oba->oba_bustag;
sc->sc_btype = (bus_type_t)0;
sc->sc_paddr = (bus_addr_t)oba->oba_paddr;
fb->fb_driver = &cg6_fbdriver;
fb->fb_device = &sc->sc_dev;
fb->fb_type.fb_type = FBTYPE_SUNFAST_COLOR;
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags & FB_USERMASK;
fb->fb_type.fb_depth = 8;
fb_setsize(fb, fb->fb_type.fb_depth, 1152, 900,
node, ca->ca_bustype);
ramsize = fb->fb_type.fb_height * fb->fb_linebytes;
fb->fb_type.fb_cmsize = 256;
fb->fb_type.fb_size = ramsize;
printf(": %s, %d x %d", nam, fb->fb_type.fb_width,
fb->fb_type.fb_height);
fb_setsize_eeprom(fb, fb->fb_type.fb_depth, 1152, 900);
/*
* Dunno what the PROM has mapped, though obviously it must have
* the video RAM mapped. Just map what we care about for ourselves
* (the FHC, THC, and Brooktree registers).
*/
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
CGSIX_BT_OFFSET,
sizeof(*sc->sc_bt),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map brooktree registers\n", self->dv_xname);
return;
}
sc->sc_bt = (struct bt_regs *)bh;
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
CGSIX_FHC_OFFSET,
sizeof(*sc->sc_fhc),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map FHC registers\n", self->dv_xname);
return;
}
sc->sc_fhc = (int *)bh;
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
CGSIX_THC_OFFSET,
sizeof(*sc->sc_thc),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map THC registers\n", self->dv_xname);
return;
}
sc->sc_thc = (struct cg6_thc *)bh;
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
CGSIX_TEC_OFFSET,
sizeof(*sc->sc_tec),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map TEC registers\n", self->dv_xname);
return;
}
sc->sc_tec = (struct cg6_tec_xxx *)bh;
if (fb_pfour_id((void *)sc->sc_fhc) == PFOUR_ID_FASTCOLOR) {
fb->fb_flags |= FB_PFOUR;
name = "cgsix/p4";
} else
name = "cgsix";
constype = (fb->fb_flags & FB_PFOUR) ? EE_CONS_P4OPT : EE_CONS_COLOR;
#if defined(SUN4)
if (CPU_ISSUN4) {
struct eeprom *eep = (struct eeprom *)eeprom_va;
int constype = (fb->fb_flags & FB_PFOUR) ? EE_CONS_P4OPT :
EE_CONS_COLOR;
/*
* Assume this is the console if there's no eeprom info
* to be found.
@ -301,16 +402,45 @@ cgsixattach(parent, self, args)
isconsole = (fbconstty != NULL);
else
isconsole = 0;
}
#endif
#if defined(SUN4C) || defined(SUN4M)
if (CPU_ISSUN4COR4M)
isconsole = node == fbnode && fbconstty != NULL;
#endif
if (isconsole && cgsix_use_rasterconsole) {
int ramsize = fb->fb_type.fb_height * fb->fb_linebytes;
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
CGSIX_RAM_OFFSET,
ramsize,
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map pixels\n", self->dv_xname);
return;
}
sc->sc_fb.fb_pixels = (caddr_t)bh;
}
cg6attach(sc, name, isconsole, 1);
}
void
cg6attach(sc, name, isconsole, isfb)
struct cgsix_softc *sc;
char *name;
int isconsole;
int isfb;
{
int i;
volatile struct bt_regs *bt = sc->sc_bt;
struct fbdevice *fb = &sc->sc_fb;
/* Don't have to map the pfour register on the cgsix. */
fb->fb_pfour = NULL;
fb->fb_type.fb_cmsize = 256;
fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes;
printf(": %s, %d x %d", name,
fb->fb_type.fb_width, fb->fb_type.fb_height);
sc->sc_fhcrev = (*sc->sc_fhc >> FHC_REV_SHIFT) &
(FHC_REV_MASK >> FHC_REV_SHIFT);
printf(", rev %d", sc->sc_fhcrev);
/* reset cursor & frame buffer controls */
@ -325,25 +455,19 @@ cgsixattach(parent, self, args)
sc->sc_thc->thc_misc |= THC_MISC_VIDEN;
if (isconsole) {
printf(" (console)\n");
printf(" (console)");
#ifdef RASTERCONSOLE
if (cgsix_use_rasterconsole) {
sc->sc_fb.fb_pixels = (caddr_t)
mapiodev(ca->ca_ra.ra_reg,
O(cg6_ram[0]), ramsize);
if (cgsix_use_rasterconsole)
fbrcons_init(&sc->sc_fb);
#endif
}
#endif
} else
printf("\n");
#if defined(SUN4C) || defined(SUN4M)
if (sbus)
sbus_establish(&sc->sc_sd, &sc->sc_dev);
#endif
if (CPU_ISSUN4 || (node == fbnode))
if (isfb)
fb_attach(&sc->sc_fb, isconsole);
}
int
cgsixopen(dev, flags, mode, p)
dev_t dev;
@ -738,18 +862,17 @@ cgsixmmap(dev, off, prot)
register struct cgsix_softc *sc = cgsix_cd.cd_devs[minor(dev)];
register struct mmo *mo;
register u_int u, sz;
#define O(memb) ((u_int)(&((struct cg6_layout *)0)->memb))
static struct mmo mmo[] = {
{ CG6_USER_RAM, 0, O(cg6_ram) },
{ CG6_USER_RAM, 0, CGSIX_RAM_OFFSET },
/* do not actually know how big most of these are! */
{ CG6_USER_FBC, 1, O(cg6_fbc_un) },
{ CG6_USER_TEC, 1, O(cg6_tec_un) },
{ CG6_USER_BTREGS, 8192 /* XXX */, O(cg6_bt_un) },
{ CG6_USER_FHC, 1, O(cg6_fhc_un) },
{ CG6_USER_THC, sizeof(struct cg6_thc), O(cg6_thc_un) },
{ CG6_USER_ROM, 65536, O(cg6_rom_un) },
{ CG6_USER_DHC, 1, O(cg6_dhc_un) },
{ CG6_USER_FBC, 1, CGSIX_FBC_OFFSET },
{ CG6_USER_TEC, 1, CGSIX_TEC_OFFSET },
{ CG6_USER_BTREGS, 8192 /* XXX */, CGSIX_BT_OFFSET },
{ CG6_USER_FHC, 1, CGSIX_FHC_OFFSET },
{ CG6_USER_THC, sizeof(struct cg6_thc), CGSIX_THC_OFFSET },
{ CG6_USER_ROM, 65536, CGSIX_ROM_OFFSET },
{ CG6_USER_DHC, 1, CGSIX_DHC_OFFSET },
};
#define NMMO (sizeof mmo / sizeof *mmo)
@ -769,8 +892,15 @@ cgsixmmap(dev, off, prot)
u = off - mo->mo_uaddr;
sz = mo->mo_size ? mo->mo_size : sc->sc_fb.fb_type.fb_size;
if (u < sz)
#if 0
return (REG2PHYS(&sc->sc_physadr, u + mo->mo_physoff) |
PMAP_NC);
#else
return (bus_space_mmap (sc->sc_bustag,
sc->sc_btype,
sc->sc_paddr+u+mo->mo_physoff,
BUS_SPACE_MAP_LINEAR));
#endif
}
#ifdef DEBUG
{

275
sys/arch/sparc/dev/cgthree.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: cgthree.c,v 1.34 1998/01/12 20:23:45 thorpej Exp $ */
/* $NetBSD: cgthree.c,v 1.35 1998/03/21 20:11:31 pk Exp $ */
/*
* Copyright (c) 1992, 1993
@ -64,8 +64,9 @@
#include <vm/vm.h>
#include <machine/fbio.h>
#include <machine/bus.h>
#include <machine/autoconf.h>
#include <machine/fbio.h>
#include <machine/pmap.h>
#include <machine/fbvar.h>
#include <machine/cpu.h>
@ -81,22 +82,32 @@ struct cgthree_softc {
struct device sc_dev; /* base device */
struct sbusdev sc_sd; /* sbus device */
struct fbdevice sc_fb; /* frame buffer device */
struct rom_reg sc_phys; /* phys address description */
bus_space_tag_t sc_bustag;
bus_type_t sc_btype; /* phys address description */
bus_addr_t sc_paddr; /* for device mmap() */
volatile struct fbcontrol *sc_fbc; /* Brooktree registers */
int sc_bustype; /* type of bus we live on */
union bt_cmap sc_cmap; /* Brooktree color map */
};
/* autoconfiguration driver */
static void cgthreeattach(struct device *, struct device *, void *);
static int cgthreematch(struct device *, struct cfdata *, void *);
static int cgthreematch_sbus(struct device *, struct cfdata *, void *);
static int cgthreematch_obio(struct device *, struct cfdata *, void *);
static void cgthreeattach_sbus(struct device *, struct device *, void *);
static void cgthreeattach_obio(struct device *, struct device *, void *);
static void cgthreeunblank(struct device *);
static void cgthreeattach __P((struct cgthree_softc *, char *, int, int));
/* cdevsw prototypes */
cdev_decl(cgthree);
struct cfattach cgthree_ca = {
sizeof(struct cgthree_softc), cgthreematch, cgthreeattach
struct cfattach cgthree_sbus_ca = {
sizeof(struct cgthree_softc), cgthreematch_sbus, cgthreeattach_sbus
};
struct cfattach cgthree_obio_ca = {
sizeof(struct cgthree_softc), cgthreematch_obio, cgthreeattach_obio
};
extern struct cfdriver cgthree_cd;
@ -132,81 +143,61 @@ struct cg3_videoctrl {
* Match a cgthree.
*/
int
cgthreematch(parent, cf, aux)
cgthreematch_sbus(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct confargs *ca = aux;
struct romaux *ra = &ca->ca_ra;
struct sbus_attach_args *sa = aux;
/*
* Mask out invalid flags from the user.
*/
cf->cf_flags &= FB_USERMASK;
return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0);
}
if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
return (0);
if (ca->ca_bustype == BUS_SBUS)
return(1);
ra->ra_len = NBPG;
return (probeget(ra->ra_vaddr, 4) != -1);
int
cgthreematch_obio(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba;
if (uoba->uoba_isobio4 == 0)
return (strcmp(cf->cf_driver->cd_name, uoba->uoba_sbus.sa_name) == 0);
oba = &uoba->uoba_oba4;
return (obio_bus_probe(oba->oba_bustag, oba->oba_paddr,
0, 4, NULL, NULL));
}
/*
* Attach a display. We need to notice if it is the console, too.
*/
void
cgthreeattach(parent, self, args)
cgthreeattach_sbus(parent, self, args)
struct device *parent, *self;
void *args;
{
register struct cgthree_softc *sc = (struct cgthree_softc *)self;
register struct confargs *ca = args;
register int node = 0, ramsize, i;
register volatile struct bt_regs *bt;
struct cgthree_softc *sc = (struct cgthree_softc *)self;
struct sbus_attach_args *sa = args;
struct fbdevice *fb = &sc->sc_fb;
int node = sa->sa_node;
int isconsole;
int sbus = 1;
char *nam = NULL;
char *name;
bus_space_handle_t bh;
sc->sc_fb.fb_driver = &cgthreefbdriver;
sc->sc_fb.fb_device = &sc->sc_dev;
sc->sc_fb.fb_flags = sc->sc_dev.dv_cfdata->cf_flags;
/*
* The defaults below match my screen, but are not guaranteed
* to be correct as defaults go...
*/
sc->sc_fb.fb_type.fb_type = FBTYPE_SUN3COLOR;
switch (ca->ca_bustype) {
case BUS_OBIO:
if (CPU_ISSUN4M) { /* 4m has framebuffer on obio */
sbus = 0;
node = ca->ca_ra.ra_node;
nam = getpropstring(node, "model");
break;
}
case BUS_VME32:
case BUS_VME16:
sbus = node = 0;
nam = "cgthree";
break;
/* Remember cookies for cgthree_mmap() */
sc->sc_bustag = sa->sa_bustag;
sc->sc_btype = (bus_type_t)sa->sa_slot;
sc->sc_paddr = (bus_addr_t)sa->sa_offset;
case BUS_SBUS:
node = ca->ca_ra.ra_node;
nam = getpropstring(node, "model");
break;
}
fb->fb_driver = &cgthreefbdriver;
fb->fb_device = &sc->sc_dev;
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags & FB_USERMASK;
fb->fb_type.fb_type = FBTYPE_SUN3COLOR;
sc->sc_fb.fb_type.fb_depth = 8;
fb_setsize(&sc->sc_fb, sc->sc_fb.fb_type.fb_depth,
1152, 900, node, ca->ca_bustype);
ramsize = roundup(sc->sc_fb.fb_type.fb_height * sc->sc_fb.fb_linebytes,
NBPG);
sc->sc_fb.fb_type.fb_cmsize = 256;
sc->sc_fb.fb_type.fb_size = ramsize;
printf(": %s, %d x %d", nam,
sc->sc_fb.fb_type.fb_width, sc->sc_fb.fb_type.fb_height);
fb->fb_type.fb_depth = 8;
fb_setsize_obp(fb, fb->fb_type.fb_depth, 1152, 900, node);
/*
* When the ROM has mapped in a cgthree display, the address
@ -214,15 +205,118 @@ cgthreeattach(parent, self, args)
* registers ourselves. We only need the video RAM if we are
* going to print characters via rconsole.
*/
isconsole = node == fbnode && fbconstty != NULL;
if ((sc->sc_fb.fb_pixels = ca->ca_ra.ra_vaddr) == NULL && isconsole) {
/* this probably cannot happen, but what the heck */
sc->sc_fb.fb_pixels = mapiodev(ca->ca_ra.ra_reg, CG3REG_MEM,
ramsize);
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset + CG3REG_REG,
sizeof(struct fbcontrol),
BUS_SPACE_MAP_LINEAR,
0,
&bh) != 0) {
printf("%s: cannot map control registers\n", self->dv_xname);
return;
}
sc->sc_fbc = (volatile struct fbcontrol *)
mapiodev(ca->ca_ra.ra_reg, CG3REG_REG,
sizeof(struct fbcontrol));
sc->sc_fbc = (struct fbcontrol *)bh;
isconsole = node == fbnode && fbconstty != NULL;
name = getpropstring(node, "model");
fb->fb_pixels = sa->sa_promvaddr;
if (isconsole && fb->fb_pixels == NULL) {
int ramsize = fb->fb_type.fb_height * fb->fb_linebytes;
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset + CG3REG_MEM,
ramsize,
BUS_SPACE_MAP_LINEAR,
0,
&bh) != 0) {
printf("%s: cannot map pixels\n", self->dv_xname);
return;
}
sc->sc_fb.fb_pixels = (char *)bh;
}
sbus_establish(&sc->sc_sd, &sc->sc_dev);
cgthreeattach(sc, name, isconsole, node == fbnode);
}
void
cgthreeattach_obio(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct cgthree_softc *sc = (struct cgthree_softc *)self;
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba;
struct fbdevice *fb = &sc->sc_fb;
int isconsole;
char *name;
bus_space_handle_t bh;
if (uoba->uoba_isobio4 == 0) {
cgthreeattach_sbus(parent, self, aux);
return;
}
oba = &uoba->uoba_oba4;
/* Remember cookies for cgthree_mmap() */
sc->sc_bustag = oba->oba_bustag;
sc->sc_btype = (bus_type_t)0;
sc->sc_paddr = (bus_addr_t)oba->oba_paddr;
fb->fb_driver = &cgthreefbdriver;
fb->fb_device = &sc->sc_dev;
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags & FB_USERMASK;
fb->fb_type.fb_type = FBTYPE_SUN3COLOR;
fb->fb_type.fb_depth = 8;
fb_setsize_eeprom(fb, fb->fb_type.fb_depth, 1152, 900);
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
CG3REG_REG,
sizeof(struct fbcontrol),
BUS_SPACE_MAP_LINEAR,
0,
&bh) != 0) {
printf("%s: cannot map control registers\n", self->dv_xname);
return;
}
sc->sc_fbc = (struct fbcontrol *)bh;
isconsole = fbconstty != NULL;
name = "cgthree";
if (isconsole) {
int ramsize = fb->fb_type.fb_height * fb->fb_linebytes;
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
CG3REG_MEM,
ramsize,
BUS_SPACE_MAP_LINEAR,
0,
&bh) != 0) {
printf("%s: cannot map pixels\n", self->dv_xname);
return;
}
sc->sc_fb.fb_pixels = (char *)bh;
}
cgthreeattach(sc, name, isconsole, 1);
}
void
cgthreeattach(sc, name, isconsole, isfb)
struct cgthree_softc *sc;
char *name;
int isconsole;
int isfb;
{
int i;
struct fbdevice *fb = &sc->sc_fb;
volatile struct bt_regs *bt;
fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes;
printf(": %s, %d x %d", name,
fb->fb_type.fb_width, fb->fb_type.fb_height);
/* Transfer video magic to board, if it's not running */
if ((sc->sc_fbc->fbc_ctrl & FBC_TIMING) == 0)
@ -241,10 +335,8 @@ cgthreeattach(parent, self, args)
}
}
sc->sc_phys = ca->ca_ra.ra_reg[0];
sc->sc_bustype = ca->ca_bustype;
/* grab initial (current) color map */
fb->fb_type.fb_cmsize = 256;
bt = &sc->sc_fbc->fbc_dac;
bt->bt_addr = 0;
for (i = 0; i < 256 * 3 / 4; i++)
@ -257,16 +349,16 @@ cgthreeattach(parent, self, args)
if (isconsole) {
printf(" (console)\n");
#ifdef RASTERCONSOLE
fbrcons_init(&sc->sc_fb);
fbrcons_init(fb);
#endif
} else
printf("\n");
if (sbus)
sbus_establish(&sc->sc_sd, &sc->sc_dev);
if (node == fbnode)
fb_attach(&sc->sc_fb, isconsole);
if (isfb)
fb_attach(fb, isconsole);
}
int
cgthreeopen(dev, flags, mode, p)
dev_t dev;
@ -395,12 +487,12 @@ cgthree_get_video(sc)
*/
static void
cgthreeloadcmap(sc, start, ncolors)
register struct cgthree_softc *sc;
register int start, ncolors;
struct cgthree_softc *sc;
int start, ncolors;
{
register volatile struct bt_regs *bt;
register u_int *ip;
register int count;
volatile struct bt_regs *bt;
u_int *ip;
int count;
ip = &sc->sc_cmap.cm_chip[BT_D4M3(start)]; /* start/4 * 3 */
count = BT_D4M3(start + ncolors - 1) - BT_D4M3(start) + 3;
@ -429,7 +521,7 @@ cgthreemmap(dev, off, prot)
dev_t dev;
int off, prot;
{
register struct cgthree_softc *sc = cgthree_cd.cd_devs[minor(dev)];
struct cgthree_softc *sc = cgthree_cd.cd_devs[minor(dev)];
#define START (128*1024 + 128*1024)
#define NOOVERLAY (0x04000000)
@ -443,9 +535,12 @@ cgthreemmap(dev, off, prot)
off = 0;
if ((unsigned)off >= sc->sc_fb.fb_type.fb_size)
return (-1);
/*
* I turned on PMAP_NC here to disable the cache as I was
* getting horribly broken behaviour with it on.
*/
#if 0
return (REG2PHYS(&sc->sc_phys, CG3REG_MEM+off) | PMAP_NC);
#else
return (bus_space_mmap (sc->sc_bustag,
sc->sc_btype,
sc->sc_paddr + CG3REG_MEM + off,
BUS_SPACE_MAP_LINEAR));
#endif
}

69
sys/arch/sparc/dev/cgtwo.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: cgtwo.c,v 1.27 1998/02/06 00:24:41 pk Exp $ */
/* $NetBSD: cgtwo.c,v 1.28 1998/03/21 20:11:31 pk Exp $ */
/*
* Copyright (c) 1992, 1993
@ -71,9 +71,7 @@
#include <dev/vme/vmevar.h>
#if defined(SUN4)
#include <machine/eeprom.h>
#endif
#include <machine/conf.h>
#include <machine/cgtworeg.h>
@ -157,26 +155,26 @@ cgtwoattach(parent, self, aux)
bus_space_tag_t bt = va->vma_bustag;
bus_space_handle_t bh;
vme_mod_t mod;
register struct cgtwo_softc *sc = (struct cgtwo_softc *)self;
register int node = 0;
struct cgtwo_softc *sc = (struct cgtwo_softc *)self;
struct fbdevice *fb = &sc->sc_fb;
struct eeprom *eep = (struct eeprom *)eeprom_va;
int isconsole = 0;
char *nam = NULL;
sc->sc_ct = ct;
sc->sc_bt = bt;
sc->sc_fb.fb_driver = &cgtwofbdriver;
sc->sc_fb.fb_device = &sc->sc_dev;
sc->sc_fb.fb_type.fb_type = FBTYPE_SUN2COLOR;
sc->sc_fb.fb_flags = sc->sc_dev.dv_cfdata->cf_flags;
fb->fb_driver = &cgtwofbdriver;
fb->fb_device = &sc->sc_dev;
fb->fb_type.fb_type = FBTYPE_SUN2COLOR;
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags;
sc->sc_fb.fb_type.fb_depth = 8;
fb_setsize(&sc->sc_fb, sc->sc_fb.fb_type.fb_depth,
1152, 900, node, BUS_VME16 /* XXX*/);
fb->fb_type.fb_depth = 8;
fb_setsize_eeprom(fb, fb->fb_type.fb_depth, 1152, 900);
sc->sc_fb.fb_type.fb_cmsize = 256;
sc->sc_fb.fb_type.fb_size = roundup(CG2_MAPPED_SIZE, NBPG);
fb->fb_type.fb_cmsize = 256;
fb->fb_type.fb_size = roundup(CG2_MAPPED_SIZE, NBPG);
printf(": %s, %d x %d", nam,
sc->sc_fb.fb_type.fb_width, sc->sc_fb.fb_type.fb_height);
fb->fb_type.fb_width, fb->fb_type.fb_height);
/*
* When the ROM has mapped in a cgtwo display, the address
@ -184,31 +182,9 @@ cgtwoattach(parent, self, aux)
* registers ourselves. We only need the video RAM if we are
* going to print characters via rconsole.
*/
#if defined(SUN4)
if (CPU_ISSUN4) {
struct eeprom *eep = (struct eeprom *)eeprom_va;
/*
* Assume this is the console if there's no eeprom info
* to be found.
*/
if (eep == NULL || eep->eeConsole == EE_CONS_COLOR)
isconsole = (fbconstty != NULL);
else
isconsole = 0;
}
#endif
sc->sc_paddr = va->vma_reg[0];
mod = VMEMOD_A24 | VMEMOD_S | VMEMOD_D;
if (isconsole) {
if (vme_bus_map(ct, sc->sc_paddr + CG2_PIXMAP_OFF,
CG2_PIXMAP_SIZE, mod, bt, &bh) != 0)
panic("cgtwo: vme_map pixels");
sc->sc_fb.fb_pixels = (caddr_t)bh;
}
if (vme_bus_map(ct, sc->sc_paddr + CG2_ROPMEM_OFF +
offsetof(struct cg2fb, status.reg),
sizeof(struct cg2statusreg), mod, bt, &bh) != 0)
@ -221,16 +197,29 @@ cgtwoattach(parent, self, aux)
panic("cgtwo: vme_map cmap");
sc->sc_cmap = (volatile u_short *)bh;
/*
* Assume this is the console if there's no eeprom info
* to be found.
*/
if (eep == NULL || eep->eeConsole == EE_CONS_COLOR)
isconsole = (fbconstty != NULL);
else
isconsole = 0;
if (isconsole) {
if (vme_bus_map(ct, sc->sc_paddr + CG2_PIXMAP_OFF,
CG2_PIXMAP_SIZE, mod, bt, &bh) != 0)
panic("cgtwo: vme_map pixels");
fb->fb_pixels = (caddr_t)bh;
printf(" (console)\n");
#ifdef RASTERCONSOLE
fbrcons_init(&sc->sc_fb);
fbrcons_init(fb);
#endif
} else
printf("\n");
if (node == fbnode || CPU_ISSUN4)
fb_attach(&sc->sc_fb, isconsole);
fb_attach(fb, isconsole);
}
int

311
sys/arch/sparc/dev/esp.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: esp.c,v 1.71 1998/01/12 20:23:47 thorpej Exp $ */
/* $NetBSD: esp.c,v 1.72 1998/03/21 20:14:13 pk Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
@ -123,8 +123,9 @@
#include <dev/scsipi/scsiconf.h>
#include <dev/scsipi/scsi_message.h>
#include <machine/cpu.h>
#include <machine/bus.h>
#include <machine/autoconf.h>
#include <machine/cpu.h>
#include <dev/ic/ncr53c9xreg.h>
#include <dev/ic/ncr53c9xvar.h>
@ -134,12 +135,23 @@
#include <sparc/dev/dmavar.h>
#include <sparc/dev/espvar.h>
void espattach __P((struct device *, struct device *, void *));
int espmatch __P((struct device *, struct cfdata *, void *));
void espattach_sbus __P((struct device *, struct device *, void *));
void espattach_obio __P((struct device *, struct device *, void *));
void espattach_dma __P((struct device *, struct device *, void *));
int espmatch_sbus __P((struct device *, struct cfdata *, void *));
int espmatch_obio __P((struct device *, struct cfdata *, void *));
void espattach __P((struct esp_softc *));
/* Linkup to the rest of the kernel */
struct cfattach esp_ca = {
sizeof(struct esp_softc), espmatch, espattach
struct cfattach esp_sbus_ca = {
sizeof(struct esp_softc), espmatch_sbus, espattach_sbus
};
struct cfattach esp_dma_ca = {
sizeof(struct esp_softc), espmatch_sbus, espattach_dma
};
struct cfattach esp_obio_ca = {
sizeof(struct esp_softc), espmatch_obio, espattach_obio
};
struct scsipi_adapter esp_switch = {
@ -184,86 +196,53 @@ struct ncr53c9x_glue esp_glue = {
};
int
espmatch(parent, cf, aux)
espmatch_sbus(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
register struct confargs *ca = aux;
register struct romaux *ra = &ca->ca_ra;
struct sbus_attach_args *sa = aux;
if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
return (0);
if (ca->ca_bustype == BUS_SBUS)
return (1);
ra->ra_len = NBPG;
return (probeget(ra->ra_vaddr, 1) != -1);
return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0);
}
int
espmatch_obio(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba;
if (uoba->uoba_isobio4 == 0)
return (0);
oba = &uoba->uoba_oba4;
return (obio_bus_probe(oba->oba_bustag, oba->oba_paddr,
0, 1, NULL, NULL));
}
/*
* Attach this instance, and then all the sub-devices
*/
void
espattach(parent, self, aux)
espattach_sbus(parent, self, aux)
struct device *parent, *self;
void *aux;
{
register struct confargs *ca = aux;
struct esp_softc *esc = (void *)self;
struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
struct bootpath *bp;
int dmachild = strncmp(parent->dv_xname, "dma", 3) == 0;
struct sbus_attach_args *sa = aux;
/*
* Set up glue for MI code early; we use some of it here.
*/
sc->sc_glue = &esp_glue;
esc->sc_bustag = sa->sa_bustag;
esc->sc_dmatag = sa->sa_dmatag;
/*
* Make sure things are sane. I don't know if this is ever
* necessary, but it seem to be in all of Torek's code.
*/
if (ca->ca_ra.ra_nintr != 1) {
printf(": expected 1 interrupt, got %d\n", ca->ca_ra.ra_nintr);
return;
}
esc->sc_pri = ca->ca_ra.ra_intr[0].int_pri;
printf(" pri %d", esc->sc_pri);
/*
* Map my registers in, if they aren't already in virtual
* address space.
*/
if (ca->ca_ra.ra_vaddr)
esc->sc_reg = (volatile u_char *) ca->ca_ra.ra_vaddr;
else {
esc->sc_reg = (volatile u_char *)
mapiodev(ca->ca_ra.ra_reg, 0, ca->ca_ra.ra_len);
}
/* Other settings */
esc->sc_node = ca->ca_ra.ra_node;
if (ca->ca_bustype == BUS_SBUS) {
sc->sc_id = getpropint(esc->sc_node, "initiator-id", 7);
sc->sc_freq = getpropint(esc->sc_node, "clock-frequency", -1);
} else {
sc->sc_id = 7;
sc->sc_freq = 24000000;
}
sc->sc_id = getpropint(sa->sa_node, "initiator-id", 7);
sc->sc_freq = getpropint(sa->sa_node, "clock-frequency", -1);
if (sc->sc_freq < 0)
sc->sc_freq = ((struct sbus_softc *)
sc->sc_dev.dv_parent)->sc_clockfreq;
/* gimme Mhz */
sc->sc_freq /= 1000000;
if (dmachild) {
esc->sc_dma = (struct dma_softc *)parent;
esc->sc_dma->sc_esp = esc;
} else {
/*
* find the DMA by poking around the dma device structures
* Find the DMA by poking around the dma device structures
*
* What happens here is that if the dma driver has not been
* configured, then this returns a NULL pointer. Then when the
@ -271,8 +250,7 @@ espattach(parent, self, aux)
* if the sc->sc_esp field in it's softc is NULL, then tries to
* find the matching esp driver.
*/
esc->sc_dma = (struct dma_softc *)
getdevunit("dma", sc->sc_dev.dv_unit);
esc->sc_dma = (struct dma_softc *)getdevunit("dma", sc->sc_dev.dv_unit);
/*
* and a back pointer to us, for DMA
@ -283,7 +261,166 @@ espattach(parent, self, aux)
printf("\n");
panic("espattach: no dma found");
}
/*
* Map my registers in, if they aren't already in virtual
* address space.
*/
if (sa->sa_promvaddr)
esc->sc_reg = (volatile u_char *) sa->sa_promvaddr;
else {
bus_space_handle_t bh;
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset,
sa->sa_size,
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s @ sbus: cannot map registers\n",
self->dv_xname);
return;
}
esc->sc_reg = (volatile u_char *)bh;
}
esc->sc_pri = sa->sa_pri;
/* add me to the sbus structures */
esc->sc_sd.sd_reset = (void *) ncr53c9x_reset;
sbus_establish(&esc->sc_sd, &sc->sc_dev);
if (sa->sa_bp != NULL && strcmp(sa->sa_bp->name, "esp") == 0 &&
SAME_ESP(sc, sa->sa_bp, sa))
bootpath_store(1, sa->sa_bp + 1);
espattach(esc);
}
void
espattach_dma(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct esp_softc *esc = (void *)self;
struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
struct sbus_attach_args *sa = aux;
esc->sc_bustag = sa->sa_bustag;
esc->sc_dmatag = sa->sa_dmatag;
sc->sc_id = getpropint(sa->sa_node, "initiator-id", 7);
sc->sc_freq = getpropint(sa->sa_node, "clock-frequency", -1);
esc->sc_dma = (struct dma_softc *)parent;
esc->sc_dma->sc_esp = esc;
/*
* Map my registers in, if they aren't already in virtual
* address space.
*/
if (sa->sa_promvaddr)
esc->sc_reg = (volatile u_char *) sa->sa_promvaddr;
else {
bus_space_handle_t bh;
if (bus_space_map2(sa->sa_bustag,
sa->sa_slot,
sa->sa_offset,
sa->sa_size,
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s @ dma: cannot map registers\n",
self->dv_xname);
return;
}
esc->sc_reg = (volatile u_char *)bh;
}
/* Establish interrupt handler */
esc->sc_pri = sa->sa_pri;
/* Assume SBus is grandparent */
esc->sc_sd.sd_reset = (void *) ncr53c9x_reset;
sbus_establish(&esc->sc_sd, parent);
if (sa->sa_bp != NULL && strcmp(sa->sa_bp->name, "esp") == 0 &&
SAME_ESP(sc, sa->sa_bp, sa))
bootpath_store(1, sa->sa_bp + 1);
espattach(esc);
}
void
espattach_obio(parent, self, aux)
struct device *parent, *self;
void *aux;
{
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba = &uoba->uoba_oba4;
struct esp_softc *esc = (void *)self;
struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
bus_space_handle_t bh;
esc->sc_bustag = oba->oba_bustag;
esc->sc_dmatag = oba->oba_dmatag;
sc->sc_id = 7;
sc->sc_freq = 24000000;
/*
* Find the DMA by poking around the dma device structures
*/
esc->sc_dma = (struct dma_softc *)getdevunit("dma", sc->sc_dev.dv_unit);
/*
* and a back pointer to us, for DMA
*/
if (esc->sc_dma)
esc->sc_dma->sc_esp = esc;
else {
printf("\n");
panic("espattach: no dma found");
}
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
0, /* offset */
16, /* size */
0, /* flags */
0, &bh) != 0) {
printf("%s @ obio: cannot map registers\n", self->dv_xname);
return;
}
esc->sc_reg = (volatile u_char *)bh;
esc->sc_pri = oba->oba_pri;
if (oba->oba_bp != NULL && strcmp(oba->oba_bp->name, "esp") == 0 &&
oba->oba_bp->val[0] == -1 &&
oba->oba_bp->val[1] == sc->sc_dev.dv_unit)
bootpath_store(1, oba->oba_bp + 1);
espattach(esc);
}
/*
* Attach this instance, and then all the sub-devices
*/
void
espattach(esc)
struct esp_softc *esc;
{
struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
void *icookie;
/*
* Set up glue for MI code early; we use some of it here.
*/
sc->sc_glue = &esp_glue;
#if 0
printf(" pri %d", esc->sc_pri);
#endif
/* gimme Mhz */
sc->sc_freq /= 1000000;
/*
* XXX More of this should be in ncr53c9x_attach(), but
@ -363,42 +500,14 @@ espattach(parent, self, aux)
break;
}
/* add me to the sbus structures */
esc->sc_sd.sd_reset = (void *) ncr53c9x_reset;
#if defined(SUN4C) || defined(SUN4M)
if (ca->ca_bustype == BUS_SBUS) {
if (dmachild)
sbus_establish(&esc->sc_sd, sc->sc_dev.dv_parent);
else
sbus_establish(&esc->sc_sd, &sc->sc_dev);
}
#endif /* SUN4C || SUN4M */
/* Establish interrupt channel */
icookie = bus_intr_establish(esc->sc_bustag,
esc->sc_pri, 0,
(int(*)__P((void*)))ncr53c9x_intr, sc);
/* and the interuppts */
esc->sc_ih.ih_fun = (void *) ncr53c9x_intr;
esc->sc_ih.ih_arg = sc;
intr_establish(esc->sc_pri, &esc->sc_ih);
/* register interrupt stats */
evcnt_attach(&sc->sc_dev, "intr", &sc->sc_intrcnt);
/*
* If the boot path is "esp" at the moment and it's me, then
* walk our pointer to the sub-device, ready for the config
* below.
*/
bp = ca->ca_ra.ra_bp;
switch (ca->ca_bustype) {
case BUS_SBUS:
if (bp != NULL && strcmp(bp->name, "esp") == 0 &&
SAME_ESP(sc, bp, ca))
bootpath_store(1, bp + 1);
break;
default:
if (bp != NULL && strcmp(bp->name, "esp") == 0 &&
bp->val[0] == -1 && bp->val[1] == sc->sc_dev.dv_unit)
bootpath_store(1, bp + 1);
break;
}
/* Do the common parts of attachment. */
ncr53c9x_attach(sc, &esp_switch, &esp_dev);

237
sys/arch/sparc/dev/fd.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: fd.c,v 1.57 1998/02/10 14:11:35 mrg Exp $ */
/* $NetBSD: fd.c,v 1.58 1998/03/21 20:14:13 pk Exp $ */
/*-
* Copyright (c) 1993, 1994, 1995 Charles Hannum.
@ -110,8 +110,7 @@ enum fdc_state {
/* software state, per controller */
struct fdc_softc {
struct device sc_dev; /* boilerplate */
struct intrhand sc_sih;
struct intrhand sc_hih;
bus_space_tag_t sc_bustag;
caddr_t sc_reg;
struct fd_softc *sc_fd[4]; /* pointers to children */
TAILQ_HEAD(drivehead, fd_softc) sc_drives;
@ -141,11 +140,18 @@ extern struct fdcio *fdciop;
#endif
/* controller driver configuration */
int fdcmatch __P((struct device *, struct cfdata *, void *));
void fdcattach __P((struct device *, struct device *, void *));
int fdcmatch_mainbus __P((struct device *, struct cfdata *, void *));
int fdcmatch_obio __P((struct device *, struct cfdata *, void *));
void fdcattach_mainbus __P((struct device *, struct device *, void *));
void fdcattach_obio __P((struct device *, struct device *, void *));
struct cfattach fdc_ca = {
sizeof(struct fdc_softc), fdcmatch, fdcattach
void fdcattach __P((struct fdc_softc *, int, struct bootpath *));
struct cfattach fdc_mainbus_ca = {
sizeof(struct fdc_softc), fdcmatch_mainbus, fdcattach_mainbus
};
struct cfattach fdc_obio_ca = {
sizeof(struct fdc_softc), fdcmatch_obio, fdcattach_obio
};
__inline struct fd_type *fd_dev_to_type __P((struct fd_softc *, dev_t));
@ -239,11 +245,11 @@ void fdc_reset __P((struct fdc_softc *fdc));
void fdctimeout __P((void *arg));
void fdcpseudointr __P((void *arg));
#ifdef FDC_C_HANDLER
int fdchwintr __P((struct fdc_softc *));
int fdchwintr __P((void *));
#else
void fdchwintr __P((void));
#endif
int fdcswintr __P((struct fdc_softc *));
int fdcswintr __P((void *));
int fdcstate __P((struct fdc_softc *));
void fdcretry __P((struct fdc_softc *fdc));
void fdfinish __P((struct fd_softc *fd, struct buf *bp));
@ -274,38 +280,54 @@ static void fdconf __P((struct fdc_softc *));
#define OBP_FDNAME (CPU_ISSUN4M ? "SUNW,fdtwo" : "fd")
int
fdcmatch(parent, match, aux)
fdcmatch_mainbus(parent, match, aux)
struct device *parent;
struct cfdata *match;
void *aux;
{
register struct confargs *ca = aux;
register struct romaux *ra = &ca->ca_ra;
/*
* Floppy doesn't exist on sun4.
*/
if (CPU_ISSUN4)
return (0);
struct mainbus_attach_args *ma = aux;
/*
* Floppy controller is on mainbus on sun4c.
*/
if ((CPU_ISSUN4C) && (ca->ca_bustype != BUS_MAIN))
if (!CPU_ISSUN4C)
return (0);
/* sun4c PROMs call the controller "fd" */
if (strcmp("fd", ma->ma_name) != 0)
return (0);
if (ma->ma_promvaddr &&
probeget(ma->ma_promvaddr, 1) == -1) {
return (0);
}
return (1);
}
int
fdcmatch_obio(parent, match, aux)
struct device *parent;
struct cfdata *match;
void *aux;
{
union obio_attach_args *uoba = aux;
struct sbus_attach_args *sa;
/*
* Floppy controller is on obio on sun4m.
*/
if ((CPU_ISSUN4M) && (ca->ca_bustype != BUS_OBIO))
if (uoba->uoba_isobio4 != 0)
return (0);
/* Sun PROMs call the controller an "fd" or "SUNW,fdtwo" */
if (strcmp(OBP_FDNAME, ra->ra_name))
sa = &uoba->uoba_sbus;
/* sun4m PROMs call the controller "SUNW,fdtwo" */
if (strcmp("SUNW,fdtwo", sa->sa_name) != 0)
return (0);
if (ca->ca_ra.ra_vaddr &&
probeget(ca->ca_ra.ra_vaddr, 1) == -1) {
if (sa->sa_promvaddr &&
probeget(sa->sa_promvaddr, 1) == -1) {
return (0);
}
@ -364,41 +386,117 @@ fdconf(fdc)
/* No result phase */
}
/*
* Controller and drives are represented by one and the same
* Openprom node, so we can as well check for the floppy boots here.
*/
void
fdcattach(parent, self, aux)
fdcattach_mainbus(parent, self, aux)
struct device *parent, *self;
void *aux;
{
register struct confargs *ca = aux;
struct fdc_softc *fdc = (void *)self;
struct fdc_attach_args fa;
struct mainbus_attach_args *ma = aux;
struct bootpath *bp;
int pri;
char code;
if (ca->ca_ra.ra_vaddr)
fdc->sc_reg = (caddr_t)ca->ca_ra.ra_vaddr;
else
fdc->sc_reg = (caddr_t)mapiodev(ca->ca_ra.ra_reg, 0,
ca->ca_ra.ra_len);
fdc->sc_bustag = ma->ma_bustag;
fdc->sc_reg = (caddr_t)ma->ma_promvaddr;
bp = NULL;
if (ma->ma_bp != NULL && strcmp(ma->ma_bp->name, OBP_FDNAME) == 0) {
int v0 = ma->ma_bp->val[0];
int v1 = ma->ma_bp->val[1];
/*
* We can get the bootpath in several different
* formats! The faked v1 bootpath looks like /fd@0,0.
* The v2 bootpath is either just /fd0, in which case
* `bp->val[0]' will have been set to -1, or /fd@x,y
* where <x,y> is the prom address specifier.
*/
if (((v0 == ma->ma_iospace) && (v1 == (int)ma->ma_paddr)) ||
((v0 == -1) && (v1 == 0)) || /* v2: /fd0 */
((v0 == 0) && (v1 == 0)) /* v1: /fd@0,0 */ )
bp = ma->ma_bp;
}
fdcattach(fdc, ma->ma_pri, bp);
}
void
fdcattach_obio(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct fdc_softc *fdc = (void *)self;
union obio_attach_args *uoba = aux;
struct sbus_attach_args *sa = &uoba->uoba_sbus;
struct bootpath *bp;
fdc->sc_bustag = sa->sa_bustag;
if (sa->sa_promvaddr != 0)
fdc->sc_reg = (caddr_t)sa->sa_promvaddr;
else {
bus_space_handle_t bh;
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset,
sa->sa_size,
BUS_SPACE_MAP_LINEAR,
0,
&bh) != 0) {
printf("%s: cannot map control registers\n",
self->dv_xname);
return;
}
fdc->sc_reg = (caddr_t)bh;
}
bp = NULL;
if (sa->sa_bp != NULL && strcmp(sa->sa_bp->name, OBP_FDNAME) == 0) {
int v0 = sa->sa_bp->val[0];
int v1 = sa->sa_bp->val[1];
/*
* floppy controller on obio (such as on the sun4m),
* e.g.: `/obio0/SUNW,fdtwo@0,700000'.
* We use "slot, offset" to determine if this is the
* right one.
*/
if ((v0 != sa->sa_slot) || (v1 != sa->sa_offset))
bp = sa->sa_bp;
}
fdcattach(fdc, sa->sa_pri, bp);
}
void
fdcattach(fdc, pri, bp)
struct fdc_softc *fdc;
int pri;
struct bootpath *bp;
{
struct fdc_attach_args fa;
char code;
fdc->sc_state = DEVIDLE;
fdc->sc_istate = ISTATE_IDLE;
fdc->sc_flags |= FDC_EIS;
TAILQ_INIT(&fdc->sc_drives);
pri = ca->ca_ra.ra_intr[0].int_pri;
#ifdef FDC_C_HANDLER
fdc->sc_hih.ih_fun = (void *)fdchwintr;
fdc->sc_hih.ih_arg = fdc;
intr_establish(pri, &fdc->sc_hih);
(void)bus_intr_establish(fdc->sc_bustag, pri, 0,
fdchwintr, fdc);
#else
fdciop = &fdc->sc_io;
intr_fasttrap(pri, fdchwintr);
(void)bus_intr_establish(fdc->sc_bustag, pri,
BUS_INTR_ESTABLISH_FASTTRAP,
(int (*) __P((void *)))fdchwintr, NULL);
#endif
fdc->sc_sih.ih_fun = (void *)fdcswintr;
fdc->sc_sih.ih_arg = fdc;
intr_establish(PIL_FDSOFT, &fdc->sc_sih);
(void)bus_intr_establish(fdc->sc_bustag, PIL_FDSOFT,
BUS_INTR_ESTABLISH_SOFTINTR,
fdcswintr, fdc);
/* Assume a 82077 */
fdc->sc_reg_msr = &((struct fdreg_77 *)fdc->sc_reg)->fd_msr;
@ -449,56 +547,15 @@ fdcattach(parent, self, aux)
evcnt_attach(&fdc->sc_dev, "intr", &fdc->sc_intrcnt);
printf(" pri %d, softpri %d: chip 8207%c\n", pri, PIL_FDSOFT, code);
printf(" softpri %d: chip 8207%c\n", PIL_FDSOFT, code);
/*
* Controller and drives are represented by one and the same
* Openprom node, so we can as well check for the floppy boots here.
*/
fa.fa_bootpath = 0;
if ((bp = ca->ca_ra.ra_bp) && strcmp(bp->name, OBP_FDNAME) == 0) {
switch (ca->ca_bustype) {
case BUS_MAIN:
/*
* We can get the bootpath in several different
* formats! The faked v1 bootpath looks like /fd@0,0.
* The v2 bootpath is either just /fd0, in which case
* `bp->val[0]' will have been set to -1, or /fd@x,y
* where <x,y> is the prom address specifier.
*/
if (((bp->val[0] == ca->ca_ra.ra_iospace) &&
(bp->val[1] == (int)ca->ca_ra.ra_paddr)) ||
((bp->val[0] == -1) && /* v2: /fd0 */
(bp->val[1] == 0)) ||
((bp->val[0] == 0) && /* v1: /fd@0,0 */
(bp->val[1] == 0))
)
fa.fa_bootpath = bp;
break;
case BUS_OBIO:
/*
* floppy controller on obio (such as on the sun4m),
* e.g.: `/obio0/SUNW,fdtwo@0,700000'.
* We use "slot, offset" to determine if this is the
* right one.
*/
if ((bp->val[0] == ca->ca_slot) &&
(bp->val[1] == ca->ca_offset))
fa.fa_bootpath = bp;
break;
}
}
/* physical limit: four drives per controller. */
for (fa.fa_drive = 0; fa.fa_drive < 4; fa.fa_drive++) {
fa.fa_deftype = NULL; /* unknown */
fa.fa_deftype = &fd_types[0]; /* XXX */
(void)config_found(self, (void *)&fa, fdprint);
(void)config_found(&fdc->sc_dev, (void *)&fa, fdprint);
}
bootpath_store(1, NULL);
@ -1091,9 +1148,10 @@ fdcpseudointr(arg)
* (in-window) handler.
*/
int
fdchwintr(fdc)
struct fdc_softc *fdc;
fdchwintr(arg)
void *arg;
{
struct fdc_softc *fdc = arg;
switch (fdc->sc_istate) {
case ISTATE_IDLE:
@ -1151,9 +1209,10 @@ fdchwintr(fdc)
#endif
int
fdcswintr(fdc)
struct fdc_softc *fdc;
fdcswintr(arg)
void *arg;
{
struct fdc_softc *fdc = arg;
int s;
if (fdc->sc_istate != ISTATE_DONE)

82
sys/arch/sparc/dev/if_en_sbus.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_en_sbus.c,v 1.4 1997/05/24 20:16:22 pk Exp $ */
/* $NetBSD: if_en_sbus.c,v 1.5 1998/03/21 20:14:14 pk Exp $ */
/*
*
@ -70,7 +70,6 @@ struct en_sbus_softc {
/* sbus glue */
struct sbusdev sc_sd; /* sbus device */
struct intrhand sc_ih; /* interrupt vectoring */
};
/*
@ -100,72 +99,61 @@ struct cfattach en_sbus_ca = {
* autoconfig stuff
*/
static int en_sbus_match(parent, match, aux)
struct device *parent;
void *match;
void *aux;
static int
en_sbus_match(parent, match, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct cfdata *cf = match;
struct confargs *ca = aux;
register struct romaux *ra = &ca->ca_ra;
struct sbus_attach_args *sa = aux;
if (strcmp("ENI-155s", ra->ra_name))
return 0;
if (ca->ca_bustype == BUS_SBUS)
return (1);
return 0;
if (CPU_ISSUN4M) {
#ifdef DEBUG
printf("%s: sun4m DMA not supported yet\n", sa->sa_name);
#endif
return (0);
}
return (strcmp("ENI-155s", sa->sa_name) == 0);
}
static void en_sbus_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
static void
en_sbus_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct sbus_attach_args *sa = aux;
struct en_softc *sc = (void *)self;
struct en_sbus_softc *scs = (void *)self;
struct confargs *ca = aux;
bus_space_handle_t bh;
struct intrhand *ih;
int lcv, iplcode;
printf("\n");
if (CPU_ISSUN4M) {
printf("%s: sun4m DMA not supported yet\n", sc->sc_dev.dv_xname);
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset,
4*1024*1024,
0, 0, &bh) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
sc->en_base = (volatile caddr_t)bh;
sc->en_base = (caddr_t) mapiodev(ca->ca_ra.ra_reg, 0, 4*1024*1024);
/* Establish interrupt channel */
ih = bus_intr_establish(sa->sa_bustag,
sa->sa_pri, 0,
en_intr, sc);
if (ca->ca_ra.ra_nintr == 1) {
sc->ipl = ca->ca_ra.ra_intr[0].int_pri;
} else {
printf("%s: claims to be at the following IPLs: ", sc->sc_dev.dv_xname);
iplcode = 0;
for (lcv = 0 ; lcv < ca->ca_ra.ra_nintr ; lcv++) {
printf("%d ", ca->ca_ra.ra_intr[lcv].int_pri);
if (EN_IPL == ca->ca_ra.ra_intr[lcv].int_pri)
iplcode = lcv;
}
if (!iplcode) {
printf("%s: can't find the IPL we want (%d)\n", sc->sc_dev.dv_xname,
EN_IPL);
return;
}
printf("\n%s: we choose IPL %d\n", sc->sc_dev.dv_xname, EN_IPL);
sc->ipl = iplcode;
}
scs->sc_ih.ih_fun = en_intr;
scs->sc_ih.ih_arg = sc;
intr_establish(EN_IPL, &scs->sc_ih);
sc->ipl = ih->ih_pri; /* used to be this */
/*sc->ipl = sa->sa_pri; -* but this might more appropriate? */
sbus_establish(&scs->sc_sd, &sc->sc_dev);
/*
* done SBUS specific stuff
*/
en_attach(sc);
}

68
sys/arch/sparc/dev/if_ie_obio.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_ie_obio.c,v 1.3 1998/02/28 01:16:43 pk Exp $ */
/* $NetBSD: if_ie_obio.c,v 1.4 1998/03/21 20:14:14 pk Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
@ -255,21 +255,15 @@ ie_obio_match(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
struct confargs *ca = aux;
struct romaux *ra = &ca->ca_ra;
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba;
if (strcmp(cf->cf_driver->cd_name, ra->ra_name)) /* correct name? */
if (uoba->uoba_isobio4 == 0)
return (0);
switch (ca->ca_bustype) {
default:
return (0);
case BUS_OBIO:
if (probeget(ra->ra_vaddr, 1) != -1)
return (1);
break;
}
return (0);
oba = &uoba->uoba_oba4;
return (obio_bus_probe(oba->oba_bustag, oba->oba_paddr,
0, 1, NULL, NULL));
}
void
@ -278,14 +272,16 @@ ie_obio_attach(parent, self, aux)
struct device *self;
void *aux;
{
u_int8_t myaddr[ETHER_ADDR_LEN];
extern void myetheraddr(u_char *); /* should be elsewhere */
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba = &uoba->uoba_oba4;
struct ie_softc *sc = (void *) self;
struct confargs *ca = aux;
struct intrhand *ih;
register struct bootpath *bp;
bus_space_handle_t bh;
struct bootpath *bp;
volatile struct ieob *ieo;
vm_offset_t pa;
struct intrhand *ih;
u_int8_t myaddr[ETHER_ADDR_LEN];
extern void myetheraddr(u_char *); /* should be elsewhere */
sc->bt = 0;
@ -299,8 +295,16 @@ ie_obio_attach(parent, self, aux)
sc->ie_bus_write24 = ie_obio_write24;
sc->sc_msize = 65536; /* XXX */
sc->sc_reg = mapiodev(ca->ca_ra.ra_reg, 0, sizeof(struct ieob));
ieo = (volatile struct ieob *) sc->sc_reg;
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
0,
sizeof(struct ieob),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
sc->sc_reg = (void *)bh;
ieo = (volatile struct ieob *)bh;
/*
* the rest of the IE_OBIO case needs to be cleaned up
@ -355,6 +359,17 @@ ie_obio_attach(parent, self, aux)
* to IEOB_ADBASE to be safe.
*/
#if 0
|---//--- ISCP-SCB-----scp-|--//- buffers -//-|... |iscp-scb-----SCP-|
| | | | | |
| |<----- NBPG --->| | |<----- NBPG ---->|
| |<------------- msize ------------->| | ^
| | |
| \@maddr (last page dbl mapped)
|
\@IEOB_ADBASE
#endif
pa = pmap_extract(pmap_kernel(), (vm_offset_t)sc->sc_maddr);
if (pa == 0)
panic("ie pmap_extract");
@ -375,15 +390,12 @@ ie_obio_attach(parent, self, aux)
myetheraddr(myaddr);
i82586_attach(sc, "onboard", myaddr, media, NMEDIA, media[0]);
ih = malloc(sizeof *ih, M_DEVBUF, M_NOWAIT);
if (ih == NULL)
panic("ie_obio: can't malloc interrupt handler");
/* Establish interrupt channel */
ih = bus_intr_establish(oba->oba_bustag,
oba->oba_pri, 0,
i82586_intr, sc);
ih->ih_fun = i82586_intr;
ih->ih_arg = sc;
intr_establish(ca->ca_ra.ra_intr[0].int_pri, ih);
bp = ca->ca_ra.ra_bp;
bp = oba->oba_bp;
if (bp != NULL && strcmp(bp->name, "ie") == 0 &&
sc->sc_dev.dv_unit == bp->val[1])
bp->dev = &sc->sc_dev;

381
sys/arch/sparc/dev/if_le.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_le.c,v 1.52 1998/01/12 20:23:52 thorpej Exp $ */
/* $NetBSD: if_le.c,v 1.53 1998/03/21 20:14:13 pk Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
@ -113,9 +113,16 @@
#include <sparc/dev/if_lereg.h>
#include <sparc/dev/if_levar.h>
int lematch __P((struct device *, struct cfdata *, void *));
void leattach __P((struct device *, struct device *, void *));
int lematch_byname __P((struct device *, struct cfdata *, void *));
int lematch_obio __P((struct device *, struct cfdata *, void *));
void leattach_sbus __P((struct device *, struct device *, void *));
void leattach_ledma __P((struct device *, struct device *, void *));
void leattach_lebuffer __P((struct device *, struct device *, void *));
void leattach_obio __P((struct device *, struct device *, void *));
void leattach __P((struct le_softc *, int));
#if 0
#if defined(SUN4M) /* XXX */
int myleintr __P((void *));
int ledmaintr __P((struct dma_softc *));
@ -142,6 +149,7 @@ static int dodrain=0;
return (am7990_intr(arg));
}
#endif
#endif
#if defined(SUN4M)
/*
@ -161,8 +169,21 @@ int lemediachange __P((struct am7990_softc *));
void lemediastatus __P((struct am7990_softc *, struct ifmediareq *));
#endif /* SUN4M */
struct cfattach le_ca = {
sizeof(struct le_softc), lematch, leattach
/* Four attachments for this device */
struct cfattach le_sbus_ca = {
sizeof(struct le_softc), lematch_byname, leattach_sbus
};
struct cfattach le_ledma_ca = {
sizeof(struct le_softc), lematch_byname, leattach_ledma
};
struct cfattach le_lebuffer_ca = {
sizeof(struct le_softc), lematch_byname, leattach_lebuffer
};
struct cfattach le_obio_ca = {
sizeof(struct le_softc), lematch_obio, leattach_obio
};
extern struct cfdriver le_cd;
@ -367,133 +388,299 @@ lenocarrier(sc)
}
int
lematch(parent, cf, aux)
lematch_byname(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct confargs *ca = aux;
register struct romaux *ra = &ca->ca_ra;
struct sbus_attach_args *sa = aux;
if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
return (0);
if (ca->ca_bustype == BUS_SBUS)
return (1);
return (probeget(ra->ra_vaddr, 2) != -1);
return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0);
}
int
lematch_obio(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba;
if (uoba->uoba_isobio4 == 0)
return (0);
oba = &uoba->uoba_oba4;
return (obio_bus_probe(oba->oba_bustag, oba->oba_paddr,
0, 2, NULL, NULL));
}
#define SAME_LANCE(bp, sa) \
((bp->val[0] == sa->sa_slot && bp->val[1] == sa->sa_offset) || \
(bp->val[0] == -1 && bp->val[1] == sc->sc_dev.dv_unit))
void
leattach(parent, self, aux)
leattach_sbus(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct sbus_attach_args *sa = aux;
struct le_softc *lesc = (struct le_softc *)self;
struct am7990_softc *sc = &lesc->sc_am7990;
struct confargs *ca = aux;
int pri;
struct bootpath *bp;
#if defined(SUN4C) || defined(SUN4M)
int sbuschild = strncmp(parent->dv_xname, "sbus", 4) == 0;
int lebufchild = strncmp(parent->dv_xname, "lebuffer", 8) == 0;
int dmachild = strncmp(parent->dv_xname, "ledma", 5) == 0;
struct lebuf_softc *lebuf;
#endif
struct sbusdev *sd;
bus_space_handle_t bh;
/* XXX the following declarations should be elsewhere */
extern void myetheraddr __P((u_char *));
lesc->sc_bustag = sa->sa_bustag;
lesc->sc_dmatag = sa->sa_dmatag;
if (ca->ca_ra.ra_nintr != 1) {
printf(": expected 1 interrupt, got %d\n", ca->ca_ra.ra_nintr);
if (sbus_bus_map(sa->sa_bustag,
sa->sa_slot,
sa->sa_offset,
sizeof(struct lereg1),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s @ sbus: cannot map registers\n", self->dv_xname);
return;
}
pri = ca->ca_ra.ra_intr[0].int_pri;
printf(" pri %d", pri);
lesc->sc_r1 = (struct lereg1 *)
mapiodev(ca->ca_ra.ra_reg, 0, sizeof(struct lereg1));
#if defined(SUN4C) || defined(SUN4M)
lebuf = NULL;
if (lebufchild) {
lebuf = (struct lebuf_softc *)parent;
} else if (sbuschild) {
struct sbus_softc *sbus = (struct sbus_softc *)parent;
struct sbusdev *sd;
lesc->sc_r1 = (struct lereg1 *)bh;
/*
* Find last "unallocated" lebuffer and pair it with
* Look for an "unallocated" lebuffer and pair it with
* this `le' device on the assumption that we're on
* a pre-historic ROM that doesn't establish le<=>lebuffer
* parent-child relationships.
*/
for (sd = sbus->sc_sbdev; sd != NULL; sd = sd->sd_bchain) {
for (sd = ((struct sbus_softc *)parent)->sc_sbdev; sd != NULL;
sd = sd->sd_bchain) {
struct lebuf_softc *lebuf = (struct lebuf_softc *)sd->sd_dev;
if (strncmp("lebuffer", sd->sd_dev->dv_xname, 8) != 0)
continue;
if (((struct lebuf_softc *)sd->sd_dev)->attached == 0) {
lebuf = (struct lebuf_softc *)sd->sd_dev;
break;
}
}
}
if (lebuf != NULL) {
if (lebuf->attached != 0)
continue;
sc->sc_mem = lebuf->sc_buffer;
sc->sc_memsize = lebuf->sc_bufsiz;
sc->sc_addr = 0; /* Lance view is offset by buffer location */
lebuf->attached = 1;
/* That old black magic... */
sc->sc_conf3 = getpropint(ca->ca_ra.ra_node,
sc->sc_conf3 = getpropint(sa->sa_node,
"busmaster-regval",
LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON);
} else
#endif
{
u_long laddr;
laddr = (u_long)dvma_malloc(MEMSIZE, &sc->sc_mem, M_NOWAIT);
#if defined (SUN4M)
if ((laddr & 0xffffff) >= (laddr & 0xffffff) + MEMSIZE)
panic("if_le: Lance buffer crosses 16MB boundary");
#endif
sc->sc_addr = laddr & 0xffffff;
sc->sc_memsize = MEMSIZE;
sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON;
#if defined(SUN4C) || defined(SUN4M)
if (dmachild) {
break;
}
lesc->sc_sd.sd_reset = (void *)am7990_reset;
sbus_establish(&lesc->sc_sd, &sc->sc_dev);
if (sa->sa_bp != NULL && strcmp(sa->sa_bp->name, le_cd.cd_name) == 0 &&
SAME_LANCE(sa->sa_bp, sa))
sa->sa_bp->dev = &sc->sc_dev;
leattach(lesc, sa->sa_pri);
}
void
leattach_ledma(parent, self, aux)
struct device *parent, *self;
void *aux;
{
#if defined(SUN4M)
struct sbus_attach_args *sa = aux;
struct le_softc *lesc = (struct le_softc *)self;
struct am7990_softc *sc = &lesc->sc_am7990;
bus_space_handle_t bh;
bus_dma_segment_t seg;
int rseg, error;
/* Establish link to `ledma' device */
lesc->sc_dma = (struct dma_softc *)parent;
lesc->sc_dma->sc_le = lesc;
lesc->sc_laddr = laddr;
lesc->sc_bustag = sa->sa_bustag;
lesc->sc_dmatag = sa->sa_dmatag;
/* Map device registers */
if (bus_space_map2(sa->sa_bustag,
sa->sa_slot,
sa->sa_offset,
sizeof(struct lereg1),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s @ ledma: cannot map registers\n", self->dv_xname);
return;
}
lesc->sc_r1 = (struct lereg1 *)bh;
/* Allocate buffer memory */
sc->sc_memsize = MEMSIZE;
error = bus_dmamem_alloc(lesc->sc_dmatag, MEMSIZE, NBPG, 0,
&seg, 1, &rseg, BUS_DMA_NOWAIT);
if (error) {
printf("leattach_ledma: DMA buffer alloc error %d\n", error);
return;
}
error = bus_dmamem_map(lesc->sc_dmatag, &seg, rseg, MEMSIZE,
(caddr_t *)&sc->sc_mem,
BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
if (error) {
printf("%s @ ledma: DMA buffer map error %d\n",
self->dv_xname, error);
return;
}
#if defined (SUN4M)
if ((seg.ds_addr & 0xffffff) >=
(seg.ds_addr & 0xffffff) + MEMSIZE)
panic("leattach_ledma: Lance buffer crosses 16MB boundary");
#endif
}
sc->sc_addr = seg.ds_addr & 0xffffff;
sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON;
bp = ca->ca_ra.ra_bp;
switch (ca->ca_bustype) {
#if defined(SUN4C) || defined(SUN4M)
#define SAME_LANCE(bp, ca) \
((bp->val[0] == ca->ca_slot && bp->val[1] == ca->ca_offset) || \
(bp->val[0] == -1 && bp->val[1] == sc->sc_dev.dv_unit))
lesc->sc_laddr = seg.ds_addr;
case BUS_SBUS:
lesc->sc_sd.sd_reset = (void *)am7990_reset;
if (sbuschild) {
sbus_establish(&lesc->sc_sd, &sc->sc_dev);
} else {
/* Assume SBus is grandparent */
lesc->sc_sd.sd_reset = (void *)am7990_reset;
sbus_establish(&lesc->sc_sd, parent);
if (sa->sa_bp != NULL && strcmp(sa->sa_bp->name, le_cd.cd_name) == 0 &&
SAME_LANCE(sa->sa_bp, sa))
sa->sa_bp->dev = &sc->sc_dev;
sc->sc_mediachange = lemediachange;
sc->sc_mediastatus = lemediastatus;
sc->sc_supmedia = lemediasun4m;
sc->sc_nsupmedia = NLEMEDIASUN4M;
sc->sc_defaultmedia = IFM_ETHER|IFM_AUTO;
leattach(lesc, sa->sa_pri);
#endif
}
void
leattach_lebuffer(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct sbus_attach_args *sa = aux;
struct le_softc *lesc = (struct le_softc *)self;
struct am7990_softc *sc = &lesc->sc_am7990;
struct lebuf_softc *lebuf = (struct lebuf_softc *)parent;
bus_space_handle_t bh;
lesc->sc_bustag = sa->sa_bustag;
lesc->sc_dmatag = sa->sa_dmatag;
if (bus_space_map2(sa->sa_bustag,
sa->sa_slot,
sa->sa_offset,
sizeof(struct lereg1),
BUS_SPACE_MAP_LINEAR,
0, &bh)) {
printf("%s @ lebuffer: cannot map registers\n", self->dv_xname);
return;
}
lesc->sc_r1 = (struct lereg1 *)bh;
sc->sc_mem = lebuf->sc_buffer;
sc->sc_memsize = lebuf->sc_bufsiz;
sc->sc_addr = 0; /* Lance view is offset by buffer location */
lebuf->attached = 1;
/* That old black magic... */
sc->sc_conf3 = getpropint(sa->sa_node, "busmaster-regval",
LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON);
/* Assume SBus is grandparent */
lesc->sc_sd.sd_reset = (void *)am7990_reset;
sbus_establish(&lesc->sc_sd, parent);
if (sa->sa_bp != NULL && strcmp(sa->sa_bp->name, le_cd.cd_name) == 0 &&
SAME_LANCE(sa->sa_bp, sa))
sa->sa_bp->dev = &sc->sc_dev;
leattach(lesc, sa->sa_pri);
}
void
leattach_obio(parent, self, aux)
struct device *parent, *self;
void *aux;
{
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba = &uoba->uoba_oba4;
struct le_softc *lesc = (struct le_softc *)self;
struct am7990_softc *sc = &lesc->sc_am7990;
bus_space_handle_t bh;
lesc->sc_bustag = oba->oba_bustag;
lesc->sc_dmatag = oba->oba_dmatag;
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
0, sizeof(struct lereg1),
0, 0,
&bh) != 0) {
printf("leattach_obio: cannot map registers\n");
return;
}
lesc->sc_r1 = (struct lereg1 *)bh;
if (oba->oba_bp != NULL &&
strcmp(oba->oba_bp->name, le_cd.cd_name) == 0 &&
sc->sc_dev.dv_unit == oba->oba_bp->val[1])
oba->oba_bp->dev = &sc->sc_dev;
/* Install interrupt */
leattach(lesc, oba->oba_pri);
}
void
leattach(lesc, pri)
struct le_softc *lesc;
int pri;
{
struct am7990_softc *sc = &lesc->sc_am7990;
/* XXX the following declarations should be elsewhere */
extern void myetheraddr __P((u_char *));
if (sc->sc_mem == 0) {
#if 0
bus_dma_segment_t seg;
int rseg, error;
error = bus_dmamem_alloc(lesc->sc_dmat, MEMSIZE, NBPG, 0,
&seg, 1, &rseg, BUS_DMA_NOWAIT);
if (error) {
printf("if_le: DMA buffer alloc error %d\n", error);
return;
}
error = bus_dmamem_map(lesc->sc_dmat, &seg, rseg, MEMSIZE,
(caddr_t *)&sc->sc_mem,
BUS_DMA_NOWAIT|BUS_DMAMEM_NOSYNC);
if (error) {
printf("if_le: DMA buffer map error %d\n", error);
return;
}
if (bp != NULL && strcmp(bp->name, le_cd.cd_name) == 0 &&
SAME_LANCE(bp, ca))
bp->dev = &sc->sc_dev;
break;
#endif /* SUN4C || SUN4M */
sc->sc_addr = seg.ds_addr & 0xffffff;
default:
if (bp != NULL && strcmp(bp->name, le_cd.cd_name) == 0 &&
sc->sc_dev.dv_unit == bp->val[1])
bp->dev = &sc->sc_dev;
break;
#else
u_long laddr;
laddr = (u_long)dvma_malloc(MEMSIZE, &sc->sc_mem, M_NOWAIT);
sc->sc_addr = laddr & 0xffffff;
#endif/*0*/
#if defined (SUN4M)
if ((sc->sc_addr & 0xffffff) >=
(sc->sc_addr & 0xffffff) + MEMSIZE)
panic("if_le: Lance buffer crosses 16MB boundary");
#endif
sc->sc_memsize = MEMSIZE;
sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON;
}
myetheraddr(sc->sc_enaddr);
@ -510,25 +697,9 @@ leattach(parent, self, aux)
sc->sc_nocarrier = lenocarrier;
sc->sc_hwreset = lehwreset;
#if defined(SUN4M)
if (CPU_ISSUN4M && lesc->sc_dma) {
sc->sc_mediachange = lemediachange;
sc->sc_mediastatus = lemediastatus;
sc->sc_supmedia = lemediasun4m;
sc->sc_nsupmedia = NLEMEDIASUN4M;
sc->sc_defaultmedia = IFM_ETHER|IFM_AUTO;
}
#endif
am7990_config(sc);
lesc->sc_ih.ih_fun = am7990_intr;
#if defined(SUN4M) /*XXX*/
if (CPU_ISSUN4M && lesc->sc_dma)
lesc->sc_ih.ih_fun = myleintr;
#endif
lesc->sc_ih.ih_arg = sc;
intr_establish(pri, &lesc->sc_ih);
(void)bus_intr_establish(lesc->sc_bustag, pri, 0, am7990_intr, sc);
/* now initialize DMA */
lehwreset(sc);

58
sys/arch/sparc/dev/isp_sbus.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: isp_sbus.c,v 1.8 1997/08/27 11:24:19 bouyer Exp $ */
/* $NetBSD: isp_sbus.c,v 1.9 1998/03/21 20:14:14 pk Exp $ */
/*
* SBus specific probe and attach routines for Qlogic ISP SCSI adapters.
@ -82,7 +82,7 @@ static struct ispmdvec mdvec = {
struct isp_sbussoftc {
struct ispsoftc sbus_isp;
sdparam sbus_dev;
struct intrhand sbus_ih;
bus_space_tag_t sbus_bustag;
volatile u_char *sbus_reg;
int sbus_node;
int sbus_pri;
@ -102,18 +102,11 @@ isp_match(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
struct confargs *ca = aux;
register struct romaux *ra = &ca->ca_ra;
struct sbus_attach_args *sa = aux;
if (strcmp(cf->cf_driver->cd_name, ra->ra_name) &&
strcmp("SUNW,isp", ra->ra_name) &&
strcmp("QLGC,isp", ra->ra_name)) {
return (0);
}
if (ca->ca_bustype == BUS_SBUS)
return (1);
ra->ra_len = NBPG;
return (probeget(ra->ra_vaddr, 1) != -1);
return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0 ||
strcmp("SUNW,isp", sa->sa_name) == 0 ||
strcmp("QLGC,isp", sa->sa_name) == 0);
}
static void
@ -121,24 +114,29 @@ isp_sbus_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct confargs *ca = aux;
struct sbus_attach_args *sa = aux;
struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) self;
if (ca->ca_ra.ra_nintr != 1) {
printf(": expected 1 interrupt, got %d\n", ca->ca_ra.ra_nintr);
sbc->sbus_bustag = sa->sa_bustag;
sbc->sbus_pri = sa->sa_pri;
#if 0
printf(" pri %d\n", sbc->sbus_pri);
#endif
if (sa->sa_promvaddr) {
sbc->sbus_reg = (volatile u_char *) sa->sa_promvaddr;
} else {
bus_space_handle_t bh;
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset,
sa->sa_size,
0, 0, &bh) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
sbc->sbus_pri = ca->ca_ra.ra_intr[0].int_pri;
printf(" pri %d\n", sbc->sbus_pri);
if (ca->ca_ra.ra_vaddr) {
sbc->sbus_reg = (volatile u_char *) ca->ca_ra.ra_vaddr;
} else {
sbc->sbus_reg = (volatile u_char *)
mapiodev(ca->ca_ra.ra_reg, 0, ca->ca_ra.ra_len);
sbc->sbus_reg = (volatile u_char *)bh;
}
sbc->sbus_node = ca->ca_ra.ra_node;
sbc->sbus_node = sa->sa_node;
sbc->sbus_isp.isp_mdvec = &mdvec;
sbc->sbus_isp.isp_type = ISP_HA_SCSI_UNKNOWN;
@ -153,9 +151,11 @@ isp_sbus_attach(parent, self, aux)
isp_uninit(&sbc->sbus_isp);
return;
}
sbc->sbus_ih.ih_fun = (void *) isp_intr;
sbc->sbus_ih.ih_arg = sbc;
intr_establish(sbc->sbus_pri, &sbc->sbus_ih);
/* Establish interrupt channel */
bus_intr_establish(sbc->sbus_bustag,
sbc->sbus_pri, 0,
(int(*)__P((void*)))isp_intr, sbc);
/*
* Do Generic attach now.

28
sys/arch/sparc/dev/power.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: power.c,v 1.8 1998/01/12 20:23:55 thorpej Exp $ */
/* $NetBSD: power.c,v 1.9 1998/03/21 20:14:14 pk Exp $ */
/*
* Copyright (c) 1996
@ -69,12 +69,13 @@ powermatch(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
register struct confargs *ca = aux;
if (CPU_ISSUN4M)
return (strcmp("power", ca->ca_ra.ra_name) == 0);
union obio_attach_args *uoba = aux;
struct sbus_attach_args *sa = &uoba->uoba_sbus;
if (uoba->uoba_isobio4 != 0)
return (0);
return (strcmp("power", sa->sa_name) == 0);
}
/* ARGSUSED */
@ -83,10 +84,21 @@ powerattach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct confargs *ca = aux;
struct romaux *ra = &ca->ca_ra;
union obio_attach_args *uoba = aux;
struct sbus_attach_args *sa = &uoba->uoba_sbus;
bus_space_handle_t bh;
power_reg = mapiodev(ra->ra_reg, 0, sizeof(long));
/* Map the power configuration register. */
if (sbus_bus_map(sa->sa_bustag,
sa->sa_slot,
sa->sa_offset,
sizeof(u_int8_t),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map register\n", self->dv_xname);
return;
}
power_reg = (volatile u_int8_t *)bh;
printf("\n");
}

6
sys/arch/sparc/dev/power.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: power.h,v 1.3 1996/06/07 21:48:36 thorpej Exp $ */
/* $NetBSD: power.h,v 1.4 1998/03/21 20:14:14 pk Exp $ */
/*
* Copyright (c) 1996
@ -46,12 +46,12 @@
#define POWER_OFF 0x1 /* remove power */
#define POWER_REG ((volatile u_char *)(power_reg))
#define POWER_REG ((volatile u_int8_t *)(power_reg))
#define POWER_BITS "\20\1POWEROFF"
#ifndef _LOCORE
volatile u_char *power_reg;
volatile u_int8_t *power_reg;
#endif
void powerdown __P((void)); /* power off function */

67
sys/arch/sparc/dev/si.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: si.c,v 1.44 1998/02/06 00:24:37 pk Exp $ */
/* $NetBSD: si.c,v 1.45 1998/03/21 20:14:14 pk Exp $ */
/*-
* Copyright (c) 1996 The NetBSD Foundation, Inc.
@ -175,6 +175,8 @@ struct si_softc {
volatile struct si_regs *sc_regs;
struct intrhand sc_ih;
int sc_adapter_type;
#define BOARD_ID_SI 0
#define BOARD_ID_SW 1
int sc_adapter_iv_am; /* int. vec + address modifier */
struct si_dma_handle *sc_dma;
int sc_xlen; /* length of current DMA segment. */
@ -270,23 +272,22 @@ sw_match(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
struct confargs *ca = aux;
struct romaux *ra = &ca->ca_ra;
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba;
/* Nothing but a Sun 4/100 is going to have these devices. */
if (cpuinfo.cpu_type != CPUTYP_4_100)
return (0);
/*
* Default interrupt priority always is 3. At least, that's
* what my board seems to be at. --thorpej
*/
if (ra->ra_intr[0].int_pri == -1)
ra->ra_intr[0].int_pri = 3;
if (uoba->uoba_isobio4 == 0)
return (0);
/* Make sure there is something there... */
return (probeget(ra->ra_vaddr + 1, 1) != -1);
oba = &uoba->uoba_oba4;
return (obio_bus_probe(oba->oba_bustag, oba->oba_paddr,
1, /* offset */
1, /* probe size */
NULL, NULL));
}
static int
@ -346,6 +347,7 @@ si_attach(parent, self, aux)
sc->sc_options = si_options;
reset_adapter = si_reset_adapter;
sc->sc_adapter_type = BOARD_ID_SI;
ncr_sc->sc_dma_setup = si_vme_dma_setup;
ncr_sc->sc_dma_start = si_vme_dma_start;
@ -379,16 +381,24 @@ sw_attach(parent, self, aux)
{
struct si_softc *sc = (struct si_softc *) self;
struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)sc;
struct confargs *ca = aux;
struct romaux *ra = &ca->ca_ra;
union obio_attach_args *uoba = aux;
struct obio4_attach_args *oba = &uoba->uoba_oba4;
bus_space_handle_t bh;
struct bootpath *bp;
/* Map the controller registers. */
sc->sc_regs = (struct si_regs *)
mapiodev(ra->ra_reg, 0, sizeof(struct si_regs));
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
0,
sizeof(struct si_regs),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
sc->sc_regs = (struct si_regs *)bh;
sc->sc_options = sw_options;
sc->sc_adapter_type = ca->ca_bustype;
sc->sc_adapter_type = BOARD_ID_SW;
reset_adapter = sw_reset_adapter;
ncr_sc->sc_dma_setup = si_obio_dma_setup;
@ -398,20 +408,27 @@ sw_attach(parent, self, aux)
ncr_sc->sc_intr_on = si_obio_intr_on;
ncr_sc->sc_intr_off = si_obio_intr_off;
/* Establish the interrupt. */
sc->sc_ih.ih_fun = si_intr;
sc->sc_ih.ih_arg = sc;
intr_establish(ra->ra_intr[0].int_pri, &sc->sc_ih);
/*
* Establish interrupt channel.
* Default interrupt priority always is 3. At least, that's
* what my board seems to be at. --thorpej
*/
if (oba->oba_pri == -1)
oba->oba_pri = 3;
printf(" pri %d\n", ra->ra_intr[0].int_pri);
(void)bus_intr_establish(oba->oba_bustag,
oba->oba_pri, 0,
si_intr, sc);
printf(" pri %d\n", oba->oba_pri);
/*
* If the boot path is "sw" or "si" at the moment and it's me, then
* walk out pointer to the sub-device, ready for the config
* below.
*/
bp = ra->ra_bp;
if (bp != NULL && strcmp(bp->name, ra->ra_name) == 0 &&
bp = oba->oba_bp;
if (bp != NULL && strcmp(bp->name, "sw") == 0 &&
bp->val[0] == -1 && bp->val[1] == ncr_sc->sc_dev.dv_unit)
bootpath_store(1, bp + 1);
@ -540,7 +557,7 @@ si_intr(void *arg)
dma_error = 0;
/* SBC interrupt? DMA interrupt? */
if (sc->sc_adapter_type == BUS_OBIO)
if (sc->sc_adapter_type == BOARD_ID_SW)
csr = si->sw_csr;
else
csr = si->si_csr;
@ -775,7 +792,7 @@ si_dma_poll(ncr_sc)
tmo = 50000; /* X100 = 5 sec. */
for (;;) {
if (sc->sc_adapter_type == BUS_OBIO)
if (sc->sc_adapter_type == BOARD_ID_SW)
csr = si->sw_csr;
else
csr = si->si_csr;

137
sys/arch/sparc/dev/tcx.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: tcx.c,v 1.10 1998/01/12 20:23:57 thorpej Exp $ */
/* $NetBSD: tcx.c,v 1.11 1998/03/21 20:14:14 pk Exp $ */
/*
* Copyright (c) 1996 The NetBSD Foundation, Inc.
@ -94,10 +94,11 @@ struct tcx_softc {
struct device sc_dev; /* base device */
struct sbusdev sc_sd; /* sbus device */
struct fbdevice sc_fb; /* frame buffer device */
bus_space_tag_t sc_bustag;
struct rom_reg sc_physadr[TCX_NREG]; /* phys addr of h/w */
int sc_bustype; /* type of bus we live on */
volatile struct bt_regs *sc_bt; /* Brooktree registers */
volatile struct tcx_thc *sc_thc; /* THC registers */
volatile struct tcx_thc *sc_thc;/* THC registers */
short sc_blanked; /* true if blanked */
union bt_cmap sc_cmap; /* Brooktree color map */
};
@ -136,21 +137,9 @@ tcxmatch(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
struct confargs *ca = aux;
struct romaux *ra = &ca->ca_ra;
struct sbus_attach_args *sa = aux;
if (strcmp(ra->ra_name, OBPNAME))
return (0);
/*
* Mask out invalid flags from the user.
*/
cf->cf_flags &= FB_USERMASK;
if (ca->ca_bustype == BUS_SBUS)
return (1);
return (0);
return (strcmp(sa->sa_name, OBPNAME) == 0);
}
/*
@ -161,17 +150,38 @@ tcxattach(parent, self, args)
struct device *parent, *self;
void *args;
{
register struct tcx_softc *sc = (struct tcx_softc *)self;
register struct confargs *ca = args;
register int node = 0, ramsize, i;
register volatile struct bt_regs *bt;
struct tcx_softc *sc = (struct tcx_softc *)self;
struct sbus_attach_args *sa = args;
int node, ramsize, i;
volatile struct bt_regs *bt;
struct fbdevice *fb = &sc->sc_fb;
int isconsole = 0, sbus = 1;
bus_space_handle_t bh;
int nreg;
int isconsole;
void *p;
extern struct tty *fbconstty;
sc->sc_bustag = sa->sa_bustag;
node = sa->sa_node;
fb->fb_driver = &tcx_fbdriver;
fb->fb_device = &sc->sc_dev;
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags;
/* Mask out invalid flags from the user. */
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags & FB_USERMASK;
fb->fb_type.fb_depth = node_has_property(node, "tcx-24-bit")
? 24
: (node_has_property(node, "tcx-8-bit")
? 8
: 8);
fb_setsize_obp(fb, fb->fb_type.fb_depth, 1152, 900, node);
ramsize = fb->fb_type.fb_height * fb->fb_linebytes;
fb->fb_type.fb_cmsize = 256;
fb->fb_type.fb_size = ramsize;
printf(": %s, %d x %d", OBPNAME,
fb->fb_type.fb_width,
fb->fb_type.fb_height);
/*
* XXX - should be set to FBTYPE_TCX.
@ -180,48 +190,45 @@ tcxattach(parent, self, args)
*/
fb->fb_type.fb_type = FBTYPE_RESERVED3;
if (ca->ca_ra.ra_nreg != TCX_NREG)
panic("tcx: oops");
/* Copy register address spaces */
for (i = 0; i < TCX_NREG; i++)
sc->sc_physadr[i] = ca->ca_ra.ra_reg[i];
/* Get device registers */
p = sc->sc_physadr;
if (getpropA(node, "reg", sizeof(struct rom_reg), &nreg, &p) != 0) {
printf("%s: cannot get register property\n", self->dv_xname);
return;
}
if (nreg != TCX_NREG) {
printf("%s: only %d register sets\n", self->dv_xname, nreg);
return;
}
/* XXX - fix THC and TEC offsets */
sc->sc_physadr[TCX_REG_TEC].rr_paddr += 0x1000;
sc->sc_physadr[TCX_REG_THC].rr_paddr += 0x1000;
sc->sc_bt = bt = (volatile struct bt_regs *)
mapiodev(&ca->ca_ra.ra_reg[TCX_REG_CMAP], 0, sizeof *sc->sc_bt);
sc->sc_thc = (volatile struct tcx_thc *)
mapiodev(&ca->ca_ra.ra_reg[TCX_REG_THC], 0, sizeof *sc->sc_thc);
switch (ca->ca_bustype) {
case BUS_SBUS:
node = ca->ca_ra.ra_node;
break;
case BUS_OBIO:
default:
printf("TCX on bus 0x%x?\n", ca->ca_bustype);
/* Map the register banks we care about */
if (sbus_bus_map(sa->sa_bustag,
(bus_type_t)sc->sc_physadr[TCX_REG_THC].rr_iospace,
(bus_addr_t)sc->sc_physadr[TCX_REG_THC].rr_paddr,
sizeof (struct tcx_thc),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("tcxattach: cannot map thc registers\n");
return;
}
sc->sc_thc = (volatile struct tcx_thc *)bh;
fb->fb_type.fb_depth = node_has_property(node, "tcx-24-bit")
? 24
: (node_has_property(node, "tcx-8-bit")
? 8
: 8);
if (sbus_bus_map(sa->sa_bustag,
(bus_type_t)sc->sc_physadr[TCX_REG_CMAP].rr_iospace,
(bus_addr_t)sc->sc_physadr[TCX_REG_CMAP].rr_paddr,
sizeof (struct bt_regs),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("tcxattach: cannot map bt registers\n");
return;
}
sc->sc_bt = bt = (volatile struct bt_regs *)bh;
fb_setsize(fb, fb->fb_type.fb_depth, 1152, 900,
node, ca->ca_bustype);
ramsize = fb->fb_type.fb_height * fb->fb_linebytes;
fb->fb_type.fb_cmsize = 256;
fb->fb_type.fb_size = ramsize;
printf(": %s, %d x %d", OBPNAME,
fb->fb_type.fb_width,
fb->fb_type.fb_height);
isconsole = node == fbnode && fbconstty != NULL;
@ -247,7 +254,6 @@ tcxattach(parent, self, args)
} else
printf("\n");
if (sbus)
sbus_establish(&sc->sc_sd, &sc->sc_dev);
if (node == fbnode)
fb_attach(&sc->sc_fb, isconsole);
@ -452,9 +458,10 @@ tcxmmap(dev, off, prot)
dev_t dev;
int off, prot;
{
register struct tcx_softc *sc = tcx_cd.cd_devs[minor(dev)];
register struct mmo *mo;
register u_int u, sz;
struct tcx_softc *sc = tcx_cd.cd_devs[minor(dev)];
struct rom_reg *rr = sc->sc_physadr;
struct mmo *mo;
u_int u, sz;
static struct mmo mmo[] = {
{ TCX_USER_RAM, 0, TCX_REG_DFB8 },
{ TCX_USER_RAM24, 0, TCX_REG_DFB24 },
@ -489,9 +496,15 @@ tcxmmap(dev, off, prot)
continue;
u = off - mo->mo_uaddr;
sz = mo->mo_size ? mo->mo_size : sc->sc_fb.fb_type.fb_size;
if (u < sz)
return (REG2PHYS(&sc->sc_physadr[mo->mo_bank], u) |
PMAP_NC);
if (u < sz) {
bus_type_t t = (bus_type_t)rr[mo->mo_bank].rr_iospace;
bus_addr_t a = (bus_addr_t)rr[mo->mo_bank].rr_paddr;
return (bus_space_mmap (sc->sc_bustag,
t,
a + u,
BUS_SPACE_MAP_LINEAR));
}
}
#ifdef DEBUG
{

123
sys/dev/ic/am7930.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: am7930.c,v 1.35 1998/01/12 20:23:40 thorpej Exp $ */
/* $NetBSD: am7930.c,v 1.36 1998/03/21 20:14:13 pk Exp $ */
/*
* Copyright (c) 1995 Rolf Grossmann
@ -40,6 +40,7 @@
#include <sys/device.h>
#include <sys/proc.h>
#include <machine/bus.h>
#include <machine/autoconf.h>
#include <machine/cpu.h>
@ -65,7 +66,8 @@ int amd7930debug = 0;
*/
struct amd7930_softc {
struct device sc_dev; /* base device */
struct intrhand sc_hwih; /* hardware interrupt vector */
bus_space_tag_t sc_bustag;
/*struct intrhand sc_hwih; -* hardware interrupt vector */
struct intrhand sc_swih; /* software interrupt vector */
int sc_open; /* single use device */
@ -111,11 +113,19 @@ void audio_setmap __P((volatile struct amd7930 *, struct mapreg *));
static void init_amd __P((volatile struct amd7930 *));
/* autoconfiguration driver */
void amd7930attach __P((struct device *, struct device *, void *));
int amd7930match __P((struct device *, struct cfdata *, void *));
void amd7930attach_mainbus __P((struct device *, struct device *, void *));
int amd7930match_mainbus __P((struct device *, struct cfdata *, void *));
void amd7930attach_sbus __P((struct device *, struct device *, void *));
int amd7930match_sbus __P((struct device *, struct cfdata *, void *));
struct cfattach audioamd_ca = {
sizeof(struct amd7930_softc), amd7930match, amd7930attach
void amd7930attach __P((struct amd7930_softc *, int));
struct cfattach audioamd_mainbus_ca = {
sizeof(struct amd7930_softc), amd7930match_mainbus, amd7930attach_mainbus
};
struct cfattach audioamd_sbus_ca = {
sizeof(struct amd7930_softc), amd7930match_sbus, amd7930attach_sbus
};
struct audio_device amd7930_device = {
@ -250,64 +260,113 @@ struct audio_hw_if sa_hw_if = {
/* autoconfig routines */
int
amd7930match(parent, cf, aux)
amd7930match_mainbus(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
register struct confargs *ca = aux;
register struct romaux *ra = &ca->ca_ra;
struct mainbus_attach_args *ma = aux;
if (CPU_ISSUN4)
return (0);
return (strcmp(AUDIO_ROM_NAME, ra->ra_name) == 0);
return (strcmp(AUDIO_ROM_NAME, ma->ma_name) == 0);
}
int
amd7930match_sbus(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct sbus_attach_args *sa = aux;
return (strcmp(AUDIO_ROM_NAME, sa->sa_name) == 0);
}
/*
* Audio chip found.
*/
void
amd7930attach(parent, self, args)
amd7930attach_mainbus(parent, self, aux)
struct device *parent, *self;
void *args;
void *aux;
{
register struct amd7930_softc *sc = (struct amd7930_softc *)self;
register struct confargs *ca = args;
register struct romaux *ra = &ca->ca_ra;
register volatile struct amd7930 *amd;
register int pri;
struct mainbus_attach_args *ma = aux;
struct amd7930_softc *sc = (struct amd7930_softc *)self;
bus_space_handle_t bh;
if (ra->ra_nintr != 1) {
printf(": expected 1 interrupt, got %d\n", ra->ra_nintr);
sc->sc_bustag = ma->ma_bustag;
if (sparc_bus_map(
ma->ma_bustag,
ma->ma_iospace,
(bus_addr_t)ma->ma_paddr,
sizeof(struct amd7930),
BUS_SPACE_MAP_LINEAR,
0,
&bh) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
pri = ra->ra_intr[0].int_pri;
printf(" pri %d, softpri %d\n", pri, PIL_AUSOFT);
amd = (volatile struct amd7930 *)(ra->ra_vaddr ?
ra->ra_vaddr : mapiodev(ra->ra_reg, 0, sizeof (*amd)));
sc->sc_au.au_amd = (volatile struct amd7930 *)bh;
amd7930attach(sc, ma->ma_pri);
}
void
amd7930attach_sbus(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct sbus_attach_args *sa = aux;
struct amd7930_softc *sc = (struct amd7930_softc *)self;
bus_space_handle_t bh;
sc->sc_bustag = sa->sa_bustag;
if (sbus_bus_map(
sa->sa_bustag,
sa->sa_slot,
sa->sa_offset,
sizeof(struct amd7930),
0, 0,
&bh) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
sc->sc_au.au_amd = (volatile struct amd7930 *)bh;
amd7930attach(sc, sa->sa_pri);
}
void
amd7930attach(sc, pri)
struct amd7930_softc *sc;
int pri;
{
printf(" softpri %d\n", PIL_AUSOFT);
sc->sc_map.mr_mmr1 = AMD_MMR1_GX | AMD_MMR1_GER |
AMD_MMR1_GR | AMD_MMR1_STG;
sc->sc_au.au_amd = amd;
/* set boot defaults */
sc->sc_rlevel = 128;
sc->sc_plevel = 128;
sc->sc_mlevel = 0;
sc->sc_out_port = SUNAUDIO_SPEAKER;
init_amd(amd);
init_amd(sc->sc_au.au_amd);
#ifndef AUDIO_C_HANDLER
auiop = &sc->sc_au;
intr_fasttrap(pri, amd7930_trap);
(void)bus_intr_establish(sc->sc_bustag, pri,
BUS_INTR_ESTABLISH_FASTTRAP,
(int (*) __P((void *)))amd7930_trap, NULL);
#else
sc->sc_hwih.ih_fun = amd7930hwintr;
sc->sc_hwih.ih_arg = &sc->sc_au;
intr_establish(pri, &sc->sc_hwih);
(void)bus_intr_establish(sc->sc_bustag, pri, 0,
amd7930hwintr, &sc->sc_au);
#endif
sc->sc_swih.ih_fun = amd7930swintr;
sc->sc_swih.ih_arg = sc;
intr_establish(PIL_AUSOFT, &sc->sc_swih);
(void)bus_intr_establish(sc->sc_bustag, PIL_AUSOFT,
BUS_INTR_ESTABLISH_SOFTINTR,
amd7930swintr, sc);
evcnt_attach(&sc->sc_dev, "intr", &sc->sc_intrcnt);

82
sys/dev/sbus/if_en.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_en.c,v 1.4 1997/05/24 20:16:22 pk Exp $ */
/* $NetBSD: if_en.c,v 1.5 1998/03/21 20:14:14 pk Exp $ */
/*
*
@ -70,7 +70,6 @@ struct en_sbus_softc {
/* sbus glue */
struct sbusdev sc_sd; /* sbus device */
struct intrhand sc_ih; /* interrupt vectoring */
};
/*
@ -100,72 +99,61 @@ struct cfattach en_sbus_ca = {
* autoconfig stuff
*/
static int en_sbus_match(parent, match, aux)
struct device *parent;
void *match;
void *aux;
static int
en_sbus_match(parent, match, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct cfdata *cf = match;
struct confargs *ca = aux;
register struct romaux *ra = &ca->ca_ra;
struct sbus_attach_args *sa = aux;
if (strcmp("ENI-155s", ra->ra_name))
return 0;
if (ca->ca_bustype == BUS_SBUS)
return (1);
return 0;
if (CPU_ISSUN4M) {
#ifdef DEBUG
printf("%s: sun4m DMA not supported yet\n", sa->sa_name);
#endif
return (0);
}
return (strcmp("ENI-155s", sa->sa_name) == 0);
}
static void en_sbus_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
static void
en_sbus_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct sbus_attach_args *sa = aux;
struct en_softc *sc = (void *)self;
struct en_sbus_softc *scs = (void *)self;
struct confargs *ca = aux;
bus_space_handle_t bh;
struct intrhand *ih;
int lcv, iplcode;
printf("\n");
if (CPU_ISSUN4M) {
printf("%s: sun4m DMA not supported yet\n", sc->sc_dev.dv_xname);
if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
sa->sa_offset,
4*1024*1024,
0, 0, &bh) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
sc->en_base = (volatile caddr_t)bh;
sc->en_base = (caddr_t) mapiodev(ca->ca_ra.ra_reg, 0, 4*1024*1024);
/* Establish interrupt channel */
ih = bus_intr_establish(sa->sa_bustag,
sa->sa_pri, 0,
en_intr, sc);
if (ca->ca_ra.ra_nintr == 1) {
sc->ipl = ca->ca_ra.ra_intr[0].int_pri;
} else {
printf("%s: claims to be at the following IPLs: ", sc->sc_dev.dv_xname);
iplcode = 0;
for (lcv = 0 ; lcv < ca->ca_ra.ra_nintr ; lcv++) {
printf("%d ", ca->ca_ra.ra_intr[lcv].int_pri);
if (EN_IPL == ca->ca_ra.ra_intr[lcv].int_pri)
iplcode = lcv;
}
if (!iplcode) {
printf("%s: can't find the IPL we want (%d)\n", sc->sc_dev.dv_xname,
EN_IPL);
return;
}
printf("\n%s: we choose IPL %d\n", sc->sc_dev.dv_xname, EN_IPL);
sc->ipl = iplcode;
}
scs->sc_ih.ih_fun = en_intr;
scs->sc_ih.ih_arg = sc;
intr_establish(EN_IPL, &scs->sc_ih);
sc->ipl = ih->ih_pri; /* used to be this */
/*sc->ipl = sa->sa_pri; -* but this might more appropriate? */
sbus_establish(&scs->sc_sd, &sc->sc_dev);
/*
* done SBUS specific stuff
*/
en_attach(sc);
}