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This commit is contained in:
skrll 2020-12-28 12:38:44 +00:00
parent 6f82ec5c48
commit 69d710afc9
2 changed files with 8 additions and 8 deletions
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12
sys/dev/pci/pci_map.c
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@ -1,4 +1,4 @@
/* $NetBSD: pci_map.c,v 1.40 2020/05/05 16:58:11 bouyer Exp $ */
/* $NetBSD: pci_map.c,v 1.41 2020/12/28 12:38:44 skrll Exp $ */
/*-
* Copyright (c) 1998, 2000 The NetBSD Foundation, Inc.
@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pci_map.c,v 1.40 2020/05/05 16:58:11 bouyer Exp $");
__KERNEL_RCSID(0, "$NetBSD: pci_map.c,v 1.41 2020/12/28 12:38:44 skrll Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -309,7 +309,7 @@ pci_mapreg_map(const struct pci_attach_args *pa, int reg, pcireg_t type,
int busflags, bus_space_tag_t *tagp, bus_space_handle_t *handlep,
bus_addr_t *basep, bus_size_t *sizep)
{
return pci_mapreg_submap(pa, reg, type, busflags, 0, 0, tagp,
return pci_mapreg_submap(pa, reg, type, busflags, 0, 0, tagp,
handlep, basep, sizep);
}
@ -351,7 +351,7 @@ pci_mapreg_submap(const struct pci_attach_args *pa, int reg, pcireg_t type,
splx(s);
}
/* If we're called with maxsize/offset of 0, behave like
/* If we're called with maxsize/offset of 0, behave like
* pci_mapreg_map.
*/
@ -415,7 +415,7 @@ pci_find_rom(const struct pci_attach_args *pa, bus_space_tag_t bst,
return 1;
ptr = offset + hdr.romh_data_ptr;
if (ptr > sz) {
printf("pci_find_rom: rom data ptr out of range\n");
return 1;
@ -456,7 +456,7 @@ pci_find_rom(const struct pci_attach_args *pa, bus_space_tag_t bst,
bus_space_subregion(bst, bsh, offset, imagesz, romh);
return 0;
}
/* last image check */
if (rom.rom_indicator & PCI_ROM_INDICATOR_LAST)
return 1;

4
sys/dev/pci/pcireg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: pcireg.h,v 1.151 2020/02/18 04:08:12 msaitoh Exp $ */
/* $NetBSD: pcireg.h,v 1.152 2020/12/28 12:38:44 skrll Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@ -2073,7 +2073,7 @@ struct pci_rom {
#define PCI_DPC_RPPIO_MEMUR_CPL __BIT(16) /* MemReq received UR Complt. */
#define PCI_DPC_RPPIO_MEMCA_CPL __BIT(17) /* MemReq received CA Complt. */
#define PCI_DPC_RPPIO_MEM_CTO __BIT(18) /* MemReq Completion Timeout */
#define PCI_DPC_RPPIO_MASK 0x10 /* RP PIO Mask Register */
/* Bits are the same as RP PIO Status Register */
#define PCI_DPC_RPPIO_SEVE 0x14 /* RP PIO Severity Register */