Make big-endian mode a little closer to working on the BRH. I can talk
to both the EEPROM *and* the PHY on the Ethernet interface now, at least, though it is still not completely working. Many thanks to Stephen Goadhouse at ADI for some hints.
This commit is contained in:
parent
b86c323d39
commit
6955d47610
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@ -1,4 +1,4 @@
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/* $NetBSD: becc.c,v 1.4 2003/05/23 05:21:26 briggs Exp $ */
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/* $NetBSD: becc.c,v 1.5 2003/05/30 18:38:02 thorpej Exp $ */
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/*
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* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
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@ -140,20 +140,16 @@ becc_attach(struct becc_softc *sc)
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}
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/*
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* Program the two outbound PCI memory windows. On a
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* big-endian system, we byte-swap the first window.
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* The second window is used for STREAM transfers.
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* Program the two outbound PCI memory windows.
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* NOTE: WE DO NOT BYTE-SWAP OUTBOUND WINDOWS IN BIG-ENDIAN
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* MODE. I know this seems counter-intuitive, but that's
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* how it is.
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*
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* There's a third window on v9 and later, but we don't
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* use it for anything; program it anyway, just to be
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* safe.
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*/
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#ifdef __ARMEB__
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BECC_CSR_WRITE(BECC_POMR1, sc->sc_owin_xlate[0] /* | POMRx_F32 */ |
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POMRx_BEE);
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#else
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BECC_CSR_WRITE(BECC_POMR1, sc->sc_owin_xlate[0] /* | POMRx_F32 */);
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#endif
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BECC_CSR_WRITE(BECC_POMR2, sc->sc_owin_xlate[1] /* | POMRx_F32 */);
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if (becc_rev >= BECC_REV_V9)
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@ -161,16 +157,11 @@ becc_attach(struct becc_softc *sc)
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sc->sc_owin_xlate[2] /* | POMRx_F32 */);
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/*
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* Program the PCI I/O window. On a big-endian system,
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* we do byte-swapping.
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* Program the PCI I/O window. See note above about byte-swapping.
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*
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* XXX What about STREAM transfers?
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*/
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#ifdef __ARMEB__
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BECC_CSR_WRITE(BECC_POIR, sc->sc_ioout_xlate | POIR_BEE);
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#else
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BECC_CSR_WRITE(BECC_POIR, sc->sc_ioout_xlate);
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#endif
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/*
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* Configure PCI configuration cycle access.
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@ -0,0 +1,100 @@
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/* $NetBSD: becc_pci_space_asm.S,v 1.1 2003/05/30 18:38:02 thorpej Exp $ */
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/*
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* Copyright (c) 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arm/asm.h>
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#include <arm/cpuconf.h>
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/*
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* Bus space functions for BECC PCI space access. We have to swizzle
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* the address for 1 and 2 byte accesses when in big-endian mode.
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*/
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/*
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* read single
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*/
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ENTRY(becc_pci_bs_r_1)
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#ifdef __ARMEB__
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add r1, r1, r2
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eor r1, r1, #0x3
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ldrb r0, [r1]
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#else
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ldrb r0, [r1, r2]
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#endif /* __ARMEB__ */
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mov pc, lr
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ENTRY(becc_pci_bs_r_2)
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#ifdef __ARMEB__
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add r1, r1, r2
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eor r1, r1, #0x2
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ldrh r0, [r1]
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#else
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ldrh r0, [r1, r2]
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#endif /* __ARMEB__ */
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mov pc, lr
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ENTRY(becc_pci_bs_r_4)
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ldr r0, [r1, r2]
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mov pc, lr
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/*
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* write single
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*/
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ENTRY(becc_pci_bs_w_1)
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#ifdef __ARMEB__
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add r1, r1, r2
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eor r1, r1, #0x3
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strb r3, [r1]
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#else
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strb r3, [r1, r2]
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#endif /* __ARMEB__ */
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mov pc, lr
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ENTRY(becc_pci_bs_w_2)
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#ifdef __ARMEB__
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add r1, r1, r2
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eor r1, r1, #0x2
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strh r3, [r1]
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#else
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strh r3, [r1, r2]
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#endif /* __ARMEB__ */
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mov pc, lr
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ENTRY(becc_pci_bs_w_4)
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str r3, [r1, r2]
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mov pc, lr
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@ -1,4 +1,4 @@
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/* $NetBSD: becc_space.c,v 1.1 2003/01/25 01:57:19 thorpej Exp $ */
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/* $NetBSD: becc_space.c,v 1.2 2003/05/30 18:38:02 thorpej Exp $ */
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/*
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* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
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bs_protos(becc);
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bs_protos(becc_io);
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bs_protos(becc_mem);
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bs_protos(generic);
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bs_protos(generic_armv4);
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bs_protos(becc_pci);
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bs_protos(bs_notimpl);
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/*
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becc_bs_barrier,
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/* read (single) */
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generic_bs_r_1,
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generic_armv4_bs_r_2,
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generic_bs_r_4,
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becc_pci_bs_r_1,
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becc_pci_bs_r_2,
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becc_pci_bs_r_4,
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bs_notimpl_bs_r_8,
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/* read multiple */
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generic_bs_rm_1,
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generic_armv4_bs_rm_2,
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generic_bs_rm_4,
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bs_notimpl_bs_rm_1,
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bs_notimpl_bs_rm_2,
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bs_notimpl_bs_rm_4,
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bs_notimpl_bs_rm_8,
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/* read region */
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bs_notimpl_bs_rr_1,
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generic_armv4_bs_rr_2,
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generic_bs_rr_4,
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bs_notimpl_bs_rr_2,
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bs_notimpl_bs_rr_4,
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bs_notimpl_bs_rr_8,
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/* write (single) */
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generic_bs_w_1,
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generic_armv4_bs_w_2,
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generic_bs_w_4,
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becc_pci_bs_w_1,
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becc_pci_bs_w_2,
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becc_pci_bs_w_4,
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bs_notimpl_bs_w_8,
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/* write multiple */
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generic_bs_wm_1,
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generic_armv4_bs_wm_2,
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generic_bs_wm_4,
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bs_notimpl_bs_wm_1,
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bs_notimpl_bs_wm_2,
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bs_notimpl_bs_wm_4,
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bs_notimpl_bs_wm_8,
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/* write region */
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bs_notimpl_bs_wr_1,
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generic_armv4_bs_wr_2,
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generic_bs_wr_4,
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bs_notimpl_bs_wr_2,
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bs_notimpl_bs_wr_4,
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bs_notimpl_bs_wr_8,
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/* set multiple */
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/* set region */
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bs_notimpl_bs_sr_1,
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generic_armv4_bs_sr_2,
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bs_notimpl_bs_sr_2,
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bs_notimpl_bs_sr_4,
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bs_notimpl_bs_sr_8,
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/* copy */
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bs_notimpl_bs_c_1,
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generic_armv4_bs_c_2,
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bs_notimpl_bs_c_2,
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bs_notimpl_bs_c_4,
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bs_notimpl_bs_c_8,
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};
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@ -1,4 +1,4 @@
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# $NetBSD: files.becc,v 1.2 2003/04/20 20:50:50 thorpej Exp $
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# $NetBSD: files.becc,v 1.3 2003/05/30 18:38:02 thorpej Exp $
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#
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# Configuration info for the ADI Engineering Big Endian Companion Chip
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# for the Intel i80200 processor
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file arch/arm/xscale/becc_icu.c
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file arch/arm/xscale/becc_timer.c
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device becc {}: pcibus, bus_space_generic
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device becc {}: pcibus
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# Board-specific front-end provides attachment.
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file arch/arm/xscale/becc.c becc
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file arch/arm/xscale/becc_pci.c becc
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file arch/arm/xscale/becc_pci_space_asm.S becc
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file arch/arm/xscale/becc_space.c becc
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# Reset button.
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Loading…
Reference in New Issue