diff --git a/sys/arch/i386/isa/if_ed.c b/sys/arch/i386/isa/if_ed.c index dcbadc377f49..61a3a75d1195 100644 --- a/sys/arch/i386/isa/if_ed.c +++ b/sys/arch/i386/isa/if_ed.c @@ -1,92 +1,24 @@ /* * Device driver for National Semiconductor DS8390/WD83C690 based ethernet - * adapters. By David Greenman, 29-April-1993 + * adapters. By David Greenman, 29-April-1993 * - * Copyright (C) 1993, David Greenman. This software may be used, modified, - * copied, distributed, and sold, in both source and binary form provided - * that the above copyright and these terms are retained. Under no - * circumstances is the author responsible for the proper functioning - * of this software, nor does the author assume any responsibility - * for damages incurred with its use. + * Copyright (C) 1993, David Greenman. This software may be used, modified, + * copied, distributed, and sold, in both source and binary form provided that + * the above copyright and these terms are retained. Under no circumstances is + * the author responsible for the proper functioning of this software, nor does + * the author assume any responsibility for damages incurred with its use. * - * Currently supports the Western Digital/SMC 8003 and 8013 series, - * the 3Com 3c503, the NE1000 and NE2000, and a variety of similar - * clones. + * Currently supports the Western Digital/SMC 8003 and 8013 series, the 3Com + * 3c503, the NE1000 and NE2000, and a variety of similar clones. * * Thanks to Charles Hannum for proving to me with example code that the - * NE1000/2000 support could be added with minimal impact. Without - * this, I wouldn't have proceeded in this direction. - * + * NE1000/2000 support could be added with minimal impact. Without this, I + * wouldn't have proceeded in this direction. + * + * $Id: if_ed.c,v 1.23 1994/02/12 07:16:24 mycroft Exp $ */ -/* - * $Id: if_ed.c,v 1.22 1994/02/10 17:17:56 mycroft Exp $ - */ - -/* - * Modification history - * - * Revision 2.11 1993/10/23 04:21:03 davidg - * Novell probe changed to be invasive because of too many complaints - * about some clone boards not being reset properly and thus not - * found on a warmboot. Yuck. - * - * Revision 2.10 1993/10/23 04:07:12 davidg - * increment output errors if the device times out (done via watchdog) - * - * Revision 2.9 1993/10/23 04:01:45 davidg - * increment input error counter if a packet with a bad length is - * detected. - * - * Revision 2.8 1993/10/15 10:59:56 davidg - * increase maximum time to wait for transmit DMA to complete to 120us. - * call ed_reset() if the time limit is reached instead of trying - * to abort the remote DMA. - * - * Revision 2.7 1993/10/15 10:49:10 davidg - * minor change to way the mbuf pointer temp variable is assigned in - * ed_start (slightly improves code readability) - * - * Revision 2.6 93/10/02 01:12:20 davidg - * use ETHER_ADDR_LEN in NE probe rather than '6'. - * - * Revision 2.5 93/09/30 17:44:14 davidg - * patch from vak@zebub.msk.su (Serge V.Vakulenko) to work around - * a hardware bug in cheap WD clone boards where the PROM checksum - * byte is always zero - * - * Revision 2.4 93/09/29 21:24:30 davidg - * Added software NIC reset in NE probe to work around a problem - * with some NE boards where the 8390 doesn't reset properly on - * power-up. Remove initialization of IMR/ISR in the NE probe - * because this is inherent in the reset. - * - * Revision 2.3 93/09/29 15:10:16 davidg - * credit Charles Hannum - * - * Revision 2.2 93/09/29 13:23:25 davidg - * added no multi-buffer override for 3c503 - * - * Revision 2.1 93/09/29 12:32:12 davidg - * changed multi-buffer count for 16bit 3c503's from 5 to 2 after - * noticing that the transmitter becomes idle because of so many - * packets to load. - * - * Revision 2.0 93/09/29 00:00:19 davidg - * many changes, rewrites, additions, etc. Now supports the - * NE1000, NE2000, WD8003, WD8013, 3C503, 16bit 3C503, and - * a variety of similar clones. 16bit 3c503 now does multi - * transmit buffers. Nearly every part of the driver has - * changed in some way since rev 1.30. - * - * Revision 1.1 93/06/14 22:21:24 davidg - * Beta release of device driver for SMC/WD80x3 and 3C503 ethernet boards. - * - */ - #include "ed.h" -#if NED > 0 -/* bpfilter included here in case it is needed in future net includes */ #include "bpfilter.h" #include @@ -120,6 +52,7 @@ #include #endif +#include #include #include @@ -127,7 +60,7 @@ #include #include -/* For backwards compatibility */ +/* for backwards compatibility */ #ifndef IFF_ALTPHYS #define IFF_ALTPHYS IFF_LINK0 #endif @@ -147,10 +80,12 @@ struct ed_softc { /* * The following 'proto' variable is part of a work-around for 8013EBT asics - * being write-only. It's sort of a prototype/shadow of the real thing. + * being write-only. It's sort of a prototype/shadow of the real thing. */ u_char wd_laar_proto; + u_char ed_cr_rd2; /* ED_CR_RD2 if not 790; 0 if 790 */ u_char isa16bit; /* width of access to card 0=8 or 1=16 */ + u_char is790; /* set by probe if NIC is a 790 */ caddr_t bpf; /* BPF "magic cookie" */ caddr_t mem_start; /* NIC memory start address */ @@ -172,20 +107,30 @@ struct ed_softc { u_char next_packet; /* pointer to next unread RX packet */ } ed_softc[NED]; -int ed_attach(), ed_init(), edintr(), ed_ioctl(), ed_probe(), - ed_start(), ed_reset(), ed_watchdog(); -void ds_getmcaf(); +int ed_probe __P((struct isa_device *)); +int ed_attach __P((struct isa_device *)); +int edintr __P((int)); +int ed_ioctl __P((struct ifnet *, int, caddr_t)); +void ed_start __P((struct ifnet *)); +void ed_watchdog __P((short)); +void ed_reset __P((struct ed_softc *)); +void ed_init __P((struct ed_softc *)); +void ed_stop __P((struct ed_softc *)); -static void ed_stop(); +u_long ds_crc __P((u_char *)); +void ds_getmcaf __P((struct ed_softc *, u_long *)); -static inline void ed_rint(); -static inline void ed_xmit(); -static inline char *ed_ring_copy(); +#define inline /* XXX for debugging porpoises */ -void ed_pio_readmem(), ed_pio_writemem(); -u_short ed_pio_write_mbufs(); +void ed_get_packet __P((/* struct ed_softc *, caddr_t, u_short */)); +static inline void ed_rint __P((struct ed_softc *)); +static inline void ed_xmit __P((struct ifnet *)); +static inline caddr_t ed_ring_copy __P((/* struct ed_Softc *, caddr_t, caddr_t, + u_short */)); -extern int ether_output(); +void ed_pio_readmem __P((/* struct ed_softc *, u_short, caddr_t, u_short */)); +void ed_pio_writemem __P((/* struct ed_softc *, caddr_t, u_short, u_short */)); +u_short ed_pio_write_mbufs __P((/* struct ed_softc *, struct mbuf *, u_short */)); struct trailer_header { u_short ether_type; @@ -197,11 +142,12 @@ struct isa_driver eddriver = { ed_attach, "ed" }; + /* - * Interrupt conversion table for WD/SMC ASIC - * (IRQ* are defined in icu.h) + * Interrupt conversion table for WD/SMC ASIC. + * (IRQ* are defined in icu.h.) */ -static unsigned short ed_intr_mask[] = { +static u_short ed_intr_mask[] = { IRQ9, IRQ3, IRQ5, @@ -211,20 +157,24 @@ static unsigned short ed_intr_mask[] = { IRQ15, IRQ4 }; + +static u_short ed_790_intr_mask[] = { + 0, + IRQ9, + IRQ3, + IRQ4, + IRQ5, + IRQ10, + IRQ11, + IRQ15 +}; #define ETHER_MIN_LEN 64 #define ETHER_MAX_LEN 1518 #define ETHER_ADDR_LEN 6 -#define ETHER_HDR_SIZE 14 /* - * Determine if the device is present - * - * on entry: - * a pointer to an isa_device struct - * on exit: - * NULL if device not found - * or # of i/o addresses used (if found) + * Determine if the device is present. */ int ed_probe(isa_dev) @@ -234,23 +184,22 @@ ed_probe(isa_dev) int nports; if (nports = ed_probe_WD80x3(isa_dev)) - return (nports); + return nports; if (nports = ed_probe_3Com(isa_dev)) - return (nports); + return nports; if (nports = ed_probe_Novell(isa_dev)) - return (nports); + return nports; return 0; } /* - * Generic probe routine for testing for the existance of a DS8390. - * Must be called after the NIC has just been reset. This routine - * works by looking at certain register values that are gauranteed - * to be initialized a certain way after power-up or reset. Seems - * not to currently work on the 83C690. + * Generic probe routine for testing for the existance of a DS8390. Must be + * called after the NIC has just been reset. This routine works by looking at + * certain register values that are gauranteed to be initialized a certain way + * after power-up or reset. Seems not to currently work on the 83C690. * * Specifically: * @@ -261,9 +210,9 @@ ed_probe(isa_dev) * Data Control (DCR) LAS * Transmit Config. (TCR) LB1, LB0 * - * We only look at the CR and ISR registers, however, because looking at - * the others would require changing register pages (which would be - * intrusive if this isn't an 8390). + * We only look at the CR and ISR registers, however, because looking at the + * others would require changing register pages (which would be intrusive if + * this isn't an 8390). * * Return 1 if 8390 was found, 0 if not. */ @@ -273,17 +222,17 @@ ed_probe_generic8390(sc) struct ed_softc *sc; { if ((inb(sc->nic_addr + ED_P0_CR) & - (ED_CR_RD2|ED_CR_TXP|ED_CR_STA|ED_CR_STP)) != - (ED_CR_RD2|ED_CR_STP)) - return (0); + (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != + (ED_CR_RD2 | ED_CR_STP)) + return 0; if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST) - return (0); + return 0; - return(1); + return 1; } /* - * Probe and vendor-specific initialization routine for SMC/WD80x3 boards + * Probe and vendor-specific initialization routine for SMC/WD80x3 boards. */ int ed_probe_WD80x3(isa_dev) @@ -296,40 +245,49 @@ ed_probe_WD80x3(isa_dev) sc->asic_addr = isa_dev->id_iobase; sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET; + sc->is790 = 0; + +#ifdef TOSH_ETHER + outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_POW); + DELAY(10000); +#endif /* - * Attempt to do a checksum over the station address PROM. - * If it fails, it's probably not a SMC/WD board. There - * is a problem with this, though: some clone WD boards - * don't pass the checksum test. Danpex boards for one. + * Attempt to do a checksum over the station address PROM. If it + * fails, it's probably not a SMC/WD board. There is a problem with + * this, though: some clone WD boards don't pass the checksum test. + * Danpex boards for one. */ for (sum = 0, i = 0; i < 8; ++i) sum += inb(sc->asic_addr + ED_WD_PROM + i); if (sum != ED_WD_ROM_CHECKSUM_TOTAL) { /* - * Checksum is invalid. This often happens with cheap - * WD8003E clones. In this case, the checksum byte - * (the eighth byte) seems to always be zero. + * Checksum is invalid. This often happens with cheap WD8003E + * clones. In this case, the checksum byte (the eighth byte) + * seems to always be zero. */ if (inb(sc->asic_addr + ED_WD_CARD_ID) != ED_TYPE_WD8003E || - inb(sc->asic_addr + ED_WD_PROM + 7) != 0) - return(0); + inb(sc->asic_addr + ED_WD_PROM + 7) != 0) + return 0; } - /* reset card to force it into a known state. */ + /* Reset card to force it into a known state. */ +#ifdef TOSH_ETHER + outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW); +#else outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST); +#endif DELAY(100); - outb(sc->asic_addr + ED_WD_MSR, inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST); - /* wait in the case this card is reading it's EEROM */ + outb(sc->asic_addr + ED_WD_MSR, + inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST); + /* Wait in the case this card is reading it's EEROM. */ DELAY(5000); sc->vendor = ED_VENDOR_WD_SMC; sc->type = inb(sc->asic_addr + ED_WD_CARD_ID); - /* - * Set initial values for width/size. - */ + /* Set initial values for width/size. */ switch (sc->type) { case ED_TYPE_WD8003S: sc->type_str = "WD8003S"; @@ -346,9 +304,13 @@ ed_probe_WD80x3(isa_dev) memsize = 16384; isa16bit = 1; break; + case ED_TYPE_WD8013W: + sc->type_str = "WD8013W"; + memsize = 16384; + isa16bit = 1; + break; case ED_TYPE_WD8013EP: /* also WD8003EP */ - if (inb(sc->asic_addr + ED_WD_ICR) - & ED_WD_ICR_16BIT) { + if (inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) { isa16bit = 1; memsize = 16384; sc->type_str = "WD8013EP"; @@ -373,36 +335,62 @@ ed_probe_WD80x3(isa_dev) memsize = 16384; isa16bit = 1; break; + case ED_TYPE_SMC8216C: + sc->type_str = "SMC8216/SMC8216C"; + memsize = 16384; + isa16bit = 1; + sc->is790 = 1; + break; + case ED_TYPE_SMC8216T: + sc->type_str = "SMC8216T"; + memsize = 16384; + isa16bit = 1; + sc->is790 = 1; + break; +#ifdef TOSH_ETHER + case ED_TYPE_TOSHIBA1: + sc->type_str = "Toshiba1"; + memsize = 32768; + isa16bit = 1; + break; + case ED_TYPE_TOSHIBA4: + sc->type_str = "Toshiba4"; + memsize = 32768; + isa16bit = 1; + break; +#endif default: - sc->type_str = ""; + sc->type_str = NULL; memsize = 8192; isa16bit = 0; break; } /* - * Make some adjustments to initial values depending on what is - * found in the ICR. + * Make some adjustments to initial values depending on what is found + * in the ICR. */ - if (isa16bit && (sc->type != ED_TYPE_WD8013EBT) - && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) { + if (isa16bit && (sc->type != ED_TYPE_WD8013EBT) && +#ifdef TOSH_ETHER + (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4) && +#endif + ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) { isa16bit = 0; memsize = 8192; } -#if ED_DEBUG - printf("type=%s isa16bit=%d memsize=%d id_msize=%d\n", - sc->type_str,isa16bit,memsize,isa_dev->id_msize); - for (i=0; i<8; i++) +#ifdef ED_DEBUG + printf("type=%x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n", + sc->type, sc->type_str ?: "unknown", isa16bit, memsize, + isa_dev->id_msize); + for (i = 0; i < 8; i++) printf("%x -> %x\n", i, inb(sc->asic_addr + i)); #endif - /* - * Allow the user to override the autoconfiguration - */ + /* Allow the user to override the autoconfiguration. */ if (isa_dev->id_msize) memsize = isa_dev->id_msize; /* - * (note that if the user specifies both of the following flags - * that '8bit' mode intentionally has precedence) + * (Note that if the user specifies both of the following flags that + * '8-bit' mode intentionally has precedence.) */ if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE) isa16bit = 1; @@ -411,29 +399,47 @@ ed_probe_WD80x3(isa_dev) /* * Check 83C584 interrupt configuration register if this board has one - * XXX - we could also check the IO address register. But why - * bother...if we get past this, it *has* to be correct. + * XXX - We could also check the IO address register. But why + * bother... if we get past this, it *has* to be correct. */ - if (sc->type & ED_WD_SOFTCONFIG) { + if (sc->is790) { + sc->ed_cr_rd2 = 0; + /* Assemble together the encoded interrupt number. */ + outb(isa_dev->id_iobase + 0x04, inb(isa_dev->id_iobase + 0x04) + | 0x80); + iptr = ((inb(isa_dev->id_iobase + 0x0d) & 0x0c) >> 2) | + ((inb(isa_dev->id_iobase + 0x0d) & 0x40) >> 4); + outb(isa_dev->id_iobase + 0x04, inb(isa_dev->id_iobase + 0x04) + & ~0x80); /* - * Assemble together the encoded interrupt number. + * Translate it using translation table, and check for + * correctness. */ + if (ed_790_intr_mask[iptr] != isa_dev->id_irq) { + printf("ed%d: kernel configured irq %d doesn't match board configured irq %d\n", + isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, + ffs(ed_790_intr_mask[iptr]) - 1); + return 0; + } + } else if (sc->type & ED_WD_SOFTCONFIG) { + sc->ed_cr_rd2 = ED_CR_RD2; + /* Assemble together the encoded interrupt number. */ iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) | - ((inb(isa_dev->id_iobase + ED_WD_IRR) & - (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5); + ((inb(isa_dev->id_iobase + ED_WD_IRR) & + (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5); /* - * Translate it using translation table, and check for correctness. + * Translate it using translation table, and check for + * correctness. */ if (ed_intr_mask[iptr] != isa_dev->id_irq) { printf("ed%d: kernel configured irq %d doesn't match board configured irq %d\n", - isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, ffs(ed_intr_mask[iptr]) - 1); - return(0); + isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, + ffs(ed_intr_mask[iptr]) - 1); + return 0; } - /* - * Enable the interrupt. - */ + /* Enable the interrupt. */ outb(isa_dev->id_iobase + ED_WD_IRR, - inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN); + inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN); } sc->isa16bit = isa16bit; @@ -441,15 +447,14 @@ ed_probe_WD80x3(isa_dev) #ifdef notyet /* XXX - I'm not sure if PIO mode is even possible on WD/SMC boards */ /* * The following allows the WD/SMC boards to be used in Programmed I/O - * mode - without mapping the NIC memory shared. ...Not the prefered - * way, but it might be the only way. + * mode - without mapping the NIC memory shared. ...Not the prefered + * way, but it might be the only way. */ if (isa_dev->id_flags & ED_FLAGS_FORCE_PIO) { sc->mem_shared = 0; isa_dev->id_maddr = 0; - } else { + } else sc->mem_shared = 1; - } #else sc->mem_shared = 1; #endif @@ -457,89 +462,120 @@ ed_probe_WD80x3(isa_dev) sc->mem_start = (caddr_t)isa_dev->id_maddr; - /* - * allocate one xmit buffer if < 16k, two buffers otherwise - */ - if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) { - sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); + /* Allocate one xmit buffer if < 16k, two buffers otherwise. */ + if ((memsize < 16384) || + (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) sc->txb_cnt = 1; - sc->rec_page_start = ED_TXBUF_SIZE; - } else { - sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE * 2); + else sc->txb_cnt = 2; - sc->rec_page_start = ED_TXBUF_SIZE * 2; - } + + sc->tx_page_start = ED_WD_PAGE_OFFSET; + sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; + sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; + sc->mem_ring = sc->mem_start + sc->rec_page_start * ED_PAGE_SIZE; sc->mem_size = memsize; sc->mem_end = sc->mem_start + memsize; - sc->rec_page_stop = memsize / ED_PAGE_SIZE; - sc->tx_page_start = ED_WD_PAGE_OFFSET; - /* - * Get station address from on-board ROM - */ + /* Get station address from on-board ROM. */ for (i = 0; i < ETHER_ADDR_LEN; ++i) sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i); if (sc->mem_shared) { - /* - * Set address and enable interface shared memory. - */ - outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) & - ED_WD_MSR_ADDR) | ED_WD_MSR_MENB); - - /* - * Set upper address bits and 8/16 bit access to shared memory - */ - if (isa16bit) { - outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = - ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | - ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); - } else { - if ((sc->type & ED_WD_SOFTCONFIG) || (sc->type == ED_TYPE_WD8013EBT)) { - outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = - ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); - } + /* Set address and enable interface shared memory. */ + if (!sc->is790) { +#ifdef TOSH_ETHER + outb(sc->asic_addr + ED_WD_MSR + 1, + ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4); + outb(sc->asic_addr + ED_WD_MSR + 2, + ((kvtop(sc->mem_start) >> 16) & 0x0f)); + outb(sc->asic_addr + ED_WD_MSR, + ED_WD_MSR_MENB | ED_WD_MSR_POW); +#else + outb(sc->asic_addr + ED_WD_MSR, + ((kvtop(sc->mem_start) >> 13) & ED_WD_MSR_ADDR) | + ED_WD_MSR_MENB); +#endif + } else { + outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); + outb(sc->asic_addr + 0x04, + inb(sc->asic_addr + 0x04) | 0x80); + outb(sc->asic_addr + 0x0b, + ((kvtop(sc->mem_start) >> 13) & 0x0f) | + ((kvtop(sc->mem_start) >> 11) & 0x40) | + (inb(sc->asic_addr + 0x0b) & 0xb0)); + outb(sc->asic_addr + 0x04, + inb(sc->asic_addr + 0x04) & ~0x80); } /* - * Now zero memory and verify that it is clear + * Set upper address bits and 8/16 bit access to shared memory. */ + if (isa16bit) { + if (sc->is790) { + sc->wd_laar_proto = + inb(sc->asic_addr + ED_WD_LAAR); + outb(sc->asic_addr + ED_WD_LAAR, + ED_WD_LAAR_M16EN); + } else { + sc->wd_laar_proto = + ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | + ((kvtop(sc->mem_start) >> 19) & + ED_WD_LAAR_ADDRHI); + outb(sc->asic_addr + ED_WD_LAAR, + sc->wd_laar_proto); + } + } else { + if ((sc->type & ED_WD_SOFTCONFIG) || +#ifdef TOSH_ETHER + (sc->type == ED_TYPE_TOSHIBA1) || + (sc->type == ED_TYPE_TOSHIBA4) || +#endif + (sc->type == ED_TYPE_WD8013EBT) && + !sc->is790) { + sc->wd_laar_proto = + ((kvtop(sc->mem_start) >> 19) & + ED_WD_LAAR_ADDRHI); + outb(sc->asic_addr + ED_WD_LAAR, + sc->wd_laar_proto); + } + } + + /* Now zero memory and verify that it is clear. */ bzero(sc->mem_start, memsize); for (i = 0; i < memsize; ++i) if (sc->mem_start[i]) { printf("ed%d: failed to clear shared memory at %x - check configuration\n", - isa_dev->id_unit, kvtop(sc->mem_start + i)); + isa_dev->id_unit, kvtop(sc->mem_start + i)); - /* - * Disable 16 bit access to shared memory - */ - if (isa16bit) - outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= - ~ED_WD_LAAR_M16EN)); - - return(0); + /* Disable 16 bit access to shared memory. */ + if (isa16bit) { + sc->wd_laar_proto &= ~ED_WD_LAAR_M16EN; + outb(sc->asic_addr + ED_WD_LAAR, + sc->wd_laar_proto); + } + return 0; } /* - * Disable 16bit access to shared memory - we leave it disabled so - * that 1) machines reboot properly when the board is set - * 16 bit mode and there are conflicting 8bit devices/ROMS - * in the same 128k address space as this boards shared - * memory. and 2) so that other 8 bit devices with shared - * memory can be used in this 128k region, too. + * Disable 16bit access to shared memory - we leave it disabled + * so that 1) machines reboot properly when the board is set 16 + * 16 bit mode and there are conflicting 8bit devices/ROMS in + * the same 128k address space as this boards shared memory, + * and 2) so that other 8 bit devices with shared memory can be + * used in this 128k region, too. */ - if (isa16bit) - outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= - ~ED_WD_LAAR_M16EN)); - + if (isa16bit) { + sc->wd_laar_proto &= ~ED_WD_LAAR_M16EN; + outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto); + } } - return (ED_WD_IO_PORTS); + return ED_WD_IO_PORTS; } /* - * Probe and vendor-specific initialization routine for 3Com 3c503 boards + * Probe and vendor-specific initialization routine for 3Com 3c503 boards. */ int ed_probe_3Com(isa_dev) @@ -552,95 +588,96 @@ ed_probe_3Com(isa_dev) sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET; sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET; + sc->ed_cr_rd2 = ED_CR_RD2; /* * Verify that the kernel configured I/O address matches the board - * configured address + * configured address. + * + * This is really only useful to see if something that looks like the + * board is there; after all, we are already talking it at that + * address. */ switch (inb(sc->asic_addr + ED_3COM_BCFR)) { case ED_3COM_BCFR_300: if (isa_dev->id_iobase != 0x300) - return(0); + return 0; break; case ED_3COM_BCFR_310: if (isa_dev->id_iobase != 0x310) - return(0); + return 0; break; case ED_3COM_BCFR_330: if (isa_dev->id_iobase != 0x330) - return(0); + return 0; break; case ED_3COM_BCFR_350: if (isa_dev->id_iobase != 0x350) - return(0); + return 0; break; case ED_3COM_BCFR_250: if (isa_dev->id_iobase != 0x250) - return(0); + return 0; break; case ED_3COM_BCFR_280: if (isa_dev->id_iobase != 0x280) - return(0); + return 0; break; case ED_3COM_BCFR_2A0: if (isa_dev->id_iobase != 0x2a0) - return(0); + return 0; break; case ED_3COM_BCFR_2E0: if (isa_dev->id_iobase != 0x2e0) - return(0); + return 0; break; default: - return(0); + return 0; } /* - * Verify that the kernel shared memory address matches the - * board configured address. + * Verify that the kernel shared memory address matches the board + * configured address. */ switch (inb(sc->asic_addr + ED_3COM_PCFR)) { case ED_3COM_PCFR_DC000: if (kvtop(isa_dev->id_maddr) != 0xdc000) - return(0); + return 0; break; case ED_3COM_PCFR_D8000: if (kvtop(isa_dev->id_maddr) != 0xd8000) - return(0); + return 0; break; case ED_3COM_PCFR_CC000: if (kvtop(isa_dev->id_maddr) != 0xcc000) - return(0); + return 0; break; case ED_3COM_PCFR_C8000: if (kvtop(isa_dev->id_maddr) != 0xc8000) - return(0); + return 0; break; default: - return(0); + return 0; } /* - * Reset NIC and ASIC. Enable on-board transceiver throughout reset - * sequence because it'll lock up if the cable isn't connected - * if we don't. + * Reset NIC and ASIC. Enable on-board transceiver throughout reset + * sequence because it'll lock up if the cable isn't connected if we + * don't. */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL); - /* - * Wait for a while, then un-reset it - */ + /* Wait for a while, then un-reset it. */ DELAY(50); /* - * The 3Com ASIC defaults to rather strange settings for the CR after - * a reset - it's important to set it again after the following - * outb (this is done when we map the PROM below). + * The 3Com ASIC defaults to rather strange settings for the CR after a + * reset - it's important to set it again after the following outb + * (this is done when we map the PROM below). */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); - /* - * Wait a bit for the NIC to recover from the reset - */ + /* Wait a bit for the NIC to recover from the reset. */ DELAY(5000); sc->vendor = ED_VENDOR_3COM; @@ -649,17 +686,16 @@ ed_probe_3Com(isa_dev) sc->mem_shared = 1; /* - * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k - * window to it. + * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window + * to it. */ memsize = 8192; /* - * Get station address from on-board ROM - */ - /* + * Get station address from on-board ROM. + * * First, map ethernet address PROM over the top of where the NIC - * registers normally appear. + * registers normally appear. */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL); @@ -667,45 +703,34 @@ ed_probe_3Com(isa_dev) sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i); /* - * Unmap PROM - select NIC registers. The proper setting of the - * tranceiver is set in ed_init so that the attach code - * is given a chance to set the default based on a compile-time - * config option + * Unmap PROM - select NIC registers. The proper setting of the + * tranceiver is set in ed_init so that the attach code is given a + * chance to set the default based on a compile-time config option. */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); - /* - * Determine if this is an 8bit or 16bit board - */ + /* Determine if this is an 8bit or 16bit board. */ + + /* Select page 0 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); /* - * select page 0 registers - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); - - /* - * Attempt to clear WTS bit. If it doesn't clear, then this is a - * 16bit board. + * Attempt to clear WTS bit. If it doesn't clear, then this is a + * 16-bit board. */ outb(sc->nic_addr + ED_P0_DCR, 0); - /* - * select page 2 registers - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2|ED_CR_RD2|ED_CR_STP); + /* Select page 2 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP); - /* - * The 3c503 forces the WTS bit to a one if this is a 16bit board - */ + /* The 3c503 forces the WTS bit to a one if this is a 16bit board. */ if (inb(sc->nic_addr + ED_P2_DCR) & ED_DCR_WTS) isa16bit = 1; else isa16bit = 0; - /* - * select page 0 registers - */ - outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2|ED_CR_STP); + /* Select page 0 registers. */ + outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2 | ED_CR_STP); sc->mem_start = (caddr_t)isa_dev->id_maddr; sc->mem_size = memsize; @@ -713,13 +738,12 @@ ed_probe_3Com(isa_dev) /* * We have an entire 8k window to put the transmit buffers on the - * 16bit boards. But since the 16bit 3c503's shared memory - * is only fast enough to overlap the loading of one full-size - * packet, trying to load more than 2 buffers can actually - * leave the transmitter idle during the load. So 2 seems - * the best value. (Although a mix of variable-sized packets - * might change this assumption. Nonetheless, we optimize for - * linear transfers of same-size packets.) + * 16-bit boards. But since the 16bit 3c503's shared memory is only + * fast enough to overlap the loading of one full-size packet, trying + * to load more than 2 buffers can actually leave the transmitter idle + * during the load. So 2 seems the best value. (Although a mix of + * variable-sized packets might change this assumption. Nonetheless, + * we optimize for linear transfers of same-size packets.) */ if (isa16bit) { if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING) @@ -729,32 +753,31 @@ ed_probe_3Com(isa_dev) sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT; sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT; - sc->rec_page_stop = memsize / ED_PAGE_SIZE + - ED_3COM_RX_PAGE_OFFSET_16BIT; + sc->rec_page_stop = + memsize / ED_PAGE_SIZE + ED_3COM_RX_PAGE_OFFSET_16BIT; sc->mem_ring = sc->mem_start; } else { sc->txb_cnt = 1; sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT; - sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT; - sc->rec_page_stop = memsize / ED_PAGE_SIZE + - ED_3COM_TX_PAGE_OFFSET_8BIT; + sc->rec_page_start = + ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT; + sc->rec_page_stop = + memsize / ED_PAGE_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT; sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); } sc->isa16bit = isa16bit; /* - * Initialize GA page start/stop registers. Probably only needed - * if doing DMA, but what the hell. + * Initialize GA page start/stop registers. Probably only needed if + * doing DMA, but what the Hell. */ outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start); outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop); - /* - * Set IRQ. 3c503 only allows a choice of irq 2-5. - */ + /* Set IRQ. 3c503 only allows a choice of irq 3-5 or 9. */ switch (isa_dev->id_irq) { - case IRQ2: + case IRQ9: outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2); break; case IRQ3: @@ -767,45 +790,44 @@ ed_probe_3Com(isa_dev) outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5); break; default: - printf("ed%d: Invalid irq configuration (%d) must be 2-5 for 3c503\n", - isa_dev->id_unit, ffs(isa_dev->id_irq) - 1); - return(0); + printf("ed%d: Invalid irq configuration (%d) must be 3-5 or 9 for 3c503\n", + isa_dev->id_unit, ffs(isa_dev->id_irq) - 1); + return 0; } /* - * Initialize GA configuration register. Set bank and enable shared mem. + * Initialize GA configuration register. Set bank and enable shared + * mem. */ - outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL | - ED_3COM_GACFR_MBS0); + outb(sc->asic_addr + ED_3COM_GACFR, + ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); /* - * Initialize "Vector Pointer" registers. These gawd-awful things - * are compared to 20 bits of the address on ISA, and if they - * match, the shared memory is disabled. We set them to - * 0xffff0...allegedly the reset vector. + * Initialize "Vector Pointer" registers. These gawd-awful things are + * compared to 20 bits of the address on ISA, and if they match, the + * shared memory is disabled. We set them to 0xffff0...allegedly the + * reset vector. */ outb(sc->asic_addr + ED_3COM_VPTR2, 0xff); outb(sc->asic_addr + ED_3COM_VPTR1, 0xff); outb(sc->asic_addr + ED_3COM_VPTR0, 0x00); - /* - * Zero memory and verify that it is clear - */ + /* Zero memory and verify that it is clear. */ bzero(sc->mem_start, memsize); for (i = 0; i < memsize; ++i) if (sc->mem_start[i]) { printf("ed%d: failed to clear shared memory at %x - check configuration\n", - isa_dev->id_unit, kvtop(sc->mem_start + i)); - return(0); + isa_dev->id_unit, kvtop(sc->mem_start + i)); + return 0; } isa_dev->id_msize = memsize; - return(ED_3COM_IO_PORTS); + return ED_3COM_IO_PORTS; } /* - * Probe and vendor-specific initialization routine for NE1000/2000 boards + * Probe and vendor-specific initialization routine for NE1000/2000 boards. */ int ed_probe_Novell(isa_dev) @@ -814,69 +836,70 @@ ed_probe_Novell(isa_dev) struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; u_int memsize, n; u_char romdata[16], isa16bit = 0, tmp; - static char test_pattern[32] = "THIS is A memory TEST pattern"; - char test_buffer[32]; + static u_char test_pattern[32] = "THIS is A memory TEST pattern"; + u_char test_buffer[32]; sc->asic_addr = isa_dev->id_iobase + ED_NOVELL_ASIC_OFFSET; sc->nic_addr = isa_dev->id_iobase + ED_NOVELL_NIC_OFFSET; + sc->ed_cr_rd2 = ED_CR_RD2; /* XXX - do Novell-specific probe here */ - /* Reset the board */ + /* Reset the board. */ tmp = inb(sc->asic_addr + ED_NOVELL_RESET); #if 0 /* * This total and completely screwy thing is to work around braindamage - * in some NE compatible boards. Why it works, I have *no* idea. - * It appears that the boards watch the ISA bus for an outb, and - * will lock up the ISA bus if they see an inb first. Weird. + * in some NE compatible boards. Why it works, I have *no* idea. It + * appears that the boards watch the ISA bus for an outb, and will lock + * up the ISA bus if they see an inb first. Weird. */ outb(0x84, 0); #endif /* * I don't know if this is necessary; probably cruft leftover from - * Clarkson packet driver code. Doesn't do a thing on the boards - * I've tested. -DG [note that a outb(0x84, 0) seems to work - * here, and is non-invasive...but some boards don't seem to reset - * and I don't have complete documentation on what the 'right' - * thing to do is...so we do the invasive thing for now. Yuck.] + * Clarkson packet driver code. Doesn't do a thing on the boards I've + * tested. -DG [note that a outb(0x84, 0) seems to work here, and is + * non-invasive...but some boards don't seem to reset and I don't have + * complete documentation on what the 'right' thing to do is...so we do + * the invasive thing for now. Yuck.] */ outb(sc->asic_addr + ED_NOVELL_RESET, tmp); DELAY(5000); /* - * This is needed because some NE clones apparently don't reset the - * NIC properly (or the NIC chip doesn't reset fully on power-up) + * This is needed because some NE clones apparently don't reset the NIC + * properly (or the NIC chip doesn't reset fully on power-up) * XXX - this makes the probe invasive! ...Done against my better - * judgement. -DLG + * judgement. -DLG */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); DELAY(5000); - /* Make sure that we really have an 8390 based board */ + /* Make sure that we really have an 8390 based board. */ if (!ed_probe_generic8390(sc)) - return(0); + return 0; sc->vendor = ED_VENDOR_NOVELL; sc->mem_shared = 0; isa_dev->id_maddr = 0; /* - * Test the ability to read and write to the NIC memory. This has - * the side affect of determining if this is an NE1000 or an NE2000. + * Test the ability to read and write to the NIC memory. This has the + * side affect of determining if this is an NE1000 or an NE2000. */ /* - * This prevents packets from being stored in the NIC memory when - * the readmem routine turns on the start bit in the CR. + * This prevents packets from being stored in the NIC memory when the + * readmem routine turns on the start bit in the CR. */ outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); - /* Temporarily initialize DCR for byte operations */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS); + /* Temporarily initialize DCR for byte operations. */ + outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE); outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE); @@ -884,9 +907,9 @@ ed_probe_Novell(isa_dev) sc->isa16bit = 0; /* - * Write a test pattern in byte mode. If this fails, then there - * probably isn't any memory at 8k - which likely means - * that the board is an NE2000. + * Write a test pattern in byte mode. If this fails, then there + * probably isn't any memory at 8k - which likely means that the board + * is an NE2000. */ ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern)); ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern)); @@ -895,20 +918,20 @@ ed_probe_Novell(isa_dev) /* not an NE1000 - try NE2000 */ outb(sc->nic_addr + ED_P0_DCR, - ED_DCR_WTS|ED_DCR_FT1|ED_DCR_LS); + ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE); outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE); sc->isa16bit = 1; /* - * Write a test pattern in word mode. If this also fails, then - * we don't know what this board is. + * Write a test pattern in word mode. If this also fails, then + * we don't know what this board is. */ ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern)); ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern)); if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) - return(0); /* not an NE2000 either */ + return 0; /* not an NE2000 either */ sc->type = ED_TYPE_NE2000; sc->type_str = "NE2000"; @@ -917,28 +940,29 @@ ed_probe_Novell(isa_dev) sc->type_str = "NE1000"; } - /* 8k of memory plus an additional 8k if 16bit */ + /* 8k of memory plus an additional 8k if 16-bit. */ memsize = 8192 + sc->isa16bit * 8192; #if 0 /* probably not useful - NE boards only come two ways */ - /* allow kernel config file overrides */ + /* Allow kernel config file overrides. */ if (isa_dev->id_msize) memsize = isa_dev->id_msize; #endif sc->mem_size = memsize; - /* NIC memory doesn't start at zero on an NE board */ - /* The start address is tied to the bus width */ - sc->mem_start = (char *) 8192 + sc->isa16bit * 8192; + /* NIC memory doesn't start at zero on an NE board. */ + /* The start address is tied to the bus width. */ + sc->mem_start = (caddr_t) 8192 + sc->isa16bit * 8192; sc->mem_end = sc->mem_start + memsize; sc->tx_page_start = memsize / ED_PAGE_SIZE; /* * Use one xmit buffer if < 16k, two buffers otherwise (if not told - * otherwise). + * otherwise). */ - if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) + if ((memsize < 16384) || + (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) sc->txb_cnt = 1; else sc->txb_cnt = 2; @@ -946,20 +970,21 @@ ed_probe_Novell(isa_dev) sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; - sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; + sc->mem_ring = + sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; ed_pio_readmem(sc, 0, romdata, 16); for (n = 0; n < ETHER_ADDR_LEN; n++) sc->arpcom.ac_enaddr[n] = romdata[n*(sc->isa16bit+1)]; - /* clear any pending interrupts that might have occurred above */ + /* Clear any pending interrupts that might have occurred above. */ outb(sc->nic_addr + ED_P0_ISR, 0xff); - return(ED_NOVELL_IO_PORTS); + return ED_NOVELL_IO_PORTS; } /* - * Install interface into kernel networking data structures + * Install interface into kernel networking data structures. */ int ed_attach(isa_dev) @@ -970,79 +995,65 @@ ed_attach(isa_dev) struct ifaddr *ifa; struct sockaddr_dl *sdl; - /* - * Set interface to stopped condition (reset) - */ - ed_stop(isa_dev->id_unit); + /* Set interface to stopped condition (reset). */ + ed_stop(sc); - /* - * Initialize ifnet structure - */ + /* Initialize ifnet structure. */ ifp->if_unit = isa_dev->id_unit; - ifp->if_name = "ed" ; + ifp->if_name = "ed"; ifp->if_mtu = ETHERMTU; ifp->if_output = ether_output; ifp->if_start = ed_start; ifp->if_ioctl = ed_ioctl; - ifp->if_reset = ed_reset; ifp->if_watchdog = ed_watchdog; - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | - IFF_MULTICAST; + ifp->if_flags = + IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; /* * Set default state for ALTPHYS flag (used to disable the tranceiver - * for AUI operation), based on compile-time config option. + * for AUI operation), based on compile-time config option. */ if (isa_dev->id_flags & ED_FLAGS_DISABLE_TRANCEIVER) ifp->if_flags |= IFF_ALTPHYS; - /* - * Attach the interface - */ + /* Attach the interface. */ if_attach(ifp); /* * Search down the ifa address list looking for the AF_LINK type entry + * and initialize it. */ ifa = ifp->if_addrlist; - while ((ifa != 0) && (ifa->ifa_addr != 0) && - (ifa->ifa_addr->sa_family != AF_LINK)) - ifa = ifa->ifa_next; - /* - * If we find an AF_LINK type entry we fill in the hardware address. - * This is useful for netstat(1) to keep track of which interface - * is which. - */ - if ((ifa != 0) && (ifa->ifa_addr != 0)) { - /* - * Fill in the link-level address for this interface - */ - sdl = (struct sockaddr_dl *)ifa->ifa_addr; - sdl->sdl_type = IFT_ETHER; - sdl->sdl_alen = ETHER_ADDR_LEN; - sdl->sdl_slen = 0; - bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN); + while (ifa && ifa->ifa_addr) { + if (ifa->ifa_addr->sa_family == AF_LINK) { + /* + * Fill in the link-level address for this interface. + */ + sdl = (struct sockaddr_dl *)ifa->ifa_addr; + sdl->sdl_type = IFT_ETHER; + sdl->sdl_alen = ETHER_ADDR_LEN; + sdl->sdl_slen = 0; + bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), + ETHER_ADDR_LEN); + break; + } else + ifa = ifa->ifa_next; } - /* - * Print additional info when attached - */ + /* Print additional info when attached. */ printf("ed%d: address %s, ", isa_dev->id_unit, - ether_sprintf(sc->arpcom.ac_enaddr)); + ether_sprintf(sc->arpcom.ac_enaddr)); - if (sc->type_str && (*sc->type_str != 0)) + if (sc->type_str && (*sc->type_str != '\0')) printf("type %s ", sc->type_str); else printf("type unknown (0x%x) ", sc->type); - printf("%s ",sc->isa16bit ? "(16 bit)" : "(8 bit)"); + printf("%s", sc->isa16bit ? "(16-bit)" : "(8-bit)"); printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) && - (ifp->if_flags & IFF_ALTPHYS)) ? "tranceiver disabled" : ""); + (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : ""); - /* - * If BPF is in the kernel, call the attach for it - */ #if NBPFILTER > 0 bpfattach(&sc->bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); #endif @@ -1052,86 +1063,77 @@ ed_attach(isa_dev) /* * Reset interface. */ -int -ed_reset(unit) - int unit; +void +ed_reset(sc) + struct ed_softc *sc; { int s; s = splnet(); - - /* - * Stop interface and re-initialize. - */ - ed_stop(unit); - ed_init(unit); - - (void) splx(s); + ed_stop(sc); + ed_init(sc); + splx(s); } /* * Take interface offline. */ void -ed_stop(unit) - int unit; +ed_stop(sc) + struct ed_softc *sc; { - struct ed_softc *sc = &ed_softc[unit]; int n = 5000; - /* - * Stop everything on the interface, and select page 0 registers. - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + /* Stop everything on the interface, and select page 0 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_STP | sc->ed_cr_rd2); /* - * Wait for interface to enter stopped state, but limit # of checks - * to 'n' (about 5ms). It shouldn't even take 5us on modern - * DS8390's, but just in case it's an old one. + * Wait for interface to enter stopped state, but limit # of checks to + * to 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, + * but just in case it's an old one. */ while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n); - } /* - * Device timeout/watchdog routine. Entered if the device neglects to - * generate an interrupt after a transmit has been started on it. + * Device timeout/watchdog routine. Entered if the device neglects to generate + * an interrupt after a transmit has been started on it. */ -int +void ed_watchdog(unit) - int unit; + short unit; { struct ed_softc *sc = &ed_softc[unit]; log(LOG_ERR, "ed%d: device timeout\n", unit); ++sc->arpcom.ac_if.if_oerrors; - ed_reset(unit); + ed_reset(sc); } /* * Initialize device. */ -ed_init(unit) - int unit; +void +ed_init(sc) + struct ed_softc *sc; { - struct ed_softc *sc = &ed_softc[unit]; struct ifnet *ifp = &sc->arpcom.ac_if; int i, s; - u_char command; + u_char command; - - /* address not known */ - if (ifp->if_addrlist == (struct ifaddr *)0) return; + /* Address not known. */ + if (ifp->if_addrlist == 0) + return; /* * Initialize the NIC in the exact order outlined in the NS manual. - * This init procedure is "mandatory"...don't change what or when - * things happen. + * This init procedure is "mandatory"...don't change what or when + * things happen. */ s = splnet(); - /* reset transmitter flags */ + /* Reset transmitter flags. */ sc->xmit_busy = 0; sc->arpcom.ac_if.if_timer = 0; @@ -1139,127 +1141,103 @@ ed_init(unit) sc->txb_new = 0; sc->txb_next_tx = 0; - /* This variable is used below - don't move this assignment */ + /* This variable is used below - don't move this assignment. */ sc->next_packet = sc->rec_page_start + 1; - /* - * Set interface for page 0, Remote DMA complete, Stopped - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + /* Set interface for page 0, remote DMA complete, stopped. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_STP | sc->ed_cr_rd2); if (sc->isa16bit) { /* - * Set FIFO threshold to 8, No auto-init Remote DMA, - * byte order=80x86, word-wide DMA xfers, + * Set FIFO threshold to 8, No auto-init Remote DMA, byte + * order=80x86, word-wide DMA xfers, */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS|ED_DCR_LS); + outb(sc->nic_addr + ED_P0_DCR, + ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS); } else { - /* - * Same as above, but byte-wide DMA xfers - */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS); + /* Same as above, but byte-wide DMA xfers. */ + outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); } - /* - * Clear Remote Byte Count Registers - */ + /* Clear remote byte count registers. */ outb(sc->nic_addr + ED_P0_RBCR0, 0); outb(sc->nic_addr + ED_P0_RBCR1, 0); -#if 0 - /* - * Enable reception of broadcast packets - */ - outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); -#endif - /* - * Tell RCR to do nothing for now. - */ + /* Tell RCR to do nothing for now. */ outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); - /* - * Place NIC in internal loopback mode - */ + /* Place NIC in internal loopback mode. */ outb(sc->nic_addr + ED_P0_TCR, ED_TCR_LB0); - /* - * Initialize transmit/receive (ring-buffer) Page Start - */ + /* Initialize transmit/receive (ring-buffer) page start. */ outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start); outb(sc->nic_addr + ED_P0_PSTART, sc->rec_page_start); - /* - * Initialize Receiver (ring-buffer) Page Stop and Boundry - */ + /* Set lower bits of byte addressable framing to 0. */ + if (sc->is790) + outb(sc->nic_addr + 0x09, 0); + + /* Initialize receiver (ring-buffer) page stop and boundry. */ outb(sc->nic_addr + ED_P0_PSTOP, sc->rec_page_stop); outb(sc->nic_addr + ED_P0_BNRY, sc->rec_page_start); /* - * Clear all interrupts. A '1' in each bit position clears the - * corresponding flag. + * Clear all interrupts. A '1' in each bit position clears the + * corresponding flag. */ outb(sc->nic_addr + ED_P0_ISR, 0xff); /* * Enable the following interrupts: receive/transmit complete, - * receive/transmit error, and Receiver OverWrite. + * receive/transmit error, and Receiver OverWrite. * * Counter overflow and Remote DMA complete are *not* enabled. */ outb(sc->nic_addr + ED_P0_IMR, - ED_IMR_PRXE|ED_IMR_PTXE|ED_IMR_RXEE|ED_IMR_TXEE|ED_IMR_OVWE); + ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | + ED_IMR_OVWE); - /* - * Program Command Register for page 1 - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STP); + /* Program command register for page 1. */ + outb(sc->nic_addr + ED_P0_CR, + ED_CR_PAGE_1 | ED_CR_STP | sc->ed_cr_rd2); - /* - * Copy out our station address - */ + /* Copy out our station address. */ for (i = 0; i < ETHER_ADDR_LEN; ++i) outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]); - /* set up multicast addresses and filter modes */ - if ((ifp->if_flags & (IFF_MULTICAST | IFF_PROMISC)) != 0) { + /* Set up multicast addresses and filter modes. */ + if (ifp->if_flags & (IFF_MULTICAST | IFF_PROMISC)) { u_long mcaf[2]; - if ((ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) != 0) { + if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) { mcaf[0] = 0xffffffff; mcaf[1] = 0xffffffff; } else ds_getmcaf(sc, mcaf); - /* - * Set multicast filter on chip. - */ + /* Set multicast filter on chip. */ for (i = 0; i < 8; i++) outb(sc->nic_addr + ED_P1_MAR0 + i, ((u_char *)mcaf)[i]); } - /* - * Set Current Page pointer to next_packet (initialized above) - */ + + /* Set current page pointer to next_packet (initialized above). */ outb(sc->nic_addr + ED_P1_CURR, sc->next_packet); /* - * Set Command Register for page 0, Remote DMA complete, - * and interface Start. + * Set command register for page 0, remote DMA complete, and interface + * start. */ - outb(sc->nic_addr + ED_P1_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P1_CR, ED_CR_STA | sc->ed_cr_rd2); - /* - * Clear all interrupts. - */ + /* Clear all interrupts. */ outb(sc->nic_addr + ED_P0_ISR, 0xff); - /* - * Take interface out of loopback - */ + /* Take interface out of loopback. */ outb(sc->nic_addr + ED_P0_TCR, 0); /* * If this is a 3Com board, the tranceiver must be software enabled - * (there is no settable hardware default). + * (there is no settable hardware default). */ if (sc->vendor == ED_VENDOR_3COM) { if (ifp->if_flags & IFF_ALTPHYS) @@ -1269,76 +1247,59 @@ ed_init(unit) } i = ED_RCR_AB; - if ((ifp->if_flags & IFF_PROMISC) != 0) { + if (ifp->if_flags & IFF_PROMISC) { /* * Set promiscuous mode. Multicast filter was set earlier so * that we should receive all multicast packets. */ i |= ED_RCR_AM | ED_RCR_PRO | ED_RCR_AR | ED_RCR_SEP; - } else if ((ifp->if_flags & IFF_MULTICAST) != 0) { + } else if (ifp->if_flags & IFF_MULTICAST) i |= ED_RCR_AM; - } outb(sc->nic_addr + ED_P0_RCR, i); - /* - * Set 'running' flag, and clear output active flag. - */ + /* Set 'running' flag, and clear output active flag. */ ifp->if_flags |= IFF_RUNNING; ifp->if_flags &= ~IFF_OACTIVE; - /* - * ...and attempt to start output - */ + /* ...and attempt to start output. */ ed_start(ifp); (void) splx(s); } /* - * This routine actually starts the transmission on the interface + * This routine actually starts the transmission on the interface. */ static inline void ed_xmit(ifp) struct ifnet *ifp; { struct ed_softc *sc = &ed_softc[ifp->if_unit]; - unsigned short len; + u_short len; len = sc->txb_len[sc->txb_next_tx]; - /* - * Set NIC for page 0 register access - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + /* Set NIC for page 0 register access. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_STA | sc->ed_cr_rd2); - /* - * Set TX buffer start page - */ + /* Set TX buffer start page. */ outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start + - sc->txb_next_tx * ED_TXBUF_SIZE); + sc->txb_next_tx * ED_TXBUF_SIZE); - /* - * Set TX length - */ + /* Set TX length. */ outb(sc->nic_addr + ED_P0_TBCR0, len); outb(sc->nic_addr + ED_P0_TBCR1, len >> 8); - /* - * Set page 0, Remote DMA complete, Transmit Packet, and *Start* - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_TXP|ED_CR_STA); + /* Set page 0, remote DMA complete, transmit packet, and *start*. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_TXP | ED_CR_STA | sc->ed_cr_rd2); sc->xmit_busy = 1; - /* - * Point to next transmit buffer slot and wrap if necessary. - */ + /* Point to next transmit buffer slot and wrap if necessary. */ sc->txb_next_tx++; if (sc->txb_next_tx == sc->txb_cnt) sc->txb_next_tx = 0; - /* - * Set a timer just in case we never hear from the board again - */ + /* Set a timer just in case we never hear from the board again. */ ifp->if_timer = 2; } @@ -1351,7 +1312,7 @@ static inline void ed_xmit(ifp) * 2) that the IFF_OACTIVE flag is checked before this code is called * (i.e. that the output part of the interface is idle) */ -int +void ed_start(ifp) struct ifnet *ifp; { @@ -1362,120 +1323,105 @@ ed_start(ifp) outloop: /* - * First, see if there are buffered packets and an idle - * transmitter - should never happen at this point. + * First, see if there are buffered packets and an idle transmitter - + * should never happen at this point. */ if (sc->txb_inuse && (sc->xmit_busy == 0)) { - printf("ed: packets buffers, but transmitter idle\n"); + printf("ed%d: packets buffers, but transmitter idle\n", + ifp->if_unit); ed_xmit(ifp); } - /* - * See if there is room to put another packet in the buffer. - */ + /* See if there is room to put another packet in the buffer. */ if (sc->txb_inuse == sc->txb_cnt) { - /* - * No room. Indicate this to the outside world - * and exit. - */ + /* No room. Indicate this to the outside world and exit. */ ifp->if_flags |= IFF_OACTIVE; return; } IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); if (m == 0) { - /* - * We are using the !OACTIVE flag to indicate to the outside - * world that we can accept an additional packet rather than - * that the transmitter is _actually_ active. Indeed, the - * transmitter may be active, but if we haven't filled all - * the buffers with data then we still want to accept more. - */ + /* + * We are using the !OACTIVE flag to indicate to the outside + * world that we can accept an additional packet rather than + * that the transmitter is _actually_ active. Indeed, the + * transmitter may be active, but if we haven't filled all + * the buffers with data then we still want to accept more. + */ ifp->if_flags &= ~IFF_OACTIVE; return; } - /* - * Copy the mbuf chain into the transmit buffer - */ - + /* Copy the mbuf chain into the transmit buffer. */ m0 = m; - /* txb_new points to next open buffer slot */ + /* txb_new points to next open buffer slot. */ buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE); if (sc->mem_shared) { - /* - * Special case setup for 16 bit boards... - */ + /* Special case setup for 16 bit boards... */ if (sc->isa16bit) { switch (sc->vendor) { /* - * For 16bit 3Com boards (which have 16k of memory), - * we have the xmit buffers in a different page - * of memory ('page 0') - so change pages. + * For 16bit 3Com boards (which have 16k of memory), we + * have the xmit buffers in a different page of memory + * ('page 0') - so change pages. */ case ED_VENDOR_3COM: outb(sc->asic_addr + ED_3COM_GACFR, - ED_3COM_GACFR_RSEL); + ED_3COM_GACFR_RSEL); break; /* - * Enable 16bit access to shared memory on WD/SMC boards - * Don't update wd_laar_proto because we want to restore the - * previous state (because an arp reply in the input code - * may cause a call-back to ed_start) + * Enable 16bit access to shared memory on WD/SMC + * boards don't update wd_laar_proto because we want to + * restore the previous state (because an arp reply in + * the input code may cause a call-back to ed_start). * XXX - the call-back to 'start' is a bug, IMHO. */ case ED_VENDOR_WD_SMC: outb(sc->asic_addr + ED_WD_LAAR, - (sc->wd_laar_proto | ED_WD_LAAR_M16EN)); + (sc->wd_laar_proto | ED_WD_LAAR_M16EN)); } } - for (len = 0; m != 0; m = m->m_next) { + for (len = 0; m; m = m->m_next) { bcopy(mtod(m, caddr_t), buffer, m->m_len); buffer += m->m_len; len += m->m_len; } - /* - * Restore previous shared memory access - */ + /* Restore previous shared memory access. */ if (sc->isa16bit) { switch (sc->vendor) { case ED_VENDOR_3COM: outb(sc->asic_addr + ED_3COM_GACFR, - ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); + ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); break; case ED_VENDOR_WD_SMC: - outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto); + outb(sc->asic_addr + ED_WD_LAAR, + sc->wd_laar_proto); break; } } - } else { - len = ed_pio_write_mbufs(sc, m, buffer); - } + } else + len = ed_pio_write_mbufs(sc, m, (u_short)buffer); sc->txb_len[sc->txb_new] = MAX(len, ETHER_MIN_LEN); sc->txb_inuse++; - /* - * Point to next buffer slot and wrap if necessary. - */ - sc->txb_new++; - if (sc->txb_new == sc->txb_cnt) + /* Point to next buffer slot and wrap if necessary. */ + if (++sc->txb_new == sc->txb_cnt) sc->txb_new = 0; if (sc->xmit_busy == 0) ed_xmit(ifp); /* * If there is BPF support in the configuration, tap off here. - * The following has support for converting trailer packets - * back to normal. - * XXX - support for trailer packets in BPF should be moved into - * the bpf code proper to avoid code duplication in all of - * the drivers. + * The following has support for converting trailer packets back to + * normal. + * XXX - Support for trailer packets in BPF should be moved into the + * bpf code proper to avoid code duplication in all of the drivers. */ #if NBPFILTER > 0 if (sc->bpf) { @@ -1483,26 +1429,22 @@ outloop: int off, datasize, resid; struct ether_header *eh; struct trailer_header trailer_header; - char ether_packet[ETHER_MAX_LEN]; - char *ep; + u_char ether_packet[ETHER_MAX_LEN], *ep; ep = ether_packet; /* * We handle trailers below: - * Copy ether header first, then residual data, - * then data. Put all this in a temporary buffer - * 'ether_packet' and send off to bpf. Since the - * system has generated this packet, we assume - * that all of the offsets in the packet are - * correct; if they're not, the system will almost - * certainly crash in m_copydata. - * We make no assumptions about how the data is - * arranged in the mbuf chain (i.e. how much - * data is in each mbuf, if mbuf clusters are - * used, etc.), which is why we use m_copydata - * to get the ether header rather than assume - * that this is located in the first mbuf. + * Copy ether header first, then residual data, then data. Put + * all this in a temporary buffer 'ether_packet' and send off + * to bpf. Since the system has generated this packet, we + * assume that all of the offsets in the packet are correct; if + * they're not, the system will almost certainly crash in + * m_copydata. We make no assumptions about how the data is + * arranged in the mbuf chain (i.e. how much data is in each + * mbuf, if mbuf clusters are used, etc.), which is why we use + * m_copydata to get the ether header rather than assume that + * this is located in the first mbuf. */ /* copy ether header */ m_copydata(m0, 0, sizeof(struct ether_header), ep); @@ -1516,17 +1458,17 @@ outloop: /* copy trailer_header into a data structure */ m_copydata(m0, off, sizeof(struct trailer_header), - &trailer_header.ether_type); + &trailer_header.ether_type); /* copy residual data */ m_copydata(m0, off+sizeof(struct trailer_header), - resid = ntohs(trailer_header.ether_residual) - - sizeof(struct trailer_header), ep); + resid = ntohs(trailer_header.ether_residual) - + sizeof(struct trailer_header), ep); ep += resid; /* copy data */ - m_copydata(m0, sizeof(struct ether_header), - datasize, ep); + m_copydata(m0, sizeof(struct ether_header), datasize, + ep); ep += datasize; /* restore original ether packet type */ @@ -1540,9 +1482,7 @@ outloop: m_freem(m0); - /* - * Loop back to the top to possibly buffer more packets - */ + /* Loop back to the top to possibly buffer more packets. */ goto outloop; } @@ -1550,95 +1490,86 @@ outloop: * Ethernet interface receiver interrupt. */ static inline void -ed_rint(unit) - int unit; +ed_rint(sc) + struct ed_softc *sc; { - register struct ed_softc *sc = &ed_softc[unit]; u_char boundry, current; u_short len; struct ed_ring packet_hdr; - char *packet_ptr; + caddr_t packet_ptr; - /* - * Set NIC to page 1 registers to get 'current' pointer - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA); + /* Set NIC to page 1 registers to get 'current' pointer. */ + outb(sc->nic_addr + ED_P0_CR, + ED_CR_PAGE_1 | ED_CR_STA | sc->ed_cr_rd2); /* * 'sc->next_packet' is the logical beginning of the ring-buffer - i.e. - * it points to where new data has been buffered. The 'CURR' - * (current) register points to the logical end of the ring-buffer - * - i.e. it points to where additional new data will be added. - * We loop here until the logical beginning equals the logical - * end (or in other words, until the ring-buffer is empty). + * it points to where new data has been buffered. The 'CURR' (current) + * register points to the logical end of the ring-buffer - i.e. it + * points to where additional new data will be added. We loop here + * until the logical beginning equals the logical end (or in other + * words, until the ring-buffer is empty). */ while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) { - /* get pointer to this buffer's header structure */ + /* Get pointer to this buffer's header structure. */ packet_ptr = sc->mem_ring + - (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE; + (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE; /* * The byte count includes the FCS - Frame Check Sequence (a - * 32 bit CRC). + * 32 bit CRC). */ if (sc->mem_shared) packet_hdr = *(struct ed_ring *)packet_ptr; else - ed_pio_readmem(sc, packet_ptr, (char *) &packet_hdr, - sizeof(packet_hdr)); + ed_pio_readmem(sc, (u_short)packet_ptr, + (caddr_t) &packet_hdr, sizeof(packet_hdr)); len = packet_hdr.count; if ((len >= ETHER_MIN_LEN) && (len <= ETHER_MAX_LEN)) { - /* - * Go get packet. len - 4 removes CRC from length. - */ + /* Go get packet. len - 4 removes CRC from length. */ ed_get_packet(sc, packet_ptr + 4, len - 4); ++sc->arpcom.ac_if.if_ipackets; } else { /* - * Really BAD...probably indicates that the ring pointers - * are corrupted. Also seen on early rev chips under - * high load - the byte order of the length gets switched. + * Really BAD...probably indicates that the ring + * pointers are corrupted. Also seen on early rev + * chips under high load - the byte order of the length + * gets switched. */ log(LOG_ERR, - "ed%d: NIC memory corrupt - invalid packet length %d\n", - unit, len); + "ed%d: NIC memory corrupt - invalid packet length %d\n", + sc->arpcom.ac_if.if_unit, len); ++sc->arpcom.ac_if.if_ierrors; - ed_reset(unit); + ed_reset(sc); return; } - /* - * Update next packet pointer - */ + /* Update next packet pointer. */ sc->next_packet = packet_hdr.next_packet; /* - * Update NIC boundry pointer - being careful to keep it - * one buffer behind. (as recommended by NS databook) + * Update NIC boundry pointer - being careful to keep it one + * buffer behind (as recommended by NS databook). */ boundry = sc->next_packet - 1; if (boundry < sc->rec_page_start) boundry = sc->rec_page_stop - 1; - /* - * Set NIC to page 0 registers to update boundry register - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); - + /* Set NIC to page 0 registers to update boundry register. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_STA | sc->ed_cr_rd2); outb(sc->nic_addr + ED_P0_BNRY, boundry); /* - * Set NIC to page 1 registers before looping to top (prepare to - * get 'CURR' current pointer) + * Set NIC to page 1 registers before looping to top (prepare + * to get 'CURR' current pointer). */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, + ED_CR_PAGE_1 | ED_CR_STA | sc->ed_cr_rd2); } } -/* - * Ethernet interface interrupt processor - */ +/* Ethernet interface interrupt processor. */ int edintr(unit) int unit; @@ -1646,188 +1577,169 @@ edintr(unit) struct ed_softc *sc = &ed_softc[unit]; u_char isr; - /* - * Set NIC to page 0 registers - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + /* Set NIC to page 0 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_STA | sc->ed_cr_rd2); - /* - * loop until there are no more new interrupts - */ + /* Loop until there are no more new interrupts. */ while (isr = inb(sc->nic_addr + ED_P0_ISR)) { - /* - * reset all the bits that we are 'acknowledging' - * by writing a '1' to each bit position that was set - * (writing a '1' *clears* the bit) + * Reset all the bits that we are 'acknowledging' by writing a + * '1' to each bit position that was set. + * (Writing a '1' *clears* the bit.) */ outb(sc->nic_addr + ED_P0_ISR, isr); /* - * Handle transmitter interrupts. Handle these first - * because the receiver will reset the board under - * some conditions. + * Handle transmitter interrupts. Handle these first because + * the receiver will reset the board under some conditions. */ - if (isr & (ED_ISR_PTX|ED_ISR_TXE)) { - u_char collisions = inb(sc->nic_addr + ED_P0_NCR); + if (isr & (ED_ISR_PTX | ED_ISR_TXE)) { + u_char collisions = + inb(sc->nic_addr + ED_P0_NCR) & 0x0f; /* - * Check for transmit error. If a TX completed with an - * error, we end up throwing the packet away. Really + * Check for transmit error. If a TX completed with an + * error, we end up throwing the packet away. Really * the only error that is possible is excessive * collisions, and in this case it is best to allow the - * automatic mechanisms of TCP to backoff the flow. Of + * automatic mechanisms of TCP to backoff the flow. Of * course, with UDP we're screwed, but this is expected * when a network is heavily loaded. */ + (void) inb(sc->nic_addr + ED_P0_TSR); if (isr & ED_ISR_TXE) { - /* - * Excessive collisions (16) + * Excessive collisions (16). */ if ((inb(sc->nic_addr + ED_P0_TSR) & ED_TSR_ABT) - && (collisions == 0)) { + && (collisions == 0)) { /* - * When collisions total 16, the - * P0_NCR will indicate 0, and the - * TSR_ABT is set. + * When collisions total 16, the P0_NCR + * will indicate 0, and the TSR_ABT is + * set. */ collisions = 16; } - /* - * update output errors counter - */ + /* Update output errors counter. */ ++sc->arpcom.ac_if.if_oerrors; } else { /* * Update total number of successfully - * transmitted packets. + * transmitted packets. */ ++sc->arpcom.ac_if.if_opackets; } - /* - * reset tx busy and output active flags - */ + /* Reset TX busy and output active flags. */ sc->xmit_busy = 0; sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; - /* - * clear watchdog timer - */ + /* Clear watchdog timer. */ sc->arpcom.ac_if.if_timer = 0; /* * Add in total number of collisions on last - * transmission. + * transmission. */ sc->arpcom.ac_if.if_collisions += collisions; /* * Decrement buffer in-use count if not zero (can only - * be zero if a transmitter interrupt occured while - * not actually transmitting). + * be zero if a transmitter interrupt occured while not + * actually transmitting). * If data is ready to transmit, start it transmitting, - * otherwise defer until after handling receiver + * otherwise defer until after handling receiver. */ if (sc->txb_inuse && --sc->txb_inuse) ed_xmit(&sc->arpcom.ac_if); } - /* - * Handle receiver interrupts - */ - if (isr & (ED_ISR_PRX|ED_ISR_RXE|ED_ISR_OVW)) { - /* - * Overwrite warning. In order to make sure that a lockup - * of the local DMA hasn't occurred, we reset and - * re-init the NIC. The NSC manual suggests only a - * partial reset/re-init is necessary - but some - * chips seem to want more. The DMA lockup has been - * seen only with early rev chips - Methinks this - * bug was fixed in later revs. -DG - */ + /* Handle receiver interrupts. */ + if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) { + /* + * Overwrite warning. In order to make sure that a + * lockup of the local DMA hasn't occurred, we reset + * and re-init the NIC. The NSC manual suggests only a + * partial reset/re-init is necessary - but some chips + * seem to want more. The DMA lockup has been seen + * only with early rev chips - Methinks this bug was + * fixed in later revs. -DG + */ if (isr & ED_ISR_OVW) { ++sc->arpcom.ac_if.if_ierrors; #ifdef DIAGNOSTIC log(LOG_WARNING, - "ed%d: warning - receiver ring buffer overrun\n", - unit); + "ed%d: warning - receiver ring buffer overrun\n", + unit); #endif - /* - * Stop/reset/re-init NIC - */ - ed_reset(unit); + /* Stop/reset/re-init NIC. */ + ed_reset(sc); } else { - - /* - * Receiver Error. One or more of: CRC error, frame - * alignment error FIFO overrun, or missed packet. - */ + /* + * Receiver Error. One or more of: CRC error, + * frame alignment error FIFO overrun, or + * missed packet. + */ if (isr & ED_ISR_RXE) { ++sc->arpcom.ac_if.if_ierrors; #ifdef ED_DEBUG printf("ed%d: receive error %x\n", unit, - inb(sc->nic_addr + ED_P0_RSR)); + inb(sc->nic_addr + ED_P0_RSR)); #endif } /* - * Go get the packet(s) + * Go get the packet(s). * XXX - Doing this on an error is dubious - * because there shouldn't be any data to - * get (we've configured the interface to - * not accept packets with errors). + * because there shouldn't be any data to get + * (we've configured the interface to not + * accept packets with errors). */ /* * Enable 16bit access to shared memory first - * on WD/SMC boards. + * on WD/SMC boards. */ if (sc->isa16bit && - (sc->vendor == ED_VENDOR_WD_SMC)) { - + sc->vendor == ED_VENDOR_WD_SMC) { + sc->wd_laar_proto |= ED_WD_LAAR_M16EN; outb(sc->asic_addr + ED_WD_LAAR, - (sc->wd_laar_proto |= - ED_WD_LAAR_M16EN)); + sc->wd_laar_proto); } - ed_rint (unit); + ed_rint(sc); - /* disable 16bit access */ + /* Disable 16-bit access. */ if (sc->isa16bit && - (sc->vendor == ED_VENDOR_WD_SMC)) { - + sc->vendor == ED_VENDOR_WD_SMC) { + sc->wd_laar_proto &= ~ED_WD_LAAR_M16EN; outb(sc->asic_addr + ED_WD_LAAR, - (sc->wd_laar_proto &= - ~ED_WD_LAAR_M16EN)); + sc->wd_laar_proto); } } } /* - * If it looks like the transmitter can take more data, - * attempt to start output on the interface. - * This is done after handling the receiver to - * give the receiver priority. + * If it looks like the transmitter can take more data, attempt + * to start output on the interface. This is done after + * handling the receiver to give the receiver priority. */ if ((sc->arpcom.ac_if.if_flags & IFF_OACTIVE) == 0) ed_start(&sc->arpcom.ac_if); /* - * return NIC CR to standard state: page 0, remote DMA complete, - * start (toggling the TXP bit off, even if was just set - * in the transmit routine, is *okay* - it is 'edge' - * triggered from low to high) + * Return NIC CR to standard state: page 0, remote DMA + * complete, start (toggling the TXP bit off, even if was just + * set in the transmit routine, is *okay* - it is 'edge' + * triggered from low to high). */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_STA | sc->ed_cr_rd2); /* - * If the Network Talley Counters overflow, read them to - * reset them. It appears that old 8390's won't - * clear the ISR flag otherwise - resulting in an - * infinite loop. + * If the Network Talley Counters overflow, read them to reset + * them. It appears that old 8390's won't clear the ISR flag + * otherwise - resulting in an infinite loop. */ if (isr & ED_ISR_CNT) { (void) inb(sc->nic_addr + ED_P0_CNTR0); @@ -1838,8 +1750,7 @@ edintr(unit) } /* - * Process an ioctl request. This code needs some work - it looks - * pretty ugly. + * Process an ioctl request. This code needs some work - it looks pretty ugly. */ int ed_ioctl(ifp, command, data) @@ -1862,7 +1773,7 @@ ed_ioctl(ifp, command, data) switch (ifa->ifa_addr->sa_family) { #ifdef INET case AF_INET: - ed_init(ifp->if_unit); /* before arpwhohas */ + ed_init(sc); /* before arpwhohas */ /* * See if another station has *our* IP address. * i.e.: There is an address conflict! If a @@ -1870,84 +1781,78 @@ ed_ioctl(ifp, command, data) * console. */ ((struct arpcom *)ifp)->ac_ipaddr = - IA_SIN(ifa)->sin_addr; + IA_SIN(ifa)->sin_addr; arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr); break; #endif #ifdef NS - /* - * XXX - This code is probably wrong - */ + /* XXX - This code is probably wrong. */ case AF_NS: { register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); if (ns_nullhost(*ina)) ina->x_host = - *(union ns_host *)(sc->arpcom.ac_enaddr); + *(union ns_host *)(sc->arpcom.ac_enaddr); else { - /* - * + /* + * */ bcopy((caddr_t)ina->x_host.c_host, (caddr_t)sc->arpcom.ac_enaddr, - sizeof(sc->arpcom.ac_enaddr)); + sizeof(sc->arpcom.ac_enaddr)); } - /* - * Set new address - */ - ed_init(ifp->if_unit); + /* Set new address. */ + ed_init(sc); break; } #endif default: - ed_init(ifp->if_unit); + ed_init(sc); break; } break; case SIOCSIFFLAGS: - if (((ifp->if_flags & IFF_UP) == 0) && - (ifp->if_flags & IFF_RUNNING)) { + if ((ifp->if_flags & IFF_UP) == 0 && + (ifp->if_flags & IFF_RUNNING) != 0) { /* * If interface is marked down and it is running, then * stop it. */ - ed_stop(ifp->if_unit); + ed_stop(sc); ifp->if_flags &= ~IFF_RUNNING; - } else if ((ifp->if_flags & IFF_UP) && - ((ifp->if_flags & IFF_RUNNING) == 0)) { + } else if ((ifp->if_flags & IFF_UP) != 0 && + (ifp->if_flags & IFF_RUNNING) == 0) { /* * If interface is marked up and it is stopped, then * start it. */ - ed_init(ifp->if_unit); + ed_init(sc); } else { /* * Reset the interface to pick up changes in any other * flags that affect hardware registers. */ - ed_stop(ifp->if_unit); - ed_init(ifp->if_unit); + ed_stop(sc); + ed_init(sc); } break; case SIOCADDMULTI: case SIOCDELMULTI: - /* - * Update our multicast list. - */ - error = (command == SIOCADDMULTI) ? - ether_addmulti((struct ifreq *)data, &sc->arpcom): - ether_delmulti((struct ifreq *)data, &sc->arpcom); + /* Update our multicast list. */ + error = (command == SIOCADDMULTI) ? + ether_addmulti((struct ifreq *)data, &sc->arpcom): + ether_delmulti((struct ifreq *)data, &sc->arpcom); if (error == ENETRESET) { /* * Multicast list has changed; set the hardware filter * accordingly. */ - ed_stop(ifp->if_unit); /* XXX for ds_setmcaf? */ - ed_init(ifp->if_unit); + ed_stop(sc); /* XXX for ds_setmcaf? */ + ed_init(sc); error = 0; } break; @@ -1955,12 +1860,12 @@ ed_ioctl(ifp, command, data) error = EINVAL; } (void) splx(s); - return (error); + return error; } /* * Macro to calculate a new address within shared memory when given an offset - * from an address, taking into account ring-wrap. + * from an address, taking into account ring-wrap. */ #define ringoffset(sc, start, off, type) \ ((type)( ((caddr_t)(start)+(off) >= (sc)->mem_end) ? \ @@ -1970,21 +1875,22 @@ ed_ioctl(ifp, command, data) /* * Retreive packet from shared memory and send to the next level up via - * ether_input(). If there is a BPF listener, give a copy to BPF, too. + * ether_input(). If there is a BPF listener, give a copy to BPF, too. */ +void ed_get_packet(sc, buf, len) struct ed_softc *sc; - char *buf; + caddr_t buf; u_short len; { struct ether_header *eh; - struct mbuf *m, *head, *ed_ring_to_mbuf(); + struct mbuf *m, *head = 0, *ed_ring_to_mbuf(); u_short off; int resid; u_short etype; struct trailer_header trailer_header; - /* Allocate a header mbuf */ + /* Allocate a header mbuf. */ MGETHDR(m, M_DONTWAIT, MT_DATA); if (m == 0) goto bad; @@ -1993,13 +1899,13 @@ ed_get_packet(sc, buf, len) m->m_len = 0; head = m; - /* The following sillines is to make NFS happy */ + /* The following sillines is to make NFS happy. */ #define EROUND ((sizeof(struct ether_header) + 3) & ~3) #define EOFF (EROUND - sizeof(struct ether_header)) /* - * The following assumes there is room for - * the ether header in the header mbuf + * The following assumes there is room for the ether header in the + * header mbuf. */ head->m_data += EOFF; eh = mtod(head, struct ether_header *); @@ -2007,8 +1913,8 @@ ed_get_packet(sc, buf, len) if (sc->mem_shared) bcopy(buf, mtod(head, caddr_t), sizeof(struct ether_header)); else - ed_pio_readmem(sc, buf, mtod(head, caddr_t), - sizeof(struct ether_header)); + ed_pio_readmem(sc, (u_short)buf, mtod(head, caddr_t), + sizeof(struct ether_header)); buf += sizeof(struct ether_header); head->m_len += sizeof(struct ether_header); len -= sizeof(struct ether_header); @@ -2017,11 +1923,10 @@ ed_get_packet(sc, buf, len) /* * Deal with trailer protocol: - * If trailer protocol, calculate the datasize as 'off', - * which is also the offset to the trailer header. - * Set resid to the amount of packet data following the - * trailer header. - * Finally, copy residual data into mbuf chain. + * If trailer protocol, calculate the datasize as 'off', which is also + * the offset to the trailer header. Set resid to the amount of packet + * data following the trailer header. Finally, copy residual data into + * mbuf chain. */ if (etype >= ETHERTYPE_TRAIL && etype < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { @@ -2031,8 +1936,8 @@ ed_get_packet(sc, buf, len) /* * If we have shared memory, we can get info directly from the - * stored packet, otherwise we must get a local copy - * of the trailer header using PIO. + * stored packet, otherwise we must get a local copy of the + * trailer header using PIO. */ if (sc->mem_shared) { eh->ether_type = *ringoffset(sc, buf, off, u_short *); @@ -2040,9 +1945,8 @@ ed_get_packet(sc, buf, len) } else { struct trailer_header trailer_header; ed_pio_readmem(sc, - ringoffset(sc, buf, off, caddr_t), - (char *) &trailer_header, - sizeof(trailer_header)); + (u_short)ringoffset(sc, buf, off, caddr_t), + (caddr_t) &trailer_header, sizeof(trailer_header)); eh->ether_type = trailer_header.ether_type; resid = trailer_header.ether_residual; } @@ -2054,7 +1958,8 @@ ed_get_packet(sc, buf, len) if (resid < 0) goto bad; /* insanity */ - m = ed_ring_to_mbuf(sc, ringoffset(sc, buf, off+4, char *), head, resid); + m = ed_ring_to_mbuf(sc, ringoffset(sc, buf, off+4, caddr_t), + head, resid); if (m == 0) goto bad; @@ -2063,16 +1968,16 @@ ed_get_packet(sc, buf, len) } /* - * Pull packet off interface. Or if this was a trailer packet, - * the data portion is appended. + * Pull packet off interface. Or if this was a trailer packet, the + * data portion is appended. */ m = ed_ring_to_mbuf(sc, buf, m, len); if (m == 0) goto bad; #if NBPFILTER > 0 /* - * Check if there's a BPF listener on this interface. - * If so, hand off the raw packet to bpf. + * Check if there's a BPF listener on this interface. If so, hand off + * the raw packet to bpf. */ if (sc->bpf) { bpf_mtap(sc->bpf, head); @@ -2085,18 +1990,14 @@ ed_get_packet(sc, buf, len) if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) && (eh->ether_dhost[0] & 1) == 0 && bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr, - sizeof(eh->ether_dhost)) != 0 && - bcmp(eh->ether_dhost, etherbroadcastaddr, - sizeof(eh->ether_dhost)) != 0) { + sizeof(eh->ether_dhost)) != 0) { m_freem(head); return; } } #endif - /* - * Fix up data start offset in mbuf to point past ether header - */ + /* Fix up data start offset in mbuf to point past ether header. */ m_adj(head, sizeof(struct ether_header)); ether_input(&sc->arpcom.ac_if, eh, head); return; @@ -2107,242 +2008,222 @@ bad: if (head) } /* - * Supporting routines + * Supporting routines. */ /* - * Given a NIC memory source address and a host memory destination - * address, copy 'amount' from NIC to host using Programmed I/O. - * The 'amount' is rounded up to a word - okay as long as mbufs - * are word sized. - * This routine is currently Novell-specific. + * Given a NIC memory source address and a host memory destination address, + * copy 'amount' from NIC to host using Programmed I/O. The 'amount' is + * rounded up to a word - okay as long as mbufs are word sized. + * This routine is currently Novell-specific. */ void -ed_pio_readmem(sc,src,dst,amount) - struct ed_softc *sc; - unsigned short src; - unsigned char *dst; - unsigned short amount; +ed_pio_readmem(sc, src, dst, amount) + struct ed_softc *sc; + u_short src; + caddr_t dst; + u_short amount; { - unsigned short tmp_amount; + u_short tmp_amount; - /* select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + /* Select page 0 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); - /* round up to a word */ + /* Round up to a word. */ tmp_amount = amount; - if (amount & 1) ++amount; + if (amount & 1) + ++amount; - /* set up DMA byte count */ + /* Set up DMA byte count. */ outb(sc->nic_addr + ED_P0_RBCR0, amount); outb(sc->nic_addr + ED_P0_RBCR1, amount>>8); - /* set up source address in NIC mem */ + /* Set up source address in NIC mem. */ outb(sc->nic_addr + ED_P0_RSAR0, src); outb(sc->nic_addr + ED_P0_RSAR1, src>>8); outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA); - if (sc->isa16bit) { + if (sc->isa16bit) insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount/2); - } else + else insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount); } /* - * Stripped down routine for writing a linear buffer to NIC memory. - * Only used in the probe routine to test the memory. 'len' must - * be even. + * Stripped down routine for writing a linear buffer to NIC memory. Only used + * in the probe routine to test the memory. 'len' must be even. */ void -ed_pio_writemem(sc,src,dst,len) +ed_pio_writemem(sc, src, dst, len) struct ed_softc *sc; - char *src; - unsigned short dst; - unsigned short len; + caddr_t src; + u_short dst; + u_short len; { - int maxwait=100; /* about 120us */ + int maxwait = 100; /* about 120us */ - /* select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + /* Select page 0 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); - /* reset remote DMA complete flag */ + /* Reset remote DMA complete flag. */ outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); - /* set up DMA byte count */ + /* Set up DMA byte count. */ outb(sc->nic_addr + ED_P0_RBCR0, len); outb(sc->nic_addr + ED_P0_RBCR1, len>>8); - /* set up destination address in NIC mem */ + /* Set up destination address in NIC mem. */ outb(sc->nic_addr + ED_P0_RSAR0, dst); outb(sc->nic_addr + ED_P0_RSAR1, dst>>8); - /* set remote DMA write */ + /* Set remote DMA write. */ outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); if (sc->isa16bit) outsw(sc->asic_addr + ED_NOVELL_DATA, src, len/2); else outsb(sc->asic_addr + ED_NOVELL_DATA, src, len); + /* - * Wait for remote DMA complete. This is necessary because on the - * transmit side, data is handled internally by the NIC in bursts - * and we can't start another remote DMA until this one completes. - * Not waiting causes really bad things to happen - like the NIC - * irrecoverably jamming the ISA bus. + * Wait for remote DMA complete. This is necessary because on the + * transmit side, data is handled internally by the NIC in bursts and + * we can't start another remote DMA until this one completes. Not + * waiting causes really bad things to happen - like the NIC + * irrecoverably jamming the ISA bus. */ while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); } /* - * Write an mbuf chain to the destination NIC memory address using - * programmed I/O. + * Write an mbuf chain to the destination NIC memory address using programmed + * I/O. */ u_short -ed_pio_write_mbufs(sc,m,dst) +ed_pio_write_mbufs(sc, m, dst) struct ed_softc *sc; struct mbuf *m; - unsigned short dst; + u_short dst; { - unsigned short len, mb_offset; + u_short len, mb_offset; struct mbuf *mp; - unsigned char residual[2]; - int maxwait=100; /* about 120us */ + u_char residual[2]; + int maxwait = 100; /* about 120us */ -#ifdef notyet -#ifdef DEBUG - /* First, count up the total number of bytes to copy */ + /* First, count up the total number of bytes to copy. */ for (len = 0, mp = m; mp; mp = mp->m_next) len += mp->m_len; - if (len != m->m_pkthdr.len) { - int i; - printf("calculated len %d != packet header len %d, data:\n", - len, m->m_pkthdr.len); - mp = m; - while (m) { - for (i = 0; i < m->m_len; i++) - printf(" %02x", m->m_data[i]); - m = m->m_next; - } - } -#else - len = m->m_pkthdr.len; -#endif -#else - /* First, count up the total number of bytes to copy */ - for (len = 0, mp = m; mp; mp = mp->m_next) - len += mp->m_len; -#endif - /* select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + /* Select page 0 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); - /* reset remote DMA complete flag */ + /* Reset remote DMA complete flag. */ outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); - /* set up DMA byte count */ + /* Set up DMA byte count. */ outb(sc->nic_addr + ED_P0_RBCR0, len); outb(sc->nic_addr + ED_P0_RBCR1, len>>8); - /* set up destination address in NIC mem */ + /* Set up destination address in NIC mem. */ outb(sc->nic_addr + ED_P0_RSAR0, dst); outb(sc->nic_addr + ED_P0_RSAR1, dst>>8); - /* set remote DMA write */ + /* Set remote DMA write. */ outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); mb_offset = 0; /* * Transfer the mbuf chain to the NIC memory. - * The following code isn't too pretty. The problem is that we can only - * transfer words to the board, and if an mbuf has an odd number - * of bytes in it, this is a problem. It's not a simple matter of - * just removing a byte from the next mbuf (adjusting data++ and - * len--) because this will hose-over the mbuf chain which might - * be needed later for BPF. Instead, we maintain an offset - * (mb_offset) which let's us skip over the first byte in the - * following mbuf. + * The following code isn't too pretty. The problem is that we can + * only transfer words to the board, and if an mbuf has an odd number + * of bytes in it, this is a problem. It's not a simple matter of just + * removing a byte from the next mbuf (adjusting data++ and len--) + * because this will hose-over the mbuf chain which might be needed + * later for BPF. Instead, we maintain an offset (mb_offset) which + * let's us skip over the first byte in the following mbuf. */ while (m) { if (m->m_len - mb_offset) { if (sc->isa16bit) { if ((m->m_len - mb_offset) > 1) outsw(sc->asic_addr + ED_NOVELL_DATA, - mtod(m, caddr_t) + mb_offset, - (m->m_len - mb_offset) / 2); + mtod(m, caddr_t) + mb_offset, + (m->m_len - mb_offset) / 2); /* * if odd number of bytes, get the odd byte from * the next mbuf with data */ if ((m->m_len - mb_offset) & 1) { - /* first the last byte in current mbuf */ - residual[0] = *(mtod(m, caddr_t) - + m->m_len - 1); + /* First the last byte in current mbuf */ + residual[0] = *(mtod(m, caddr_t) + + m->m_len - 1); - /* advance past any empty mbufs */ - while (m->m_next && (m->m_next->m_len == 0)) + /* Advance past any empty mbufs. */ + while (m->m_next && + (m->m_next->m_len == 0)) m = m->m_next; if (m->m_next) { - /* remove first byte in next mbuf */ - residual[1] = *(mtod(m->m_next, caddr_t)); + /* Remove first byte in next mbuf. */ + residual[1] = *(mtod(m->m_next, + caddr_t)); mb_offset = 1; } outw(sc->asic_addr + ED_NOVELL_DATA, - *((unsigned short *) residual)); + *((u_short *) residual)); } else mb_offset = 0; } else - outsb(sc->asic_addr + ED_NOVELL_DATA, m->m_data, m->m_len); - + outsb(sc->asic_addr + ED_NOVELL_DATA, + m->m_data, m->m_len); } m = m->m_next; } /* - * Wait for remote DMA complete. This is necessary because on the - * transmit side, data is handled internally by the NIC in bursts - * and we can't start another remote DMA until this one completes. - * Not waiting causes really bad things to happen - like the NIC - * irrecoverably jamming the ISA bus. + * Wait for remote DMA complete. This is necessary because on the + * transmit side, data is handled internally by the NIC in bursts and + * we can't start another remote DMA until this one completes. Not + * waiting causes really bad things to happen - like the NIC + * irrecoverably jamming the ISA bus. */ while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); if (!maxwait) { - log(LOG_WARNING, "ed%d: remote transmit DMA failed to complete\n", - sc->arpcom.ac_if.if_unit); - ed_reset(sc->arpcom.ac_if.if_unit); + log(LOG_WARNING, + "ed%d: remote transmit DMA failed to complete\n", + sc->arpcom.ac_if.if_unit); + ed_reset(sc); } - return(len); + return len; } /* - * Given a source and destination address, copy 'amount' of a packet from - * the ring buffer into a linear destination buffer. Takes into account - * ring-wrap. + * Given a source and destination address, copy 'amount' of a packet from the + * ring buffer into a linear destination buffer. Takes into account ring-wrap. */ static inline char * -ed_ring_copy(sc,src,dst,amount) +ed_ring_copy(sc, src, dst, amount) struct ed_softc *sc; - char *src; - char *dst; + char *src; + char *dst; u_short amount; { u_short tmp_amount; - /* does copy wrap to lower addr in ring buffer? */ + /* Does copy wrap to lower addr in ring buffer? */ if (src + amount > sc->mem_end) { tmp_amount = sc->mem_end - src; - /* copy amount up to end of NIC memory */ + /* Copy amount up to end of NIC memory. */ if (sc->mem_shared) - bcopy(src,dst,tmp_amount); + bcopy(src, dst, tmp_amount); else - ed_pio_readmem(sc,src,dst,tmp_amount); + ed_pio_readmem(sc, (u_short)src, dst, tmp_amount); amount -= tmp_amount; src = sc->mem_ring; @@ -2352,24 +2233,23 @@ ed_ring_copy(sc,src,dst,amount) if (sc->mem_shared) bcopy(src, dst, amount); else - ed_pio_readmem(sc, src, dst, amount); + ed_pio_readmem(sc, (u_short)src, dst, amount); - return(src + amount); + return src + amount; } /* - * Copy data from receive buffer to end of mbuf chain - * allocate additional mbufs as needed. return pointer - * to last mbuf in chain. + * Copy data from receive buffer to end of mbuf chain allocate additional mbufs + * as needed. Return pointer to last mbuf in chain. * sc = ed info (softc) * src = pointer in ed ring buffer * dst = pointer to last mbuf in mbuf chain to copy to * amount = amount of data to copy */ struct mbuf * -ed_ring_to_mbuf(sc,src,dst,total_len) +ed_ring_to_mbuf(sc, src, dst, total_len) struct ed_softc *sc; - char *src; + caddr_t src; struct mbuf *dst; u_short total_len; { @@ -2378,22 +2258,24 @@ ed_ring_to_mbuf(sc,src,dst,total_len) while (total_len) { register u_short amount = min(total_len, M_TRAILINGSPACE(m)); - if (amount == 0) { /* no more data in this mbuf, alloc another */ + if (amount == 0) { /* + * No more data in this mbuf; alloc another. + * * If there is enough data for an mbuf cluster, attempt - * to allocate one of those, otherwise, a regular - * mbuf will do. + * to allocate one of those, otherwise, a regular mbuf + * will do. * Note that a regular mbuf is always required, even if - * we get a cluster - getting a cluster does not - * allocate any mbufs, and one is needed to assign - * the cluster to. The mbuf that has a cluster - * extension can not be used to contain data - only - * the cluster can contain data. + * we get a cluster - getting a cluster does not + * allocate any mbufs, and one is needed to assign the + * cluster to. The mbuf that has a cluster extension + * can not be used to contain data - only the cluster + * can contain data. */ dst = m; MGET(m, M_DONTWAIT, MT_DATA); if (m == 0) - return (0); + return 0; if (total_len >= MINCLSIZE) MCLGET(m, M_DONTWAIT); @@ -2403,17 +2285,18 @@ ed_ring_to_mbuf(sc,src,dst,total_len) amount = min(total_len, M_TRAILINGSPACE(m)); } - src = ed_ring_copy(sc, src, mtod(m, caddr_t) + m->m_len, amount); + src = ed_ring_copy(sc, src, mtod(m, caddr_t) + m->m_len, + amount); m->m_len += amount; total_len -= amount; } - return (m); + return m; } /* - * Compute crc for ethernet address + * Compute crc for ethernet address. */ u_long ds_crc(ep) @@ -2423,7 +2306,7 @@ ds_crc(ep) register u_long crc = 0xffffffffL; register int carry, i, j; register u_char b; - + for (i = 6; --i >= 0; ) { b = *ep++; for (j = 8; --j >= 0; ) { @@ -2439,8 +2322,8 @@ ds_crc(ep) } /* - * Compute the multicast address filter from the - * list of multicast addresses we need to listen to. + * Compute the multicast address filter from the list of multicast addresses we + * need to listen to. */ void ds_getmcaf(sc, mcaf) @@ -2451,10 +2334,10 @@ ds_getmcaf(sc, mcaf) register u_char *af = (u_char*)mcaf; register struct ether_multi *enm; register struct ether_multistep step; - + mcaf[0] = 0; mcaf[1] = 0; - + ETHER_FIRST_MULTI(step, &sc->arpcom, enm); while (enm != NULL) { if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { @@ -2462,10 +2345,9 @@ ds_getmcaf(sc, mcaf) mcaf[1] = 0xffffffff; return; } - index = ds_crc(enm->enm_addrlo, 6) >> 26; + index = ds_crc(enm->enm_addrlo) >> 26; af[index >> 3] |= 1 << (index & 7); - + ETHER_NEXT_MULTI(step, enm); } } -#endif diff --git a/sys/arch/i386/isa/if_edreg.h b/sys/arch/i386/isa/if_edreg.h index 7b85344e6e27..c54a28e33c6c 100644 --- a/sys/arch/i386/isa/if_edreg.h +++ b/sys/arch/i386/isa/if_edreg.h @@ -1,35 +1,7 @@ /* * National Semiconductor DS8390 NIC register definitions * - * $Id: if_edreg.h,v 1.5 1993/10/01 02:01:46 davidg Exp $ - * - * Modification history - * - * Revision 2.0 93/09/29 00:37:15 davidg - * changed double buffering flag to multi buffering - * made changes/additions for 3c503 multi-buffering - * ...companion to Rev. 2.0 of 'ed' driver. - * - * Revision 1.6 93/09/28 17:20:03 davidg - * first cut at PIO (e.g. NE1000/2000) support - * - * Revision 1.5 93/08/25 20:38:34 davidg - * added define for card type WD8013WC (10BaseT) - * - * Revision 1.4 93/08/14 20:07:55 davidg - * fix board type definition for 8013EP - * - * Revision 1.3 93/07/20 15:25:25 davidg - * added config flags for forcing 8/16bit mode and disabling double - * xmit buffers. - * - * Revision 1.2 93/06/23 03:03:05 davidg - * added some additional definitions for the 83C584 bus interface - * chip (SMC/WD boards) - * - * Revision 1.1 93/06/23 03:01:07 davidg - * Initial revision - * + * $Id: if_edreg.h,v 1.6 1994/02/12 07:16:33 mycroft Exp $ */ /* @@ -614,6 +586,11 @@ struct ed_ring { #define ED_WD_MSR_ADDR 0x3f /* Memory decode bits 18-13 */ #define ED_WD_MSR_MENB 0x40 /* Memory enable */ #define ED_WD_MSR_RST 0x80 /* Reset board */ +#ifdef TOSH_ETHER +#define ED_WD_MSR_POW 0x02 /* 0 = power save, 1 = normal (R/W) */ +#define ED_WD_MSR_BSY 0x04 /* gate array busy (R) */ +#define ED_WD_MSR_LEN 0x20 /* 0 = 16-bit, 1 = 8-bit (R/W) */ +#endif /* * Interface Configuration Register (ICR) @@ -628,6 +605,14 @@ struct ed_ring { #define ED_WD_ICR_RX7 0x20 /* recall all but i/o and LAN address */ #define ED_WD_ICR_RIO 0x40 /* recall i/o address */ #define ED_WD_ICR_STO 0x80 /* store to non-volatile memory */ +#ifdef TOSH_ETHER +#define ED_WD_ICR_MEM 0xe0 /* shared mem address A15-A13 (R/W) */ +#define ED_WD_ICR_MSZ1 0x0f /* memory size, 0x08 = 64K, 0x04 = 32K, + 0x02 = 16K, 0x01 = 8K */ + /* 64K can only be used if mem address + above 1MB */ + /* IAR holds address A23-A16 (R/W) */ +#endif /* * IO Address Register (IAR) @@ -687,10 +672,17 @@ struct ed_ring { #define ED_TYPE_WD8003S 0x02 #define ED_TYPE_WD8003E 0x03 #define ED_TYPE_WD8013EBT 0x05 +#define ED_TYPE_TOSHIBA1 0x11 /* named PCETA1 */ +#define ED_TYPE_TOSHIBA2 0x12 /* named PCETA2 */ +#define ED_TYPE_TOSHIBA3 0x13 /* named PCETB */ +#define ED_TYPE_TOSHIBA4 0x14 /* named PCETC */ +#define ED_TYPE_WD8013W 0x26 #define ED_TYPE_WD8013EP 0x27 #define ED_TYPE_WD8013WC 0x28 #define ED_TYPE_WD8013EBP 0x2c #define ED_TYPE_WD8013EPC 0x29 +#define ED_TYPE_SMC8216T 0x2a +#define ED_TYPE_SMC8216C 0x2b /* Bit definitions in card ID */ #define ED_WD_REV_MASK 0x1f /* Revision mask */ @@ -701,7 +693,11 @@ struct ed_ring { /* * Checksum total. All 8 bytes in station address PROM will add up to this */ +#ifdef TOSH_ETHER +#define ED_WD_ROM_CHECKSUM_TOTAL 0xA5 +#else #define ED_WD_ROM_CHECKSUM_TOTAL 0xFF +#endif #define ED_WD_NIC_OFFSET 0x10 /* I/O base offset to NIC */ #define ED_WD_ASIC_OFFSET 0 /* I/O base offset to ASIC */ diff --git a/sys/dev/isa/if_ed.c b/sys/dev/isa/if_ed.c index dcbadc377f49..61a3a75d1195 100644 --- a/sys/dev/isa/if_ed.c +++ b/sys/dev/isa/if_ed.c @@ -1,92 +1,24 @@ /* * Device driver for National Semiconductor DS8390/WD83C690 based ethernet - * adapters. By David Greenman, 29-April-1993 + * adapters. By David Greenman, 29-April-1993 * - * Copyright (C) 1993, David Greenman. This software may be used, modified, - * copied, distributed, and sold, in both source and binary form provided - * that the above copyright and these terms are retained. Under no - * circumstances is the author responsible for the proper functioning - * of this software, nor does the author assume any responsibility - * for damages incurred with its use. + * Copyright (C) 1993, David Greenman. This software may be used, modified, + * copied, distributed, and sold, in both source and binary form provided that + * the above copyright and these terms are retained. Under no circumstances is + * the author responsible for the proper functioning of this software, nor does + * the author assume any responsibility for damages incurred with its use. * - * Currently supports the Western Digital/SMC 8003 and 8013 series, - * the 3Com 3c503, the NE1000 and NE2000, and a variety of similar - * clones. + * Currently supports the Western Digital/SMC 8003 and 8013 series, the 3Com + * 3c503, the NE1000 and NE2000, and a variety of similar clones. * * Thanks to Charles Hannum for proving to me with example code that the - * NE1000/2000 support could be added with minimal impact. Without - * this, I wouldn't have proceeded in this direction. - * + * NE1000/2000 support could be added with minimal impact. Without this, I + * wouldn't have proceeded in this direction. + * + * $Id: if_ed.c,v 1.23 1994/02/12 07:16:24 mycroft Exp $ */ -/* - * $Id: if_ed.c,v 1.22 1994/02/10 17:17:56 mycroft Exp $ - */ - -/* - * Modification history - * - * Revision 2.11 1993/10/23 04:21:03 davidg - * Novell probe changed to be invasive because of too many complaints - * about some clone boards not being reset properly and thus not - * found on a warmboot. Yuck. - * - * Revision 2.10 1993/10/23 04:07:12 davidg - * increment output errors if the device times out (done via watchdog) - * - * Revision 2.9 1993/10/23 04:01:45 davidg - * increment input error counter if a packet with a bad length is - * detected. - * - * Revision 2.8 1993/10/15 10:59:56 davidg - * increase maximum time to wait for transmit DMA to complete to 120us. - * call ed_reset() if the time limit is reached instead of trying - * to abort the remote DMA. - * - * Revision 2.7 1993/10/15 10:49:10 davidg - * minor change to way the mbuf pointer temp variable is assigned in - * ed_start (slightly improves code readability) - * - * Revision 2.6 93/10/02 01:12:20 davidg - * use ETHER_ADDR_LEN in NE probe rather than '6'. - * - * Revision 2.5 93/09/30 17:44:14 davidg - * patch from vak@zebub.msk.su (Serge V.Vakulenko) to work around - * a hardware bug in cheap WD clone boards where the PROM checksum - * byte is always zero - * - * Revision 2.4 93/09/29 21:24:30 davidg - * Added software NIC reset in NE probe to work around a problem - * with some NE boards where the 8390 doesn't reset properly on - * power-up. Remove initialization of IMR/ISR in the NE probe - * because this is inherent in the reset. - * - * Revision 2.3 93/09/29 15:10:16 davidg - * credit Charles Hannum - * - * Revision 2.2 93/09/29 13:23:25 davidg - * added no multi-buffer override for 3c503 - * - * Revision 2.1 93/09/29 12:32:12 davidg - * changed multi-buffer count for 16bit 3c503's from 5 to 2 after - * noticing that the transmitter becomes idle because of so many - * packets to load. - * - * Revision 2.0 93/09/29 00:00:19 davidg - * many changes, rewrites, additions, etc. Now supports the - * NE1000, NE2000, WD8003, WD8013, 3C503, 16bit 3C503, and - * a variety of similar clones. 16bit 3c503 now does multi - * transmit buffers. Nearly every part of the driver has - * changed in some way since rev 1.30. - * - * Revision 1.1 93/06/14 22:21:24 davidg - * Beta release of device driver for SMC/WD80x3 and 3C503 ethernet boards. - * - */ - #include "ed.h" -#if NED > 0 -/* bpfilter included here in case it is needed in future net includes */ #include "bpfilter.h" #include @@ -120,6 +52,7 @@ #include #endif +#include #include #include @@ -127,7 +60,7 @@ #include #include -/* For backwards compatibility */ +/* for backwards compatibility */ #ifndef IFF_ALTPHYS #define IFF_ALTPHYS IFF_LINK0 #endif @@ -147,10 +80,12 @@ struct ed_softc { /* * The following 'proto' variable is part of a work-around for 8013EBT asics - * being write-only. It's sort of a prototype/shadow of the real thing. + * being write-only. It's sort of a prototype/shadow of the real thing. */ u_char wd_laar_proto; + u_char ed_cr_rd2; /* ED_CR_RD2 if not 790; 0 if 790 */ u_char isa16bit; /* width of access to card 0=8 or 1=16 */ + u_char is790; /* set by probe if NIC is a 790 */ caddr_t bpf; /* BPF "magic cookie" */ caddr_t mem_start; /* NIC memory start address */ @@ -172,20 +107,30 @@ struct ed_softc { u_char next_packet; /* pointer to next unread RX packet */ } ed_softc[NED]; -int ed_attach(), ed_init(), edintr(), ed_ioctl(), ed_probe(), - ed_start(), ed_reset(), ed_watchdog(); -void ds_getmcaf(); +int ed_probe __P((struct isa_device *)); +int ed_attach __P((struct isa_device *)); +int edintr __P((int)); +int ed_ioctl __P((struct ifnet *, int, caddr_t)); +void ed_start __P((struct ifnet *)); +void ed_watchdog __P((short)); +void ed_reset __P((struct ed_softc *)); +void ed_init __P((struct ed_softc *)); +void ed_stop __P((struct ed_softc *)); -static void ed_stop(); +u_long ds_crc __P((u_char *)); +void ds_getmcaf __P((struct ed_softc *, u_long *)); -static inline void ed_rint(); -static inline void ed_xmit(); -static inline char *ed_ring_copy(); +#define inline /* XXX for debugging porpoises */ -void ed_pio_readmem(), ed_pio_writemem(); -u_short ed_pio_write_mbufs(); +void ed_get_packet __P((/* struct ed_softc *, caddr_t, u_short */)); +static inline void ed_rint __P((struct ed_softc *)); +static inline void ed_xmit __P((struct ifnet *)); +static inline caddr_t ed_ring_copy __P((/* struct ed_Softc *, caddr_t, caddr_t, + u_short */)); -extern int ether_output(); +void ed_pio_readmem __P((/* struct ed_softc *, u_short, caddr_t, u_short */)); +void ed_pio_writemem __P((/* struct ed_softc *, caddr_t, u_short, u_short */)); +u_short ed_pio_write_mbufs __P((/* struct ed_softc *, struct mbuf *, u_short */)); struct trailer_header { u_short ether_type; @@ -197,11 +142,12 @@ struct isa_driver eddriver = { ed_attach, "ed" }; + /* - * Interrupt conversion table for WD/SMC ASIC - * (IRQ* are defined in icu.h) + * Interrupt conversion table for WD/SMC ASIC. + * (IRQ* are defined in icu.h.) */ -static unsigned short ed_intr_mask[] = { +static u_short ed_intr_mask[] = { IRQ9, IRQ3, IRQ5, @@ -211,20 +157,24 @@ static unsigned short ed_intr_mask[] = { IRQ15, IRQ4 }; + +static u_short ed_790_intr_mask[] = { + 0, + IRQ9, + IRQ3, + IRQ4, + IRQ5, + IRQ10, + IRQ11, + IRQ15 +}; #define ETHER_MIN_LEN 64 #define ETHER_MAX_LEN 1518 #define ETHER_ADDR_LEN 6 -#define ETHER_HDR_SIZE 14 /* - * Determine if the device is present - * - * on entry: - * a pointer to an isa_device struct - * on exit: - * NULL if device not found - * or # of i/o addresses used (if found) + * Determine if the device is present. */ int ed_probe(isa_dev) @@ -234,23 +184,22 @@ ed_probe(isa_dev) int nports; if (nports = ed_probe_WD80x3(isa_dev)) - return (nports); + return nports; if (nports = ed_probe_3Com(isa_dev)) - return (nports); + return nports; if (nports = ed_probe_Novell(isa_dev)) - return (nports); + return nports; return 0; } /* - * Generic probe routine for testing for the existance of a DS8390. - * Must be called after the NIC has just been reset. This routine - * works by looking at certain register values that are gauranteed - * to be initialized a certain way after power-up or reset. Seems - * not to currently work on the 83C690. + * Generic probe routine for testing for the existance of a DS8390. Must be + * called after the NIC has just been reset. This routine works by looking at + * certain register values that are gauranteed to be initialized a certain way + * after power-up or reset. Seems not to currently work on the 83C690. * * Specifically: * @@ -261,9 +210,9 @@ ed_probe(isa_dev) * Data Control (DCR) LAS * Transmit Config. (TCR) LB1, LB0 * - * We only look at the CR and ISR registers, however, because looking at - * the others would require changing register pages (which would be - * intrusive if this isn't an 8390). + * We only look at the CR and ISR registers, however, because looking at the + * others would require changing register pages (which would be intrusive if + * this isn't an 8390). * * Return 1 if 8390 was found, 0 if not. */ @@ -273,17 +222,17 @@ ed_probe_generic8390(sc) struct ed_softc *sc; { if ((inb(sc->nic_addr + ED_P0_CR) & - (ED_CR_RD2|ED_CR_TXP|ED_CR_STA|ED_CR_STP)) != - (ED_CR_RD2|ED_CR_STP)) - return (0); + (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != + (ED_CR_RD2 | ED_CR_STP)) + return 0; if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST) - return (0); + return 0; - return(1); + return 1; } /* - * Probe and vendor-specific initialization routine for SMC/WD80x3 boards + * Probe and vendor-specific initialization routine for SMC/WD80x3 boards. */ int ed_probe_WD80x3(isa_dev) @@ -296,40 +245,49 @@ ed_probe_WD80x3(isa_dev) sc->asic_addr = isa_dev->id_iobase; sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET; + sc->is790 = 0; + +#ifdef TOSH_ETHER + outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_POW); + DELAY(10000); +#endif /* - * Attempt to do a checksum over the station address PROM. - * If it fails, it's probably not a SMC/WD board. There - * is a problem with this, though: some clone WD boards - * don't pass the checksum test. Danpex boards for one. + * Attempt to do a checksum over the station address PROM. If it + * fails, it's probably not a SMC/WD board. There is a problem with + * this, though: some clone WD boards don't pass the checksum test. + * Danpex boards for one. */ for (sum = 0, i = 0; i < 8; ++i) sum += inb(sc->asic_addr + ED_WD_PROM + i); if (sum != ED_WD_ROM_CHECKSUM_TOTAL) { /* - * Checksum is invalid. This often happens with cheap - * WD8003E clones. In this case, the checksum byte - * (the eighth byte) seems to always be zero. + * Checksum is invalid. This often happens with cheap WD8003E + * clones. In this case, the checksum byte (the eighth byte) + * seems to always be zero. */ if (inb(sc->asic_addr + ED_WD_CARD_ID) != ED_TYPE_WD8003E || - inb(sc->asic_addr + ED_WD_PROM + 7) != 0) - return(0); + inb(sc->asic_addr + ED_WD_PROM + 7) != 0) + return 0; } - /* reset card to force it into a known state. */ + /* Reset card to force it into a known state. */ +#ifdef TOSH_ETHER + outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW); +#else outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST); +#endif DELAY(100); - outb(sc->asic_addr + ED_WD_MSR, inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST); - /* wait in the case this card is reading it's EEROM */ + outb(sc->asic_addr + ED_WD_MSR, + inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST); + /* Wait in the case this card is reading it's EEROM. */ DELAY(5000); sc->vendor = ED_VENDOR_WD_SMC; sc->type = inb(sc->asic_addr + ED_WD_CARD_ID); - /* - * Set initial values for width/size. - */ + /* Set initial values for width/size. */ switch (sc->type) { case ED_TYPE_WD8003S: sc->type_str = "WD8003S"; @@ -346,9 +304,13 @@ ed_probe_WD80x3(isa_dev) memsize = 16384; isa16bit = 1; break; + case ED_TYPE_WD8013W: + sc->type_str = "WD8013W"; + memsize = 16384; + isa16bit = 1; + break; case ED_TYPE_WD8013EP: /* also WD8003EP */ - if (inb(sc->asic_addr + ED_WD_ICR) - & ED_WD_ICR_16BIT) { + if (inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) { isa16bit = 1; memsize = 16384; sc->type_str = "WD8013EP"; @@ -373,36 +335,62 @@ ed_probe_WD80x3(isa_dev) memsize = 16384; isa16bit = 1; break; + case ED_TYPE_SMC8216C: + sc->type_str = "SMC8216/SMC8216C"; + memsize = 16384; + isa16bit = 1; + sc->is790 = 1; + break; + case ED_TYPE_SMC8216T: + sc->type_str = "SMC8216T"; + memsize = 16384; + isa16bit = 1; + sc->is790 = 1; + break; +#ifdef TOSH_ETHER + case ED_TYPE_TOSHIBA1: + sc->type_str = "Toshiba1"; + memsize = 32768; + isa16bit = 1; + break; + case ED_TYPE_TOSHIBA4: + sc->type_str = "Toshiba4"; + memsize = 32768; + isa16bit = 1; + break; +#endif default: - sc->type_str = ""; + sc->type_str = NULL; memsize = 8192; isa16bit = 0; break; } /* - * Make some adjustments to initial values depending on what is - * found in the ICR. + * Make some adjustments to initial values depending on what is found + * in the ICR. */ - if (isa16bit && (sc->type != ED_TYPE_WD8013EBT) - && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) { + if (isa16bit && (sc->type != ED_TYPE_WD8013EBT) && +#ifdef TOSH_ETHER + (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4) && +#endif + ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) { isa16bit = 0; memsize = 8192; } -#if ED_DEBUG - printf("type=%s isa16bit=%d memsize=%d id_msize=%d\n", - sc->type_str,isa16bit,memsize,isa_dev->id_msize); - for (i=0; i<8; i++) +#ifdef ED_DEBUG + printf("type=%x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n", + sc->type, sc->type_str ?: "unknown", isa16bit, memsize, + isa_dev->id_msize); + for (i = 0; i < 8; i++) printf("%x -> %x\n", i, inb(sc->asic_addr + i)); #endif - /* - * Allow the user to override the autoconfiguration - */ + /* Allow the user to override the autoconfiguration. */ if (isa_dev->id_msize) memsize = isa_dev->id_msize; /* - * (note that if the user specifies both of the following flags - * that '8bit' mode intentionally has precedence) + * (Note that if the user specifies both of the following flags that + * '8-bit' mode intentionally has precedence.) */ if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE) isa16bit = 1; @@ -411,29 +399,47 @@ ed_probe_WD80x3(isa_dev) /* * Check 83C584 interrupt configuration register if this board has one - * XXX - we could also check the IO address register. But why - * bother...if we get past this, it *has* to be correct. + * XXX - We could also check the IO address register. But why + * bother... if we get past this, it *has* to be correct. */ - if (sc->type & ED_WD_SOFTCONFIG) { + if (sc->is790) { + sc->ed_cr_rd2 = 0; + /* Assemble together the encoded interrupt number. */ + outb(isa_dev->id_iobase + 0x04, inb(isa_dev->id_iobase + 0x04) + | 0x80); + iptr = ((inb(isa_dev->id_iobase + 0x0d) & 0x0c) >> 2) | + ((inb(isa_dev->id_iobase + 0x0d) & 0x40) >> 4); + outb(isa_dev->id_iobase + 0x04, inb(isa_dev->id_iobase + 0x04) + & ~0x80); /* - * Assemble together the encoded interrupt number. + * Translate it using translation table, and check for + * correctness. */ + if (ed_790_intr_mask[iptr] != isa_dev->id_irq) { + printf("ed%d: kernel configured irq %d doesn't match board configured irq %d\n", + isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, + ffs(ed_790_intr_mask[iptr]) - 1); + return 0; + } + } else if (sc->type & ED_WD_SOFTCONFIG) { + sc->ed_cr_rd2 = ED_CR_RD2; + /* Assemble together the encoded interrupt number. */ iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) | - ((inb(isa_dev->id_iobase + ED_WD_IRR) & - (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5); + ((inb(isa_dev->id_iobase + ED_WD_IRR) & + (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5); /* - * Translate it using translation table, and check for correctness. + * Translate it using translation table, and check for + * correctness. */ if (ed_intr_mask[iptr] != isa_dev->id_irq) { printf("ed%d: kernel configured irq %d doesn't match board configured irq %d\n", - isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, ffs(ed_intr_mask[iptr]) - 1); - return(0); + isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, + ffs(ed_intr_mask[iptr]) - 1); + return 0; } - /* - * Enable the interrupt. - */ + /* Enable the interrupt. */ outb(isa_dev->id_iobase + ED_WD_IRR, - inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN); + inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN); } sc->isa16bit = isa16bit; @@ -441,15 +447,14 @@ ed_probe_WD80x3(isa_dev) #ifdef notyet /* XXX - I'm not sure if PIO mode is even possible on WD/SMC boards */ /* * The following allows the WD/SMC boards to be used in Programmed I/O - * mode - without mapping the NIC memory shared. ...Not the prefered - * way, but it might be the only way. + * mode - without mapping the NIC memory shared. ...Not the prefered + * way, but it might be the only way. */ if (isa_dev->id_flags & ED_FLAGS_FORCE_PIO) { sc->mem_shared = 0; isa_dev->id_maddr = 0; - } else { + } else sc->mem_shared = 1; - } #else sc->mem_shared = 1; #endif @@ -457,89 +462,120 @@ ed_probe_WD80x3(isa_dev) sc->mem_start = (caddr_t)isa_dev->id_maddr; - /* - * allocate one xmit buffer if < 16k, two buffers otherwise - */ - if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) { - sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); + /* Allocate one xmit buffer if < 16k, two buffers otherwise. */ + if ((memsize < 16384) || + (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) sc->txb_cnt = 1; - sc->rec_page_start = ED_TXBUF_SIZE; - } else { - sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE * 2); + else sc->txb_cnt = 2; - sc->rec_page_start = ED_TXBUF_SIZE * 2; - } + + sc->tx_page_start = ED_WD_PAGE_OFFSET; + sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; + sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; + sc->mem_ring = sc->mem_start + sc->rec_page_start * ED_PAGE_SIZE; sc->mem_size = memsize; sc->mem_end = sc->mem_start + memsize; - sc->rec_page_stop = memsize / ED_PAGE_SIZE; - sc->tx_page_start = ED_WD_PAGE_OFFSET; - /* - * Get station address from on-board ROM - */ + /* Get station address from on-board ROM. */ for (i = 0; i < ETHER_ADDR_LEN; ++i) sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i); if (sc->mem_shared) { - /* - * Set address and enable interface shared memory. - */ - outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) & - ED_WD_MSR_ADDR) | ED_WD_MSR_MENB); - - /* - * Set upper address bits and 8/16 bit access to shared memory - */ - if (isa16bit) { - outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = - ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | - ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); - } else { - if ((sc->type & ED_WD_SOFTCONFIG) || (sc->type == ED_TYPE_WD8013EBT)) { - outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = - ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); - } + /* Set address and enable interface shared memory. */ + if (!sc->is790) { +#ifdef TOSH_ETHER + outb(sc->asic_addr + ED_WD_MSR + 1, + ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4); + outb(sc->asic_addr + ED_WD_MSR + 2, + ((kvtop(sc->mem_start) >> 16) & 0x0f)); + outb(sc->asic_addr + ED_WD_MSR, + ED_WD_MSR_MENB | ED_WD_MSR_POW); +#else + outb(sc->asic_addr + ED_WD_MSR, + ((kvtop(sc->mem_start) >> 13) & ED_WD_MSR_ADDR) | + ED_WD_MSR_MENB); +#endif + } else { + outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); + outb(sc->asic_addr + 0x04, + inb(sc->asic_addr + 0x04) | 0x80); + outb(sc->asic_addr + 0x0b, + ((kvtop(sc->mem_start) >> 13) & 0x0f) | + ((kvtop(sc->mem_start) >> 11) & 0x40) | + (inb(sc->asic_addr + 0x0b) & 0xb0)); + outb(sc->asic_addr + 0x04, + inb(sc->asic_addr + 0x04) & ~0x80); } /* - * Now zero memory and verify that it is clear + * Set upper address bits and 8/16 bit access to shared memory. */ + if (isa16bit) { + if (sc->is790) { + sc->wd_laar_proto = + inb(sc->asic_addr + ED_WD_LAAR); + outb(sc->asic_addr + ED_WD_LAAR, + ED_WD_LAAR_M16EN); + } else { + sc->wd_laar_proto = + ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | + ((kvtop(sc->mem_start) >> 19) & + ED_WD_LAAR_ADDRHI); + outb(sc->asic_addr + ED_WD_LAAR, + sc->wd_laar_proto); + } + } else { + if ((sc->type & ED_WD_SOFTCONFIG) || +#ifdef TOSH_ETHER + (sc->type == ED_TYPE_TOSHIBA1) || + (sc->type == ED_TYPE_TOSHIBA4) || +#endif + (sc->type == ED_TYPE_WD8013EBT) && + !sc->is790) { + sc->wd_laar_proto = + ((kvtop(sc->mem_start) >> 19) & + ED_WD_LAAR_ADDRHI); + outb(sc->asic_addr + ED_WD_LAAR, + sc->wd_laar_proto); + } + } + + /* Now zero memory and verify that it is clear. */ bzero(sc->mem_start, memsize); for (i = 0; i < memsize; ++i) if (sc->mem_start[i]) { printf("ed%d: failed to clear shared memory at %x - check configuration\n", - isa_dev->id_unit, kvtop(sc->mem_start + i)); + isa_dev->id_unit, kvtop(sc->mem_start + i)); - /* - * Disable 16 bit access to shared memory - */ - if (isa16bit) - outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= - ~ED_WD_LAAR_M16EN)); - - return(0); + /* Disable 16 bit access to shared memory. */ + if (isa16bit) { + sc->wd_laar_proto &= ~ED_WD_LAAR_M16EN; + outb(sc->asic_addr + ED_WD_LAAR, + sc->wd_laar_proto); + } + return 0; } /* - * Disable 16bit access to shared memory - we leave it disabled so - * that 1) machines reboot properly when the board is set - * 16 bit mode and there are conflicting 8bit devices/ROMS - * in the same 128k address space as this boards shared - * memory. and 2) so that other 8 bit devices with shared - * memory can be used in this 128k region, too. + * Disable 16bit access to shared memory - we leave it disabled + * so that 1) machines reboot properly when the board is set 16 + * 16 bit mode and there are conflicting 8bit devices/ROMS in + * the same 128k address space as this boards shared memory, + * and 2) so that other 8 bit devices with shared memory can be + * used in this 128k region, too. */ - if (isa16bit) - outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= - ~ED_WD_LAAR_M16EN)); - + if (isa16bit) { + sc->wd_laar_proto &= ~ED_WD_LAAR_M16EN; + outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto); + } } - return (ED_WD_IO_PORTS); + return ED_WD_IO_PORTS; } /* - * Probe and vendor-specific initialization routine for 3Com 3c503 boards + * Probe and vendor-specific initialization routine for 3Com 3c503 boards. */ int ed_probe_3Com(isa_dev) @@ -552,95 +588,96 @@ ed_probe_3Com(isa_dev) sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET; sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET; + sc->ed_cr_rd2 = ED_CR_RD2; /* * Verify that the kernel configured I/O address matches the board - * configured address + * configured address. + * + * This is really only useful to see if something that looks like the + * board is there; after all, we are already talking it at that + * address. */ switch (inb(sc->asic_addr + ED_3COM_BCFR)) { case ED_3COM_BCFR_300: if (isa_dev->id_iobase != 0x300) - return(0); + return 0; break; case ED_3COM_BCFR_310: if (isa_dev->id_iobase != 0x310) - return(0); + return 0; break; case ED_3COM_BCFR_330: if (isa_dev->id_iobase != 0x330) - return(0); + return 0; break; case ED_3COM_BCFR_350: if (isa_dev->id_iobase != 0x350) - return(0); + return 0; break; case ED_3COM_BCFR_250: if (isa_dev->id_iobase != 0x250) - return(0); + return 0; break; case ED_3COM_BCFR_280: if (isa_dev->id_iobase != 0x280) - return(0); + return 0; break; case ED_3COM_BCFR_2A0: if (isa_dev->id_iobase != 0x2a0) - return(0); + return 0; break; case ED_3COM_BCFR_2E0: if (isa_dev->id_iobase != 0x2e0) - return(0); + return 0; break; default: - return(0); + return 0; } /* - * Verify that the kernel shared memory address matches the - * board configured address. + * Verify that the kernel shared memory address matches the board + * configured address. */ switch (inb(sc->asic_addr + ED_3COM_PCFR)) { case ED_3COM_PCFR_DC000: if (kvtop(isa_dev->id_maddr) != 0xdc000) - return(0); + return 0; break; case ED_3COM_PCFR_D8000: if (kvtop(isa_dev->id_maddr) != 0xd8000) - return(0); + return 0; break; case ED_3COM_PCFR_CC000: if (kvtop(isa_dev->id_maddr) != 0xcc000) - return(0); + return 0; break; case ED_3COM_PCFR_C8000: if (kvtop(isa_dev->id_maddr) != 0xc8000) - return(0); + return 0; break; default: - return(0); + return 0; } /* - * Reset NIC and ASIC. Enable on-board transceiver throughout reset - * sequence because it'll lock up if the cable isn't connected - * if we don't. + * Reset NIC and ASIC. Enable on-board transceiver throughout reset + * sequence because it'll lock up if the cable isn't connected if we + * don't. */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL); - /* - * Wait for a while, then un-reset it - */ + /* Wait for a while, then un-reset it. */ DELAY(50); /* - * The 3Com ASIC defaults to rather strange settings for the CR after - * a reset - it's important to set it again after the following - * outb (this is done when we map the PROM below). + * The 3Com ASIC defaults to rather strange settings for the CR after a + * reset - it's important to set it again after the following outb + * (this is done when we map the PROM below). */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); - /* - * Wait a bit for the NIC to recover from the reset - */ + /* Wait a bit for the NIC to recover from the reset. */ DELAY(5000); sc->vendor = ED_VENDOR_3COM; @@ -649,17 +686,16 @@ ed_probe_3Com(isa_dev) sc->mem_shared = 1; /* - * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k - * window to it. + * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window + * to it. */ memsize = 8192; /* - * Get station address from on-board ROM - */ - /* + * Get station address from on-board ROM. + * * First, map ethernet address PROM over the top of where the NIC - * registers normally appear. + * registers normally appear. */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL); @@ -667,45 +703,34 @@ ed_probe_3Com(isa_dev) sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i); /* - * Unmap PROM - select NIC registers. The proper setting of the - * tranceiver is set in ed_init so that the attach code - * is given a chance to set the default based on a compile-time - * config option + * Unmap PROM - select NIC registers. The proper setting of the + * tranceiver is set in ed_init so that the attach code is given a + * chance to set the default based on a compile-time config option. */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); - /* - * Determine if this is an 8bit or 16bit board - */ + /* Determine if this is an 8bit or 16bit board. */ + + /* Select page 0 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); /* - * select page 0 registers - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); - - /* - * Attempt to clear WTS bit. If it doesn't clear, then this is a - * 16bit board. + * Attempt to clear WTS bit. If it doesn't clear, then this is a + * 16-bit board. */ outb(sc->nic_addr + ED_P0_DCR, 0); - /* - * select page 2 registers - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2|ED_CR_RD2|ED_CR_STP); + /* Select page 2 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP); - /* - * The 3c503 forces the WTS bit to a one if this is a 16bit board - */ + /* The 3c503 forces the WTS bit to a one if this is a 16bit board. */ if (inb(sc->nic_addr + ED_P2_DCR) & ED_DCR_WTS) isa16bit = 1; else isa16bit = 0; - /* - * select page 0 registers - */ - outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2|ED_CR_STP); + /* Select page 0 registers. */ + outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2 | ED_CR_STP); sc->mem_start = (caddr_t)isa_dev->id_maddr; sc->mem_size = memsize; @@ -713,13 +738,12 @@ ed_probe_3Com(isa_dev) /* * We have an entire 8k window to put the transmit buffers on the - * 16bit boards. But since the 16bit 3c503's shared memory - * is only fast enough to overlap the loading of one full-size - * packet, trying to load more than 2 buffers can actually - * leave the transmitter idle during the load. So 2 seems - * the best value. (Although a mix of variable-sized packets - * might change this assumption. Nonetheless, we optimize for - * linear transfers of same-size packets.) + * 16-bit boards. But since the 16bit 3c503's shared memory is only + * fast enough to overlap the loading of one full-size packet, trying + * to load more than 2 buffers can actually leave the transmitter idle + * during the load. So 2 seems the best value. (Although a mix of + * variable-sized packets might change this assumption. Nonetheless, + * we optimize for linear transfers of same-size packets.) */ if (isa16bit) { if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING) @@ -729,32 +753,31 @@ ed_probe_3Com(isa_dev) sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT; sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT; - sc->rec_page_stop = memsize / ED_PAGE_SIZE + - ED_3COM_RX_PAGE_OFFSET_16BIT; + sc->rec_page_stop = + memsize / ED_PAGE_SIZE + ED_3COM_RX_PAGE_OFFSET_16BIT; sc->mem_ring = sc->mem_start; } else { sc->txb_cnt = 1; sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT; - sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT; - sc->rec_page_stop = memsize / ED_PAGE_SIZE + - ED_3COM_TX_PAGE_OFFSET_8BIT; + sc->rec_page_start = + ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT; + sc->rec_page_stop = + memsize / ED_PAGE_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT; sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); } sc->isa16bit = isa16bit; /* - * Initialize GA page start/stop registers. Probably only needed - * if doing DMA, but what the hell. + * Initialize GA page start/stop registers. Probably only needed if + * doing DMA, but what the Hell. */ outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start); outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop); - /* - * Set IRQ. 3c503 only allows a choice of irq 2-5. - */ + /* Set IRQ. 3c503 only allows a choice of irq 3-5 or 9. */ switch (isa_dev->id_irq) { - case IRQ2: + case IRQ9: outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2); break; case IRQ3: @@ -767,45 +790,44 @@ ed_probe_3Com(isa_dev) outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5); break; default: - printf("ed%d: Invalid irq configuration (%d) must be 2-5 for 3c503\n", - isa_dev->id_unit, ffs(isa_dev->id_irq) - 1); - return(0); + printf("ed%d: Invalid irq configuration (%d) must be 3-5 or 9 for 3c503\n", + isa_dev->id_unit, ffs(isa_dev->id_irq) - 1); + return 0; } /* - * Initialize GA configuration register. Set bank and enable shared mem. + * Initialize GA configuration register. Set bank and enable shared + * mem. */ - outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL | - ED_3COM_GACFR_MBS0); + outb(sc->asic_addr + ED_3COM_GACFR, + ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); /* - * Initialize "Vector Pointer" registers. These gawd-awful things - * are compared to 20 bits of the address on ISA, and if they - * match, the shared memory is disabled. We set them to - * 0xffff0...allegedly the reset vector. + * Initialize "Vector Pointer" registers. These gawd-awful things are + * compared to 20 bits of the address on ISA, and if they match, the + * shared memory is disabled. We set them to 0xffff0...allegedly the + * reset vector. */ outb(sc->asic_addr + ED_3COM_VPTR2, 0xff); outb(sc->asic_addr + ED_3COM_VPTR1, 0xff); outb(sc->asic_addr + ED_3COM_VPTR0, 0x00); - /* - * Zero memory and verify that it is clear - */ + /* Zero memory and verify that it is clear. */ bzero(sc->mem_start, memsize); for (i = 0; i < memsize; ++i) if (sc->mem_start[i]) { printf("ed%d: failed to clear shared memory at %x - check configuration\n", - isa_dev->id_unit, kvtop(sc->mem_start + i)); - return(0); + isa_dev->id_unit, kvtop(sc->mem_start + i)); + return 0; } isa_dev->id_msize = memsize; - return(ED_3COM_IO_PORTS); + return ED_3COM_IO_PORTS; } /* - * Probe and vendor-specific initialization routine for NE1000/2000 boards + * Probe and vendor-specific initialization routine for NE1000/2000 boards. */ int ed_probe_Novell(isa_dev) @@ -814,69 +836,70 @@ ed_probe_Novell(isa_dev) struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; u_int memsize, n; u_char romdata[16], isa16bit = 0, tmp; - static char test_pattern[32] = "THIS is A memory TEST pattern"; - char test_buffer[32]; + static u_char test_pattern[32] = "THIS is A memory TEST pattern"; + u_char test_buffer[32]; sc->asic_addr = isa_dev->id_iobase + ED_NOVELL_ASIC_OFFSET; sc->nic_addr = isa_dev->id_iobase + ED_NOVELL_NIC_OFFSET; + sc->ed_cr_rd2 = ED_CR_RD2; /* XXX - do Novell-specific probe here */ - /* Reset the board */ + /* Reset the board. */ tmp = inb(sc->asic_addr + ED_NOVELL_RESET); #if 0 /* * This total and completely screwy thing is to work around braindamage - * in some NE compatible boards. Why it works, I have *no* idea. - * It appears that the boards watch the ISA bus for an outb, and - * will lock up the ISA bus if they see an inb first. Weird. + * in some NE compatible boards. Why it works, I have *no* idea. It + * appears that the boards watch the ISA bus for an outb, and will lock + * up the ISA bus if they see an inb first. Weird. */ outb(0x84, 0); #endif /* * I don't know if this is necessary; probably cruft leftover from - * Clarkson packet driver code. Doesn't do a thing on the boards - * I've tested. -DG [note that a outb(0x84, 0) seems to work - * here, and is non-invasive...but some boards don't seem to reset - * and I don't have complete documentation on what the 'right' - * thing to do is...so we do the invasive thing for now. Yuck.] + * Clarkson packet driver code. Doesn't do a thing on the boards I've + * tested. -DG [note that a outb(0x84, 0) seems to work here, and is + * non-invasive...but some boards don't seem to reset and I don't have + * complete documentation on what the 'right' thing to do is...so we do + * the invasive thing for now. Yuck.] */ outb(sc->asic_addr + ED_NOVELL_RESET, tmp); DELAY(5000); /* - * This is needed because some NE clones apparently don't reset the - * NIC properly (or the NIC chip doesn't reset fully on power-up) + * This is needed because some NE clones apparently don't reset the NIC + * properly (or the NIC chip doesn't reset fully on power-up) * XXX - this makes the probe invasive! ...Done against my better - * judgement. -DLG + * judgement. -DLG */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); DELAY(5000); - /* Make sure that we really have an 8390 based board */ + /* Make sure that we really have an 8390 based board. */ if (!ed_probe_generic8390(sc)) - return(0); + return 0; sc->vendor = ED_VENDOR_NOVELL; sc->mem_shared = 0; isa_dev->id_maddr = 0; /* - * Test the ability to read and write to the NIC memory. This has - * the side affect of determining if this is an NE1000 or an NE2000. + * Test the ability to read and write to the NIC memory. This has the + * side affect of determining if this is an NE1000 or an NE2000. */ /* - * This prevents packets from being stored in the NIC memory when - * the readmem routine turns on the start bit in the CR. + * This prevents packets from being stored in the NIC memory when the + * readmem routine turns on the start bit in the CR. */ outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); - /* Temporarily initialize DCR for byte operations */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS); + /* Temporarily initialize DCR for byte operations. */ + outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE); outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE); @@ -884,9 +907,9 @@ ed_probe_Novell(isa_dev) sc->isa16bit = 0; /* - * Write a test pattern in byte mode. If this fails, then there - * probably isn't any memory at 8k - which likely means - * that the board is an NE2000. + * Write a test pattern in byte mode. If this fails, then there + * probably isn't any memory at 8k - which likely means that the board + * is an NE2000. */ ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern)); ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern)); @@ -895,20 +918,20 @@ ed_probe_Novell(isa_dev) /* not an NE1000 - try NE2000 */ outb(sc->nic_addr + ED_P0_DCR, - ED_DCR_WTS|ED_DCR_FT1|ED_DCR_LS); + ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE); outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE); sc->isa16bit = 1; /* - * Write a test pattern in word mode. If this also fails, then - * we don't know what this board is. + * Write a test pattern in word mode. If this also fails, then + * we don't know what this board is. */ ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern)); ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern)); if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) - return(0); /* not an NE2000 either */ + return 0; /* not an NE2000 either */ sc->type = ED_TYPE_NE2000; sc->type_str = "NE2000"; @@ -917,28 +940,29 @@ ed_probe_Novell(isa_dev) sc->type_str = "NE1000"; } - /* 8k of memory plus an additional 8k if 16bit */ + /* 8k of memory plus an additional 8k if 16-bit. */ memsize = 8192 + sc->isa16bit * 8192; #if 0 /* probably not useful - NE boards only come two ways */ - /* allow kernel config file overrides */ + /* Allow kernel config file overrides. */ if (isa_dev->id_msize) memsize = isa_dev->id_msize; #endif sc->mem_size = memsize; - /* NIC memory doesn't start at zero on an NE board */ - /* The start address is tied to the bus width */ - sc->mem_start = (char *) 8192 + sc->isa16bit * 8192; + /* NIC memory doesn't start at zero on an NE board. */ + /* The start address is tied to the bus width. */ + sc->mem_start = (caddr_t) 8192 + sc->isa16bit * 8192; sc->mem_end = sc->mem_start + memsize; sc->tx_page_start = memsize / ED_PAGE_SIZE; /* * Use one xmit buffer if < 16k, two buffers otherwise (if not told - * otherwise). + * otherwise). */ - if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) + if ((memsize < 16384) || + (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) sc->txb_cnt = 1; else sc->txb_cnt = 2; @@ -946,20 +970,21 @@ ed_probe_Novell(isa_dev) sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; - sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; + sc->mem_ring = + sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; ed_pio_readmem(sc, 0, romdata, 16); for (n = 0; n < ETHER_ADDR_LEN; n++) sc->arpcom.ac_enaddr[n] = romdata[n*(sc->isa16bit+1)]; - /* clear any pending interrupts that might have occurred above */ + /* Clear any pending interrupts that might have occurred above. */ outb(sc->nic_addr + ED_P0_ISR, 0xff); - return(ED_NOVELL_IO_PORTS); + return ED_NOVELL_IO_PORTS; } /* - * Install interface into kernel networking data structures + * Install interface into kernel networking data structures. */ int ed_attach(isa_dev) @@ -970,79 +995,65 @@ ed_attach(isa_dev) struct ifaddr *ifa; struct sockaddr_dl *sdl; - /* - * Set interface to stopped condition (reset) - */ - ed_stop(isa_dev->id_unit); + /* Set interface to stopped condition (reset). */ + ed_stop(sc); - /* - * Initialize ifnet structure - */ + /* Initialize ifnet structure. */ ifp->if_unit = isa_dev->id_unit; - ifp->if_name = "ed" ; + ifp->if_name = "ed"; ifp->if_mtu = ETHERMTU; ifp->if_output = ether_output; ifp->if_start = ed_start; ifp->if_ioctl = ed_ioctl; - ifp->if_reset = ed_reset; ifp->if_watchdog = ed_watchdog; - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | - IFF_MULTICAST; + ifp->if_flags = + IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; /* * Set default state for ALTPHYS flag (used to disable the tranceiver - * for AUI operation), based on compile-time config option. + * for AUI operation), based on compile-time config option. */ if (isa_dev->id_flags & ED_FLAGS_DISABLE_TRANCEIVER) ifp->if_flags |= IFF_ALTPHYS; - /* - * Attach the interface - */ + /* Attach the interface. */ if_attach(ifp); /* * Search down the ifa address list looking for the AF_LINK type entry + * and initialize it. */ ifa = ifp->if_addrlist; - while ((ifa != 0) && (ifa->ifa_addr != 0) && - (ifa->ifa_addr->sa_family != AF_LINK)) - ifa = ifa->ifa_next; - /* - * If we find an AF_LINK type entry we fill in the hardware address. - * This is useful for netstat(1) to keep track of which interface - * is which. - */ - if ((ifa != 0) && (ifa->ifa_addr != 0)) { - /* - * Fill in the link-level address for this interface - */ - sdl = (struct sockaddr_dl *)ifa->ifa_addr; - sdl->sdl_type = IFT_ETHER; - sdl->sdl_alen = ETHER_ADDR_LEN; - sdl->sdl_slen = 0; - bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN); + while (ifa && ifa->ifa_addr) { + if (ifa->ifa_addr->sa_family == AF_LINK) { + /* + * Fill in the link-level address for this interface. + */ + sdl = (struct sockaddr_dl *)ifa->ifa_addr; + sdl->sdl_type = IFT_ETHER; + sdl->sdl_alen = ETHER_ADDR_LEN; + sdl->sdl_slen = 0; + bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), + ETHER_ADDR_LEN); + break; + } else + ifa = ifa->ifa_next; } - /* - * Print additional info when attached - */ + /* Print additional info when attached. */ printf("ed%d: address %s, ", isa_dev->id_unit, - ether_sprintf(sc->arpcom.ac_enaddr)); + ether_sprintf(sc->arpcom.ac_enaddr)); - if (sc->type_str && (*sc->type_str != 0)) + if (sc->type_str && (*sc->type_str != '\0')) printf("type %s ", sc->type_str); else printf("type unknown (0x%x) ", sc->type); - printf("%s ",sc->isa16bit ? "(16 bit)" : "(8 bit)"); + printf("%s", sc->isa16bit ? "(16-bit)" : "(8-bit)"); printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) && - (ifp->if_flags & IFF_ALTPHYS)) ? "tranceiver disabled" : ""); + (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : ""); - /* - * If BPF is in the kernel, call the attach for it - */ #if NBPFILTER > 0 bpfattach(&sc->bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); #endif @@ -1052,86 +1063,77 @@ ed_attach(isa_dev) /* * Reset interface. */ -int -ed_reset(unit) - int unit; +void +ed_reset(sc) + struct ed_softc *sc; { int s; s = splnet(); - - /* - * Stop interface and re-initialize. - */ - ed_stop(unit); - ed_init(unit); - - (void) splx(s); + ed_stop(sc); + ed_init(sc); + splx(s); } /* * Take interface offline. */ void -ed_stop(unit) - int unit; +ed_stop(sc) + struct ed_softc *sc; { - struct ed_softc *sc = &ed_softc[unit]; int n = 5000; - /* - * Stop everything on the interface, and select page 0 registers. - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + /* Stop everything on the interface, and select page 0 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_STP | sc->ed_cr_rd2); /* - * Wait for interface to enter stopped state, but limit # of checks - * to 'n' (about 5ms). It shouldn't even take 5us on modern - * DS8390's, but just in case it's an old one. + * Wait for interface to enter stopped state, but limit # of checks to + * to 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, + * but just in case it's an old one. */ while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n); - } /* - * Device timeout/watchdog routine. Entered if the device neglects to - * generate an interrupt after a transmit has been started on it. + * Device timeout/watchdog routine. Entered if the device neglects to generate + * an interrupt after a transmit has been started on it. */ -int +void ed_watchdog(unit) - int unit; + short unit; { struct ed_softc *sc = &ed_softc[unit]; log(LOG_ERR, "ed%d: device timeout\n", unit); ++sc->arpcom.ac_if.if_oerrors; - ed_reset(unit); + ed_reset(sc); } /* * Initialize device. */ -ed_init(unit) - int unit; +void +ed_init(sc) + struct ed_softc *sc; { - struct ed_softc *sc = &ed_softc[unit]; struct ifnet *ifp = &sc->arpcom.ac_if; int i, s; - u_char command; + u_char command; - - /* address not known */ - if (ifp->if_addrlist == (struct ifaddr *)0) return; + /* Address not known. */ + if (ifp->if_addrlist == 0) + return; /* * Initialize the NIC in the exact order outlined in the NS manual. - * This init procedure is "mandatory"...don't change what or when - * things happen. + * This init procedure is "mandatory"...don't change what or when + * things happen. */ s = splnet(); - /* reset transmitter flags */ + /* Reset transmitter flags. */ sc->xmit_busy = 0; sc->arpcom.ac_if.if_timer = 0; @@ -1139,127 +1141,103 @@ ed_init(unit) sc->txb_new = 0; sc->txb_next_tx = 0; - /* This variable is used below - don't move this assignment */ + /* This variable is used below - don't move this assignment. */ sc->next_packet = sc->rec_page_start + 1; - /* - * Set interface for page 0, Remote DMA complete, Stopped - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + /* Set interface for page 0, remote DMA complete, stopped. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_STP | sc->ed_cr_rd2); if (sc->isa16bit) { /* - * Set FIFO threshold to 8, No auto-init Remote DMA, - * byte order=80x86, word-wide DMA xfers, + * Set FIFO threshold to 8, No auto-init Remote DMA, byte + * order=80x86, word-wide DMA xfers, */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS|ED_DCR_LS); + outb(sc->nic_addr + ED_P0_DCR, + ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS); } else { - /* - * Same as above, but byte-wide DMA xfers - */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS); + /* Same as above, but byte-wide DMA xfers. */ + outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); } - /* - * Clear Remote Byte Count Registers - */ + /* Clear remote byte count registers. */ outb(sc->nic_addr + ED_P0_RBCR0, 0); outb(sc->nic_addr + ED_P0_RBCR1, 0); -#if 0 - /* - * Enable reception of broadcast packets - */ - outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); -#endif - /* - * Tell RCR to do nothing for now. - */ + /* Tell RCR to do nothing for now. */ outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); - /* - * Place NIC in internal loopback mode - */ + /* Place NIC in internal loopback mode. */ outb(sc->nic_addr + ED_P0_TCR, ED_TCR_LB0); - /* - * Initialize transmit/receive (ring-buffer) Page Start - */ + /* Initialize transmit/receive (ring-buffer) page start. */ outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start); outb(sc->nic_addr + ED_P0_PSTART, sc->rec_page_start); - /* - * Initialize Receiver (ring-buffer) Page Stop and Boundry - */ + /* Set lower bits of byte addressable framing to 0. */ + if (sc->is790) + outb(sc->nic_addr + 0x09, 0); + + /* Initialize receiver (ring-buffer) page stop and boundry. */ outb(sc->nic_addr + ED_P0_PSTOP, sc->rec_page_stop); outb(sc->nic_addr + ED_P0_BNRY, sc->rec_page_start); /* - * Clear all interrupts. A '1' in each bit position clears the - * corresponding flag. + * Clear all interrupts. A '1' in each bit position clears the + * corresponding flag. */ outb(sc->nic_addr + ED_P0_ISR, 0xff); /* * Enable the following interrupts: receive/transmit complete, - * receive/transmit error, and Receiver OverWrite. + * receive/transmit error, and Receiver OverWrite. * * Counter overflow and Remote DMA complete are *not* enabled. */ outb(sc->nic_addr + ED_P0_IMR, - ED_IMR_PRXE|ED_IMR_PTXE|ED_IMR_RXEE|ED_IMR_TXEE|ED_IMR_OVWE); + ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | + ED_IMR_OVWE); - /* - * Program Command Register for page 1 - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STP); + /* Program command register for page 1. */ + outb(sc->nic_addr + ED_P0_CR, + ED_CR_PAGE_1 | ED_CR_STP | sc->ed_cr_rd2); - /* - * Copy out our station address - */ + /* Copy out our station address. */ for (i = 0; i < ETHER_ADDR_LEN; ++i) outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]); - /* set up multicast addresses and filter modes */ - if ((ifp->if_flags & (IFF_MULTICAST | IFF_PROMISC)) != 0) { + /* Set up multicast addresses and filter modes. */ + if (ifp->if_flags & (IFF_MULTICAST | IFF_PROMISC)) { u_long mcaf[2]; - if ((ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) != 0) { + if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) { mcaf[0] = 0xffffffff; mcaf[1] = 0xffffffff; } else ds_getmcaf(sc, mcaf); - /* - * Set multicast filter on chip. - */ + /* Set multicast filter on chip. */ for (i = 0; i < 8; i++) outb(sc->nic_addr + ED_P1_MAR0 + i, ((u_char *)mcaf)[i]); } - /* - * Set Current Page pointer to next_packet (initialized above) - */ + + /* Set current page pointer to next_packet (initialized above). */ outb(sc->nic_addr + ED_P1_CURR, sc->next_packet); /* - * Set Command Register for page 0, Remote DMA complete, - * and interface Start. + * Set command register for page 0, remote DMA complete, and interface + * start. */ - outb(sc->nic_addr + ED_P1_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P1_CR, ED_CR_STA | sc->ed_cr_rd2); - /* - * Clear all interrupts. - */ + /* Clear all interrupts. */ outb(sc->nic_addr + ED_P0_ISR, 0xff); - /* - * Take interface out of loopback - */ + /* Take interface out of loopback. */ outb(sc->nic_addr + ED_P0_TCR, 0); /* * If this is a 3Com board, the tranceiver must be software enabled - * (there is no settable hardware default). + * (there is no settable hardware default). */ if (sc->vendor == ED_VENDOR_3COM) { if (ifp->if_flags & IFF_ALTPHYS) @@ -1269,76 +1247,59 @@ ed_init(unit) } i = ED_RCR_AB; - if ((ifp->if_flags & IFF_PROMISC) != 0) { + if (ifp->if_flags & IFF_PROMISC) { /* * Set promiscuous mode. Multicast filter was set earlier so * that we should receive all multicast packets. */ i |= ED_RCR_AM | ED_RCR_PRO | ED_RCR_AR | ED_RCR_SEP; - } else if ((ifp->if_flags & IFF_MULTICAST) != 0) { + } else if (ifp->if_flags & IFF_MULTICAST) i |= ED_RCR_AM; - } outb(sc->nic_addr + ED_P0_RCR, i); - /* - * Set 'running' flag, and clear output active flag. - */ + /* Set 'running' flag, and clear output active flag. */ ifp->if_flags |= IFF_RUNNING; ifp->if_flags &= ~IFF_OACTIVE; - /* - * ...and attempt to start output - */ + /* ...and attempt to start output. */ ed_start(ifp); (void) splx(s); } /* - * This routine actually starts the transmission on the interface + * This routine actually starts the transmission on the interface. */ static inline void ed_xmit(ifp) struct ifnet *ifp; { struct ed_softc *sc = &ed_softc[ifp->if_unit]; - unsigned short len; + u_short len; len = sc->txb_len[sc->txb_next_tx]; - /* - * Set NIC for page 0 register access - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + /* Set NIC for page 0 register access. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_STA | sc->ed_cr_rd2); - /* - * Set TX buffer start page - */ + /* Set TX buffer start page. */ outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start + - sc->txb_next_tx * ED_TXBUF_SIZE); + sc->txb_next_tx * ED_TXBUF_SIZE); - /* - * Set TX length - */ + /* Set TX length. */ outb(sc->nic_addr + ED_P0_TBCR0, len); outb(sc->nic_addr + ED_P0_TBCR1, len >> 8); - /* - * Set page 0, Remote DMA complete, Transmit Packet, and *Start* - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_TXP|ED_CR_STA); + /* Set page 0, remote DMA complete, transmit packet, and *start*. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_TXP | ED_CR_STA | sc->ed_cr_rd2); sc->xmit_busy = 1; - /* - * Point to next transmit buffer slot and wrap if necessary. - */ + /* Point to next transmit buffer slot and wrap if necessary. */ sc->txb_next_tx++; if (sc->txb_next_tx == sc->txb_cnt) sc->txb_next_tx = 0; - /* - * Set a timer just in case we never hear from the board again - */ + /* Set a timer just in case we never hear from the board again. */ ifp->if_timer = 2; } @@ -1351,7 +1312,7 @@ static inline void ed_xmit(ifp) * 2) that the IFF_OACTIVE flag is checked before this code is called * (i.e. that the output part of the interface is idle) */ -int +void ed_start(ifp) struct ifnet *ifp; { @@ -1362,120 +1323,105 @@ ed_start(ifp) outloop: /* - * First, see if there are buffered packets and an idle - * transmitter - should never happen at this point. + * First, see if there are buffered packets and an idle transmitter - + * should never happen at this point. */ if (sc->txb_inuse && (sc->xmit_busy == 0)) { - printf("ed: packets buffers, but transmitter idle\n"); + printf("ed%d: packets buffers, but transmitter idle\n", + ifp->if_unit); ed_xmit(ifp); } - /* - * See if there is room to put another packet in the buffer. - */ + /* See if there is room to put another packet in the buffer. */ if (sc->txb_inuse == sc->txb_cnt) { - /* - * No room. Indicate this to the outside world - * and exit. - */ + /* No room. Indicate this to the outside world and exit. */ ifp->if_flags |= IFF_OACTIVE; return; } IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); if (m == 0) { - /* - * We are using the !OACTIVE flag to indicate to the outside - * world that we can accept an additional packet rather than - * that the transmitter is _actually_ active. Indeed, the - * transmitter may be active, but if we haven't filled all - * the buffers with data then we still want to accept more. - */ + /* + * We are using the !OACTIVE flag to indicate to the outside + * world that we can accept an additional packet rather than + * that the transmitter is _actually_ active. Indeed, the + * transmitter may be active, but if we haven't filled all + * the buffers with data then we still want to accept more. + */ ifp->if_flags &= ~IFF_OACTIVE; return; } - /* - * Copy the mbuf chain into the transmit buffer - */ - + /* Copy the mbuf chain into the transmit buffer. */ m0 = m; - /* txb_new points to next open buffer slot */ + /* txb_new points to next open buffer slot. */ buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE); if (sc->mem_shared) { - /* - * Special case setup for 16 bit boards... - */ + /* Special case setup for 16 bit boards... */ if (sc->isa16bit) { switch (sc->vendor) { /* - * For 16bit 3Com boards (which have 16k of memory), - * we have the xmit buffers in a different page - * of memory ('page 0') - so change pages. + * For 16bit 3Com boards (which have 16k of memory), we + * have the xmit buffers in a different page of memory + * ('page 0') - so change pages. */ case ED_VENDOR_3COM: outb(sc->asic_addr + ED_3COM_GACFR, - ED_3COM_GACFR_RSEL); + ED_3COM_GACFR_RSEL); break; /* - * Enable 16bit access to shared memory on WD/SMC boards - * Don't update wd_laar_proto because we want to restore the - * previous state (because an arp reply in the input code - * may cause a call-back to ed_start) + * Enable 16bit access to shared memory on WD/SMC + * boards don't update wd_laar_proto because we want to + * restore the previous state (because an arp reply in + * the input code may cause a call-back to ed_start). * XXX - the call-back to 'start' is a bug, IMHO. */ case ED_VENDOR_WD_SMC: outb(sc->asic_addr + ED_WD_LAAR, - (sc->wd_laar_proto | ED_WD_LAAR_M16EN)); + (sc->wd_laar_proto | ED_WD_LAAR_M16EN)); } } - for (len = 0; m != 0; m = m->m_next) { + for (len = 0; m; m = m->m_next) { bcopy(mtod(m, caddr_t), buffer, m->m_len); buffer += m->m_len; len += m->m_len; } - /* - * Restore previous shared memory access - */ + /* Restore previous shared memory access. */ if (sc->isa16bit) { switch (sc->vendor) { case ED_VENDOR_3COM: outb(sc->asic_addr + ED_3COM_GACFR, - ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); + ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); break; case ED_VENDOR_WD_SMC: - outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto); + outb(sc->asic_addr + ED_WD_LAAR, + sc->wd_laar_proto); break; } } - } else { - len = ed_pio_write_mbufs(sc, m, buffer); - } + } else + len = ed_pio_write_mbufs(sc, m, (u_short)buffer); sc->txb_len[sc->txb_new] = MAX(len, ETHER_MIN_LEN); sc->txb_inuse++; - /* - * Point to next buffer slot and wrap if necessary. - */ - sc->txb_new++; - if (sc->txb_new == sc->txb_cnt) + /* Point to next buffer slot and wrap if necessary. */ + if (++sc->txb_new == sc->txb_cnt) sc->txb_new = 0; if (sc->xmit_busy == 0) ed_xmit(ifp); /* * If there is BPF support in the configuration, tap off here. - * The following has support for converting trailer packets - * back to normal. - * XXX - support for trailer packets in BPF should be moved into - * the bpf code proper to avoid code duplication in all of - * the drivers. + * The following has support for converting trailer packets back to + * normal. + * XXX - Support for trailer packets in BPF should be moved into the + * bpf code proper to avoid code duplication in all of the drivers. */ #if NBPFILTER > 0 if (sc->bpf) { @@ -1483,26 +1429,22 @@ outloop: int off, datasize, resid; struct ether_header *eh; struct trailer_header trailer_header; - char ether_packet[ETHER_MAX_LEN]; - char *ep; + u_char ether_packet[ETHER_MAX_LEN], *ep; ep = ether_packet; /* * We handle trailers below: - * Copy ether header first, then residual data, - * then data. Put all this in a temporary buffer - * 'ether_packet' and send off to bpf. Since the - * system has generated this packet, we assume - * that all of the offsets in the packet are - * correct; if they're not, the system will almost - * certainly crash in m_copydata. - * We make no assumptions about how the data is - * arranged in the mbuf chain (i.e. how much - * data is in each mbuf, if mbuf clusters are - * used, etc.), which is why we use m_copydata - * to get the ether header rather than assume - * that this is located in the first mbuf. + * Copy ether header first, then residual data, then data. Put + * all this in a temporary buffer 'ether_packet' and send off + * to bpf. Since the system has generated this packet, we + * assume that all of the offsets in the packet are correct; if + * they're not, the system will almost certainly crash in + * m_copydata. We make no assumptions about how the data is + * arranged in the mbuf chain (i.e. how much data is in each + * mbuf, if mbuf clusters are used, etc.), which is why we use + * m_copydata to get the ether header rather than assume that + * this is located in the first mbuf. */ /* copy ether header */ m_copydata(m0, 0, sizeof(struct ether_header), ep); @@ -1516,17 +1458,17 @@ outloop: /* copy trailer_header into a data structure */ m_copydata(m0, off, sizeof(struct trailer_header), - &trailer_header.ether_type); + &trailer_header.ether_type); /* copy residual data */ m_copydata(m0, off+sizeof(struct trailer_header), - resid = ntohs(trailer_header.ether_residual) - - sizeof(struct trailer_header), ep); + resid = ntohs(trailer_header.ether_residual) - + sizeof(struct trailer_header), ep); ep += resid; /* copy data */ - m_copydata(m0, sizeof(struct ether_header), - datasize, ep); + m_copydata(m0, sizeof(struct ether_header), datasize, + ep); ep += datasize; /* restore original ether packet type */ @@ -1540,9 +1482,7 @@ outloop: m_freem(m0); - /* - * Loop back to the top to possibly buffer more packets - */ + /* Loop back to the top to possibly buffer more packets. */ goto outloop; } @@ -1550,95 +1490,86 @@ outloop: * Ethernet interface receiver interrupt. */ static inline void -ed_rint(unit) - int unit; +ed_rint(sc) + struct ed_softc *sc; { - register struct ed_softc *sc = &ed_softc[unit]; u_char boundry, current; u_short len; struct ed_ring packet_hdr; - char *packet_ptr; + caddr_t packet_ptr; - /* - * Set NIC to page 1 registers to get 'current' pointer - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA); + /* Set NIC to page 1 registers to get 'current' pointer. */ + outb(sc->nic_addr + ED_P0_CR, + ED_CR_PAGE_1 | ED_CR_STA | sc->ed_cr_rd2); /* * 'sc->next_packet' is the logical beginning of the ring-buffer - i.e. - * it points to where new data has been buffered. The 'CURR' - * (current) register points to the logical end of the ring-buffer - * - i.e. it points to where additional new data will be added. - * We loop here until the logical beginning equals the logical - * end (or in other words, until the ring-buffer is empty). + * it points to where new data has been buffered. The 'CURR' (current) + * register points to the logical end of the ring-buffer - i.e. it + * points to where additional new data will be added. We loop here + * until the logical beginning equals the logical end (or in other + * words, until the ring-buffer is empty). */ while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) { - /* get pointer to this buffer's header structure */ + /* Get pointer to this buffer's header structure. */ packet_ptr = sc->mem_ring + - (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE; + (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE; /* * The byte count includes the FCS - Frame Check Sequence (a - * 32 bit CRC). + * 32 bit CRC). */ if (sc->mem_shared) packet_hdr = *(struct ed_ring *)packet_ptr; else - ed_pio_readmem(sc, packet_ptr, (char *) &packet_hdr, - sizeof(packet_hdr)); + ed_pio_readmem(sc, (u_short)packet_ptr, + (caddr_t) &packet_hdr, sizeof(packet_hdr)); len = packet_hdr.count; if ((len >= ETHER_MIN_LEN) && (len <= ETHER_MAX_LEN)) { - /* - * Go get packet. len - 4 removes CRC from length. - */ + /* Go get packet. len - 4 removes CRC from length. */ ed_get_packet(sc, packet_ptr + 4, len - 4); ++sc->arpcom.ac_if.if_ipackets; } else { /* - * Really BAD...probably indicates that the ring pointers - * are corrupted. Also seen on early rev chips under - * high load - the byte order of the length gets switched. + * Really BAD...probably indicates that the ring + * pointers are corrupted. Also seen on early rev + * chips under high load - the byte order of the length + * gets switched. */ log(LOG_ERR, - "ed%d: NIC memory corrupt - invalid packet length %d\n", - unit, len); + "ed%d: NIC memory corrupt - invalid packet length %d\n", + sc->arpcom.ac_if.if_unit, len); ++sc->arpcom.ac_if.if_ierrors; - ed_reset(unit); + ed_reset(sc); return; } - /* - * Update next packet pointer - */ + /* Update next packet pointer. */ sc->next_packet = packet_hdr.next_packet; /* - * Update NIC boundry pointer - being careful to keep it - * one buffer behind. (as recommended by NS databook) + * Update NIC boundry pointer - being careful to keep it one + * buffer behind (as recommended by NS databook). */ boundry = sc->next_packet - 1; if (boundry < sc->rec_page_start) boundry = sc->rec_page_stop - 1; - /* - * Set NIC to page 0 registers to update boundry register - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); - + /* Set NIC to page 0 registers to update boundry register. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_STA | sc->ed_cr_rd2); outb(sc->nic_addr + ED_P0_BNRY, boundry); /* - * Set NIC to page 1 registers before looping to top (prepare to - * get 'CURR' current pointer) + * Set NIC to page 1 registers before looping to top (prepare + * to get 'CURR' current pointer). */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, + ED_CR_PAGE_1 | ED_CR_STA | sc->ed_cr_rd2); } } -/* - * Ethernet interface interrupt processor - */ +/* Ethernet interface interrupt processor. */ int edintr(unit) int unit; @@ -1646,188 +1577,169 @@ edintr(unit) struct ed_softc *sc = &ed_softc[unit]; u_char isr; - /* - * Set NIC to page 0 registers - */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + /* Set NIC to page 0 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_STA | sc->ed_cr_rd2); - /* - * loop until there are no more new interrupts - */ + /* Loop until there are no more new interrupts. */ while (isr = inb(sc->nic_addr + ED_P0_ISR)) { - /* - * reset all the bits that we are 'acknowledging' - * by writing a '1' to each bit position that was set - * (writing a '1' *clears* the bit) + * Reset all the bits that we are 'acknowledging' by writing a + * '1' to each bit position that was set. + * (Writing a '1' *clears* the bit.) */ outb(sc->nic_addr + ED_P0_ISR, isr); /* - * Handle transmitter interrupts. Handle these first - * because the receiver will reset the board under - * some conditions. + * Handle transmitter interrupts. Handle these first because + * the receiver will reset the board under some conditions. */ - if (isr & (ED_ISR_PTX|ED_ISR_TXE)) { - u_char collisions = inb(sc->nic_addr + ED_P0_NCR); + if (isr & (ED_ISR_PTX | ED_ISR_TXE)) { + u_char collisions = + inb(sc->nic_addr + ED_P0_NCR) & 0x0f; /* - * Check for transmit error. If a TX completed with an - * error, we end up throwing the packet away. Really + * Check for transmit error. If a TX completed with an + * error, we end up throwing the packet away. Really * the only error that is possible is excessive * collisions, and in this case it is best to allow the - * automatic mechanisms of TCP to backoff the flow. Of + * automatic mechanisms of TCP to backoff the flow. Of * course, with UDP we're screwed, but this is expected * when a network is heavily loaded. */ + (void) inb(sc->nic_addr + ED_P0_TSR); if (isr & ED_ISR_TXE) { - /* - * Excessive collisions (16) + * Excessive collisions (16). */ if ((inb(sc->nic_addr + ED_P0_TSR) & ED_TSR_ABT) - && (collisions == 0)) { + && (collisions == 0)) { /* - * When collisions total 16, the - * P0_NCR will indicate 0, and the - * TSR_ABT is set. + * When collisions total 16, the P0_NCR + * will indicate 0, and the TSR_ABT is + * set. */ collisions = 16; } - /* - * update output errors counter - */ + /* Update output errors counter. */ ++sc->arpcom.ac_if.if_oerrors; } else { /* * Update total number of successfully - * transmitted packets. + * transmitted packets. */ ++sc->arpcom.ac_if.if_opackets; } - /* - * reset tx busy and output active flags - */ + /* Reset TX busy and output active flags. */ sc->xmit_busy = 0; sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; - /* - * clear watchdog timer - */ + /* Clear watchdog timer. */ sc->arpcom.ac_if.if_timer = 0; /* * Add in total number of collisions on last - * transmission. + * transmission. */ sc->arpcom.ac_if.if_collisions += collisions; /* * Decrement buffer in-use count if not zero (can only - * be zero if a transmitter interrupt occured while - * not actually transmitting). + * be zero if a transmitter interrupt occured while not + * actually transmitting). * If data is ready to transmit, start it transmitting, - * otherwise defer until after handling receiver + * otherwise defer until after handling receiver. */ if (sc->txb_inuse && --sc->txb_inuse) ed_xmit(&sc->arpcom.ac_if); } - /* - * Handle receiver interrupts - */ - if (isr & (ED_ISR_PRX|ED_ISR_RXE|ED_ISR_OVW)) { - /* - * Overwrite warning. In order to make sure that a lockup - * of the local DMA hasn't occurred, we reset and - * re-init the NIC. The NSC manual suggests only a - * partial reset/re-init is necessary - but some - * chips seem to want more. The DMA lockup has been - * seen only with early rev chips - Methinks this - * bug was fixed in later revs. -DG - */ + /* Handle receiver interrupts. */ + if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) { + /* + * Overwrite warning. In order to make sure that a + * lockup of the local DMA hasn't occurred, we reset + * and re-init the NIC. The NSC manual suggests only a + * partial reset/re-init is necessary - but some chips + * seem to want more. The DMA lockup has been seen + * only with early rev chips - Methinks this bug was + * fixed in later revs. -DG + */ if (isr & ED_ISR_OVW) { ++sc->arpcom.ac_if.if_ierrors; #ifdef DIAGNOSTIC log(LOG_WARNING, - "ed%d: warning - receiver ring buffer overrun\n", - unit); + "ed%d: warning - receiver ring buffer overrun\n", + unit); #endif - /* - * Stop/reset/re-init NIC - */ - ed_reset(unit); + /* Stop/reset/re-init NIC. */ + ed_reset(sc); } else { - - /* - * Receiver Error. One or more of: CRC error, frame - * alignment error FIFO overrun, or missed packet. - */ + /* + * Receiver Error. One or more of: CRC error, + * frame alignment error FIFO overrun, or + * missed packet. + */ if (isr & ED_ISR_RXE) { ++sc->arpcom.ac_if.if_ierrors; #ifdef ED_DEBUG printf("ed%d: receive error %x\n", unit, - inb(sc->nic_addr + ED_P0_RSR)); + inb(sc->nic_addr + ED_P0_RSR)); #endif } /* - * Go get the packet(s) + * Go get the packet(s). * XXX - Doing this on an error is dubious - * because there shouldn't be any data to - * get (we've configured the interface to - * not accept packets with errors). + * because there shouldn't be any data to get + * (we've configured the interface to not + * accept packets with errors). */ /* * Enable 16bit access to shared memory first - * on WD/SMC boards. + * on WD/SMC boards. */ if (sc->isa16bit && - (sc->vendor == ED_VENDOR_WD_SMC)) { - + sc->vendor == ED_VENDOR_WD_SMC) { + sc->wd_laar_proto |= ED_WD_LAAR_M16EN; outb(sc->asic_addr + ED_WD_LAAR, - (sc->wd_laar_proto |= - ED_WD_LAAR_M16EN)); + sc->wd_laar_proto); } - ed_rint (unit); + ed_rint(sc); - /* disable 16bit access */ + /* Disable 16-bit access. */ if (sc->isa16bit && - (sc->vendor == ED_VENDOR_WD_SMC)) { - + sc->vendor == ED_VENDOR_WD_SMC) { + sc->wd_laar_proto &= ~ED_WD_LAAR_M16EN; outb(sc->asic_addr + ED_WD_LAAR, - (sc->wd_laar_proto &= - ~ED_WD_LAAR_M16EN)); + sc->wd_laar_proto); } } } /* - * If it looks like the transmitter can take more data, - * attempt to start output on the interface. - * This is done after handling the receiver to - * give the receiver priority. + * If it looks like the transmitter can take more data, attempt + * to start output on the interface. This is done after + * handling the receiver to give the receiver priority. */ if ((sc->arpcom.ac_if.if_flags & IFF_OACTIVE) == 0) ed_start(&sc->arpcom.ac_if); /* - * return NIC CR to standard state: page 0, remote DMA complete, - * start (toggling the TXP bit off, even if was just set - * in the transmit routine, is *okay* - it is 'edge' - * triggered from low to high) + * Return NIC CR to standard state: page 0, remote DMA + * complete, start (toggling the TXP bit off, even if was just + * set in the transmit routine, is *okay* - it is 'edge' + * triggered from low to high). */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_STA | sc->ed_cr_rd2); /* - * If the Network Talley Counters overflow, read them to - * reset them. It appears that old 8390's won't - * clear the ISR flag otherwise - resulting in an - * infinite loop. + * If the Network Talley Counters overflow, read them to reset + * them. It appears that old 8390's won't clear the ISR flag + * otherwise - resulting in an infinite loop. */ if (isr & ED_ISR_CNT) { (void) inb(sc->nic_addr + ED_P0_CNTR0); @@ -1838,8 +1750,7 @@ edintr(unit) } /* - * Process an ioctl request. This code needs some work - it looks - * pretty ugly. + * Process an ioctl request. This code needs some work - it looks pretty ugly. */ int ed_ioctl(ifp, command, data) @@ -1862,7 +1773,7 @@ ed_ioctl(ifp, command, data) switch (ifa->ifa_addr->sa_family) { #ifdef INET case AF_INET: - ed_init(ifp->if_unit); /* before arpwhohas */ + ed_init(sc); /* before arpwhohas */ /* * See if another station has *our* IP address. * i.e.: There is an address conflict! If a @@ -1870,84 +1781,78 @@ ed_ioctl(ifp, command, data) * console. */ ((struct arpcom *)ifp)->ac_ipaddr = - IA_SIN(ifa)->sin_addr; + IA_SIN(ifa)->sin_addr; arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr); break; #endif #ifdef NS - /* - * XXX - This code is probably wrong - */ + /* XXX - This code is probably wrong. */ case AF_NS: { register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); if (ns_nullhost(*ina)) ina->x_host = - *(union ns_host *)(sc->arpcom.ac_enaddr); + *(union ns_host *)(sc->arpcom.ac_enaddr); else { - /* - * + /* + * */ bcopy((caddr_t)ina->x_host.c_host, (caddr_t)sc->arpcom.ac_enaddr, - sizeof(sc->arpcom.ac_enaddr)); + sizeof(sc->arpcom.ac_enaddr)); } - /* - * Set new address - */ - ed_init(ifp->if_unit); + /* Set new address. */ + ed_init(sc); break; } #endif default: - ed_init(ifp->if_unit); + ed_init(sc); break; } break; case SIOCSIFFLAGS: - if (((ifp->if_flags & IFF_UP) == 0) && - (ifp->if_flags & IFF_RUNNING)) { + if ((ifp->if_flags & IFF_UP) == 0 && + (ifp->if_flags & IFF_RUNNING) != 0) { /* * If interface is marked down and it is running, then * stop it. */ - ed_stop(ifp->if_unit); + ed_stop(sc); ifp->if_flags &= ~IFF_RUNNING; - } else if ((ifp->if_flags & IFF_UP) && - ((ifp->if_flags & IFF_RUNNING) == 0)) { + } else if ((ifp->if_flags & IFF_UP) != 0 && + (ifp->if_flags & IFF_RUNNING) == 0) { /* * If interface is marked up and it is stopped, then * start it. */ - ed_init(ifp->if_unit); + ed_init(sc); } else { /* * Reset the interface to pick up changes in any other * flags that affect hardware registers. */ - ed_stop(ifp->if_unit); - ed_init(ifp->if_unit); + ed_stop(sc); + ed_init(sc); } break; case SIOCADDMULTI: case SIOCDELMULTI: - /* - * Update our multicast list. - */ - error = (command == SIOCADDMULTI) ? - ether_addmulti((struct ifreq *)data, &sc->arpcom): - ether_delmulti((struct ifreq *)data, &sc->arpcom); + /* Update our multicast list. */ + error = (command == SIOCADDMULTI) ? + ether_addmulti((struct ifreq *)data, &sc->arpcom): + ether_delmulti((struct ifreq *)data, &sc->arpcom); if (error == ENETRESET) { /* * Multicast list has changed; set the hardware filter * accordingly. */ - ed_stop(ifp->if_unit); /* XXX for ds_setmcaf? */ - ed_init(ifp->if_unit); + ed_stop(sc); /* XXX for ds_setmcaf? */ + ed_init(sc); error = 0; } break; @@ -1955,12 +1860,12 @@ ed_ioctl(ifp, command, data) error = EINVAL; } (void) splx(s); - return (error); + return error; } /* * Macro to calculate a new address within shared memory when given an offset - * from an address, taking into account ring-wrap. + * from an address, taking into account ring-wrap. */ #define ringoffset(sc, start, off, type) \ ((type)( ((caddr_t)(start)+(off) >= (sc)->mem_end) ? \ @@ -1970,21 +1875,22 @@ ed_ioctl(ifp, command, data) /* * Retreive packet from shared memory and send to the next level up via - * ether_input(). If there is a BPF listener, give a copy to BPF, too. + * ether_input(). If there is a BPF listener, give a copy to BPF, too. */ +void ed_get_packet(sc, buf, len) struct ed_softc *sc; - char *buf; + caddr_t buf; u_short len; { struct ether_header *eh; - struct mbuf *m, *head, *ed_ring_to_mbuf(); + struct mbuf *m, *head = 0, *ed_ring_to_mbuf(); u_short off; int resid; u_short etype; struct trailer_header trailer_header; - /* Allocate a header mbuf */ + /* Allocate a header mbuf. */ MGETHDR(m, M_DONTWAIT, MT_DATA); if (m == 0) goto bad; @@ -1993,13 +1899,13 @@ ed_get_packet(sc, buf, len) m->m_len = 0; head = m; - /* The following sillines is to make NFS happy */ + /* The following sillines is to make NFS happy. */ #define EROUND ((sizeof(struct ether_header) + 3) & ~3) #define EOFF (EROUND - sizeof(struct ether_header)) /* - * The following assumes there is room for - * the ether header in the header mbuf + * The following assumes there is room for the ether header in the + * header mbuf. */ head->m_data += EOFF; eh = mtod(head, struct ether_header *); @@ -2007,8 +1913,8 @@ ed_get_packet(sc, buf, len) if (sc->mem_shared) bcopy(buf, mtod(head, caddr_t), sizeof(struct ether_header)); else - ed_pio_readmem(sc, buf, mtod(head, caddr_t), - sizeof(struct ether_header)); + ed_pio_readmem(sc, (u_short)buf, mtod(head, caddr_t), + sizeof(struct ether_header)); buf += sizeof(struct ether_header); head->m_len += sizeof(struct ether_header); len -= sizeof(struct ether_header); @@ -2017,11 +1923,10 @@ ed_get_packet(sc, buf, len) /* * Deal with trailer protocol: - * If trailer protocol, calculate the datasize as 'off', - * which is also the offset to the trailer header. - * Set resid to the amount of packet data following the - * trailer header. - * Finally, copy residual data into mbuf chain. + * If trailer protocol, calculate the datasize as 'off', which is also + * the offset to the trailer header. Set resid to the amount of packet + * data following the trailer header. Finally, copy residual data into + * mbuf chain. */ if (etype >= ETHERTYPE_TRAIL && etype < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { @@ -2031,8 +1936,8 @@ ed_get_packet(sc, buf, len) /* * If we have shared memory, we can get info directly from the - * stored packet, otherwise we must get a local copy - * of the trailer header using PIO. + * stored packet, otherwise we must get a local copy of the + * trailer header using PIO. */ if (sc->mem_shared) { eh->ether_type = *ringoffset(sc, buf, off, u_short *); @@ -2040,9 +1945,8 @@ ed_get_packet(sc, buf, len) } else { struct trailer_header trailer_header; ed_pio_readmem(sc, - ringoffset(sc, buf, off, caddr_t), - (char *) &trailer_header, - sizeof(trailer_header)); + (u_short)ringoffset(sc, buf, off, caddr_t), + (caddr_t) &trailer_header, sizeof(trailer_header)); eh->ether_type = trailer_header.ether_type; resid = trailer_header.ether_residual; } @@ -2054,7 +1958,8 @@ ed_get_packet(sc, buf, len) if (resid < 0) goto bad; /* insanity */ - m = ed_ring_to_mbuf(sc, ringoffset(sc, buf, off+4, char *), head, resid); + m = ed_ring_to_mbuf(sc, ringoffset(sc, buf, off+4, caddr_t), + head, resid); if (m == 0) goto bad; @@ -2063,16 +1968,16 @@ ed_get_packet(sc, buf, len) } /* - * Pull packet off interface. Or if this was a trailer packet, - * the data portion is appended. + * Pull packet off interface. Or if this was a trailer packet, the + * data portion is appended. */ m = ed_ring_to_mbuf(sc, buf, m, len); if (m == 0) goto bad; #if NBPFILTER > 0 /* - * Check if there's a BPF listener on this interface. - * If so, hand off the raw packet to bpf. + * Check if there's a BPF listener on this interface. If so, hand off + * the raw packet to bpf. */ if (sc->bpf) { bpf_mtap(sc->bpf, head); @@ -2085,18 +1990,14 @@ ed_get_packet(sc, buf, len) if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) && (eh->ether_dhost[0] & 1) == 0 && bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr, - sizeof(eh->ether_dhost)) != 0 && - bcmp(eh->ether_dhost, etherbroadcastaddr, - sizeof(eh->ether_dhost)) != 0) { + sizeof(eh->ether_dhost)) != 0) { m_freem(head); return; } } #endif - /* - * Fix up data start offset in mbuf to point past ether header - */ + /* Fix up data start offset in mbuf to point past ether header. */ m_adj(head, sizeof(struct ether_header)); ether_input(&sc->arpcom.ac_if, eh, head); return; @@ -2107,242 +2008,222 @@ bad: if (head) } /* - * Supporting routines + * Supporting routines. */ /* - * Given a NIC memory source address and a host memory destination - * address, copy 'amount' from NIC to host using Programmed I/O. - * The 'amount' is rounded up to a word - okay as long as mbufs - * are word sized. - * This routine is currently Novell-specific. + * Given a NIC memory source address and a host memory destination address, + * copy 'amount' from NIC to host using Programmed I/O. The 'amount' is + * rounded up to a word - okay as long as mbufs are word sized. + * This routine is currently Novell-specific. */ void -ed_pio_readmem(sc,src,dst,amount) - struct ed_softc *sc; - unsigned short src; - unsigned char *dst; - unsigned short amount; +ed_pio_readmem(sc, src, dst, amount) + struct ed_softc *sc; + u_short src; + caddr_t dst; + u_short amount; { - unsigned short tmp_amount; + u_short tmp_amount; - /* select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + /* Select page 0 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); - /* round up to a word */ + /* Round up to a word. */ tmp_amount = amount; - if (amount & 1) ++amount; + if (amount & 1) + ++amount; - /* set up DMA byte count */ + /* Set up DMA byte count. */ outb(sc->nic_addr + ED_P0_RBCR0, amount); outb(sc->nic_addr + ED_P0_RBCR1, amount>>8); - /* set up source address in NIC mem */ + /* Set up source address in NIC mem. */ outb(sc->nic_addr + ED_P0_RSAR0, src); outb(sc->nic_addr + ED_P0_RSAR1, src>>8); outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA); - if (sc->isa16bit) { + if (sc->isa16bit) insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount/2); - } else + else insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount); } /* - * Stripped down routine for writing a linear buffer to NIC memory. - * Only used in the probe routine to test the memory. 'len' must - * be even. + * Stripped down routine for writing a linear buffer to NIC memory. Only used + * in the probe routine to test the memory. 'len' must be even. */ void -ed_pio_writemem(sc,src,dst,len) +ed_pio_writemem(sc, src, dst, len) struct ed_softc *sc; - char *src; - unsigned short dst; - unsigned short len; + caddr_t src; + u_short dst; + u_short len; { - int maxwait=100; /* about 120us */ + int maxwait = 100; /* about 120us */ - /* select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + /* Select page 0 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); - /* reset remote DMA complete flag */ + /* Reset remote DMA complete flag. */ outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); - /* set up DMA byte count */ + /* Set up DMA byte count. */ outb(sc->nic_addr + ED_P0_RBCR0, len); outb(sc->nic_addr + ED_P0_RBCR1, len>>8); - /* set up destination address in NIC mem */ + /* Set up destination address in NIC mem. */ outb(sc->nic_addr + ED_P0_RSAR0, dst); outb(sc->nic_addr + ED_P0_RSAR1, dst>>8); - /* set remote DMA write */ + /* Set remote DMA write. */ outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); if (sc->isa16bit) outsw(sc->asic_addr + ED_NOVELL_DATA, src, len/2); else outsb(sc->asic_addr + ED_NOVELL_DATA, src, len); + /* - * Wait for remote DMA complete. This is necessary because on the - * transmit side, data is handled internally by the NIC in bursts - * and we can't start another remote DMA until this one completes. - * Not waiting causes really bad things to happen - like the NIC - * irrecoverably jamming the ISA bus. + * Wait for remote DMA complete. This is necessary because on the + * transmit side, data is handled internally by the NIC in bursts and + * we can't start another remote DMA until this one completes. Not + * waiting causes really bad things to happen - like the NIC + * irrecoverably jamming the ISA bus. */ while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); } /* - * Write an mbuf chain to the destination NIC memory address using - * programmed I/O. + * Write an mbuf chain to the destination NIC memory address using programmed + * I/O. */ u_short -ed_pio_write_mbufs(sc,m,dst) +ed_pio_write_mbufs(sc, m, dst) struct ed_softc *sc; struct mbuf *m; - unsigned short dst; + u_short dst; { - unsigned short len, mb_offset; + u_short len, mb_offset; struct mbuf *mp; - unsigned char residual[2]; - int maxwait=100; /* about 120us */ + u_char residual[2]; + int maxwait = 100; /* about 120us */ -#ifdef notyet -#ifdef DEBUG - /* First, count up the total number of bytes to copy */ + /* First, count up the total number of bytes to copy. */ for (len = 0, mp = m; mp; mp = mp->m_next) len += mp->m_len; - if (len != m->m_pkthdr.len) { - int i; - printf("calculated len %d != packet header len %d, data:\n", - len, m->m_pkthdr.len); - mp = m; - while (m) { - for (i = 0; i < m->m_len; i++) - printf(" %02x", m->m_data[i]); - m = m->m_next; - } - } -#else - len = m->m_pkthdr.len; -#endif -#else - /* First, count up the total number of bytes to copy */ - for (len = 0, mp = m; mp; mp = mp->m_next) - len += mp->m_len; -#endif - /* select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + /* Select page 0 registers. */ + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); - /* reset remote DMA complete flag */ + /* Reset remote DMA complete flag. */ outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); - /* set up DMA byte count */ + /* Set up DMA byte count. */ outb(sc->nic_addr + ED_P0_RBCR0, len); outb(sc->nic_addr + ED_P0_RBCR1, len>>8); - /* set up destination address in NIC mem */ + /* Set up destination address in NIC mem. */ outb(sc->nic_addr + ED_P0_RSAR0, dst); outb(sc->nic_addr + ED_P0_RSAR1, dst>>8); - /* set remote DMA write */ + /* Set remote DMA write. */ outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); mb_offset = 0; /* * Transfer the mbuf chain to the NIC memory. - * The following code isn't too pretty. The problem is that we can only - * transfer words to the board, and if an mbuf has an odd number - * of bytes in it, this is a problem. It's not a simple matter of - * just removing a byte from the next mbuf (adjusting data++ and - * len--) because this will hose-over the mbuf chain which might - * be needed later for BPF. Instead, we maintain an offset - * (mb_offset) which let's us skip over the first byte in the - * following mbuf. + * The following code isn't too pretty. The problem is that we can + * only transfer words to the board, and if an mbuf has an odd number + * of bytes in it, this is a problem. It's not a simple matter of just + * removing a byte from the next mbuf (adjusting data++ and len--) + * because this will hose-over the mbuf chain which might be needed + * later for BPF. Instead, we maintain an offset (mb_offset) which + * let's us skip over the first byte in the following mbuf. */ while (m) { if (m->m_len - mb_offset) { if (sc->isa16bit) { if ((m->m_len - mb_offset) > 1) outsw(sc->asic_addr + ED_NOVELL_DATA, - mtod(m, caddr_t) + mb_offset, - (m->m_len - mb_offset) / 2); + mtod(m, caddr_t) + mb_offset, + (m->m_len - mb_offset) / 2); /* * if odd number of bytes, get the odd byte from * the next mbuf with data */ if ((m->m_len - mb_offset) & 1) { - /* first the last byte in current mbuf */ - residual[0] = *(mtod(m, caddr_t) - + m->m_len - 1); + /* First the last byte in current mbuf */ + residual[0] = *(mtod(m, caddr_t) + + m->m_len - 1); - /* advance past any empty mbufs */ - while (m->m_next && (m->m_next->m_len == 0)) + /* Advance past any empty mbufs. */ + while (m->m_next && + (m->m_next->m_len == 0)) m = m->m_next; if (m->m_next) { - /* remove first byte in next mbuf */ - residual[1] = *(mtod(m->m_next, caddr_t)); + /* Remove first byte in next mbuf. */ + residual[1] = *(mtod(m->m_next, + caddr_t)); mb_offset = 1; } outw(sc->asic_addr + ED_NOVELL_DATA, - *((unsigned short *) residual)); + *((u_short *) residual)); } else mb_offset = 0; } else - outsb(sc->asic_addr + ED_NOVELL_DATA, m->m_data, m->m_len); - + outsb(sc->asic_addr + ED_NOVELL_DATA, + m->m_data, m->m_len); } m = m->m_next; } /* - * Wait for remote DMA complete. This is necessary because on the - * transmit side, data is handled internally by the NIC in bursts - * and we can't start another remote DMA until this one completes. - * Not waiting causes really bad things to happen - like the NIC - * irrecoverably jamming the ISA bus. + * Wait for remote DMA complete. This is necessary because on the + * transmit side, data is handled internally by the NIC in bursts and + * we can't start another remote DMA until this one completes. Not + * waiting causes really bad things to happen - like the NIC + * irrecoverably jamming the ISA bus. */ while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); if (!maxwait) { - log(LOG_WARNING, "ed%d: remote transmit DMA failed to complete\n", - sc->arpcom.ac_if.if_unit); - ed_reset(sc->arpcom.ac_if.if_unit); + log(LOG_WARNING, + "ed%d: remote transmit DMA failed to complete\n", + sc->arpcom.ac_if.if_unit); + ed_reset(sc); } - return(len); + return len; } /* - * Given a source and destination address, copy 'amount' of a packet from - * the ring buffer into a linear destination buffer. Takes into account - * ring-wrap. + * Given a source and destination address, copy 'amount' of a packet from the + * ring buffer into a linear destination buffer. Takes into account ring-wrap. */ static inline char * -ed_ring_copy(sc,src,dst,amount) +ed_ring_copy(sc, src, dst, amount) struct ed_softc *sc; - char *src; - char *dst; + char *src; + char *dst; u_short amount; { u_short tmp_amount; - /* does copy wrap to lower addr in ring buffer? */ + /* Does copy wrap to lower addr in ring buffer? */ if (src + amount > sc->mem_end) { tmp_amount = sc->mem_end - src; - /* copy amount up to end of NIC memory */ + /* Copy amount up to end of NIC memory. */ if (sc->mem_shared) - bcopy(src,dst,tmp_amount); + bcopy(src, dst, tmp_amount); else - ed_pio_readmem(sc,src,dst,tmp_amount); + ed_pio_readmem(sc, (u_short)src, dst, tmp_amount); amount -= tmp_amount; src = sc->mem_ring; @@ -2352,24 +2233,23 @@ ed_ring_copy(sc,src,dst,amount) if (sc->mem_shared) bcopy(src, dst, amount); else - ed_pio_readmem(sc, src, dst, amount); + ed_pio_readmem(sc, (u_short)src, dst, amount); - return(src + amount); + return src + amount; } /* - * Copy data from receive buffer to end of mbuf chain - * allocate additional mbufs as needed. return pointer - * to last mbuf in chain. + * Copy data from receive buffer to end of mbuf chain allocate additional mbufs + * as needed. Return pointer to last mbuf in chain. * sc = ed info (softc) * src = pointer in ed ring buffer * dst = pointer to last mbuf in mbuf chain to copy to * amount = amount of data to copy */ struct mbuf * -ed_ring_to_mbuf(sc,src,dst,total_len) +ed_ring_to_mbuf(sc, src, dst, total_len) struct ed_softc *sc; - char *src; + caddr_t src; struct mbuf *dst; u_short total_len; { @@ -2378,22 +2258,24 @@ ed_ring_to_mbuf(sc,src,dst,total_len) while (total_len) { register u_short amount = min(total_len, M_TRAILINGSPACE(m)); - if (amount == 0) { /* no more data in this mbuf, alloc another */ + if (amount == 0) { /* + * No more data in this mbuf; alloc another. + * * If there is enough data for an mbuf cluster, attempt - * to allocate one of those, otherwise, a regular - * mbuf will do. + * to allocate one of those, otherwise, a regular mbuf + * will do. * Note that a regular mbuf is always required, even if - * we get a cluster - getting a cluster does not - * allocate any mbufs, and one is needed to assign - * the cluster to. The mbuf that has a cluster - * extension can not be used to contain data - only - * the cluster can contain data. + * we get a cluster - getting a cluster does not + * allocate any mbufs, and one is needed to assign the + * cluster to. The mbuf that has a cluster extension + * can not be used to contain data - only the cluster + * can contain data. */ dst = m; MGET(m, M_DONTWAIT, MT_DATA); if (m == 0) - return (0); + return 0; if (total_len >= MINCLSIZE) MCLGET(m, M_DONTWAIT); @@ -2403,17 +2285,18 @@ ed_ring_to_mbuf(sc,src,dst,total_len) amount = min(total_len, M_TRAILINGSPACE(m)); } - src = ed_ring_copy(sc, src, mtod(m, caddr_t) + m->m_len, amount); + src = ed_ring_copy(sc, src, mtod(m, caddr_t) + m->m_len, + amount); m->m_len += amount; total_len -= amount; } - return (m); + return m; } /* - * Compute crc for ethernet address + * Compute crc for ethernet address. */ u_long ds_crc(ep) @@ -2423,7 +2306,7 @@ ds_crc(ep) register u_long crc = 0xffffffffL; register int carry, i, j; register u_char b; - + for (i = 6; --i >= 0; ) { b = *ep++; for (j = 8; --j >= 0; ) { @@ -2439,8 +2322,8 @@ ds_crc(ep) } /* - * Compute the multicast address filter from the - * list of multicast addresses we need to listen to. + * Compute the multicast address filter from the list of multicast addresses we + * need to listen to. */ void ds_getmcaf(sc, mcaf) @@ -2451,10 +2334,10 @@ ds_getmcaf(sc, mcaf) register u_char *af = (u_char*)mcaf; register struct ether_multi *enm; register struct ether_multistep step; - + mcaf[0] = 0; mcaf[1] = 0; - + ETHER_FIRST_MULTI(step, &sc->arpcom, enm); while (enm != NULL) { if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { @@ -2462,10 +2345,9 @@ ds_getmcaf(sc, mcaf) mcaf[1] = 0xffffffff; return; } - index = ds_crc(enm->enm_addrlo, 6) >> 26; + index = ds_crc(enm->enm_addrlo) >> 26; af[index >> 3] |= 1 << (index & 7); - + ETHER_NEXT_MULTI(step, enm); } } -#endif diff --git a/sys/dev/isa/if_edreg.h b/sys/dev/isa/if_edreg.h index 7b85344e6e27..c54a28e33c6c 100644 --- a/sys/dev/isa/if_edreg.h +++ b/sys/dev/isa/if_edreg.h @@ -1,35 +1,7 @@ /* * National Semiconductor DS8390 NIC register definitions * - * $Id: if_edreg.h,v 1.5 1993/10/01 02:01:46 davidg Exp $ - * - * Modification history - * - * Revision 2.0 93/09/29 00:37:15 davidg - * changed double buffering flag to multi buffering - * made changes/additions for 3c503 multi-buffering - * ...companion to Rev. 2.0 of 'ed' driver. - * - * Revision 1.6 93/09/28 17:20:03 davidg - * first cut at PIO (e.g. NE1000/2000) support - * - * Revision 1.5 93/08/25 20:38:34 davidg - * added define for card type WD8013WC (10BaseT) - * - * Revision 1.4 93/08/14 20:07:55 davidg - * fix board type definition for 8013EP - * - * Revision 1.3 93/07/20 15:25:25 davidg - * added config flags for forcing 8/16bit mode and disabling double - * xmit buffers. - * - * Revision 1.2 93/06/23 03:03:05 davidg - * added some additional definitions for the 83C584 bus interface - * chip (SMC/WD boards) - * - * Revision 1.1 93/06/23 03:01:07 davidg - * Initial revision - * + * $Id: if_edreg.h,v 1.6 1994/02/12 07:16:33 mycroft Exp $ */ /* @@ -614,6 +586,11 @@ struct ed_ring { #define ED_WD_MSR_ADDR 0x3f /* Memory decode bits 18-13 */ #define ED_WD_MSR_MENB 0x40 /* Memory enable */ #define ED_WD_MSR_RST 0x80 /* Reset board */ +#ifdef TOSH_ETHER +#define ED_WD_MSR_POW 0x02 /* 0 = power save, 1 = normal (R/W) */ +#define ED_WD_MSR_BSY 0x04 /* gate array busy (R) */ +#define ED_WD_MSR_LEN 0x20 /* 0 = 16-bit, 1 = 8-bit (R/W) */ +#endif /* * Interface Configuration Register (ICR) @@ -628,6 +605,14 @@ struct ed_ring { #define ED_WD_ICR_RX7 0x20 /* recall all but i/o and LAN address */ #define ED_WD_ICR_RIO 0x40 /* recall i/o address */ #define ED_WD_ICR_STO 0x80 /* store to non-volatile memory */ +#ifdef TOSH_ETHER +#define ED_WD_ICR_MEM 0xe0 /* shared mem address A15-A13 (R/W) */ +#define ED_WD_ICR_MSZ1 0x0f /* memory size, 0x08 = 64K, 0x04 = 32K, + 0x02 = 16K, 0x01 = 8K */ + /* 64K can only be used if mem address + above 1MB */ + /* IAR holds address A23-A16 (R/W) */ +#endif /* * IO Address Register (IAR) @@ -687,10 +672,17 @@ struct ed_ring { #define ED_TYPE_WD8003S 0x02 #define ED_TYPE_WD8003E 0x03 #define ED_TYPE_WD8013EBT 0x05 +#define ED_TYPE_TOSHIBA1 0x11 /* named PCETA1 */ +#define ED_TYPE_TOSHIBA2 0x12 /* named PCETA2 */ +#define ED_TYPE_TOSHIBA3 0x13 /* named PCETB */ +#define ED_TYPE_TOSHIBA4 0x14 /* named PCETC */ +#define ED_TYPE_WD8013W 0x26 #define ED_TYPE_WD8013EP 0x27 #define ED_TYPE_WD8013WC 0x28 #define ED_TYPE_WD8013EBP 0x2c #define ED_TYPE_WD8013EPC 0x29 +#define ED_TYPE_SMC8216T 0x2a +#define ED_TYPE_SMC8216C 0x2b /* Bit definitions in card ID */ #define ED_WD_REV_MASK 0x1f /* Revision mask */ @@ -701,7 +693,11 @@ struct ed_ring { /* * Checksum total. All 8 bytes in station address PROM will add up to this */ +#ifdef TOSH_ETHER +#define ED_WD_ROM_CHECKSUM_TOTAL 0xA5 +#else #define ED_WD_ROM_CHECKSUM_TOTAL 0xFF +#endif #define ED_WD_NIC_OFFSET 0x10 /* I/O base offset to NIC */ #define ED_WD_ASIC_OFFSET 0 /* I/O base offset to ASIC */