s/TAB/space/ to separate instruction operands. There are quite a few
cpp macros and long src operands anyway that destroy any intended "neatly lined up" effect that TAB was supposed to achieve. White space change only, same object code is generated, but it is much easier on the eyes now.
This commit is contained in:
uwe
parent
82e011bdfd
commit
67862e14f4
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@ -1,4 +1,4 @@
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/* $NetBSD: exception_vector.S,v 1.20 2006/09/21 20:40:16 uwe Exp $ */
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/* $NetBSD: exception_vector.S,v 1.21 2007/03/14 22:38:00 uwe Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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@ -45,7 +45,7 @@
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#include <sh3/mmu_sh3.h>
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#include <sh3/mmu_sh4.h>
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__KERNEL_RCSID(0, "$NetBSD: exception_vector.S,v 1.20 2006/09/21 20:40:16 uwe Exp $")
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__KERNEL_RCSID(0, "$NetBSD: exception_vector.S,v 1.21 2007/03/14 22:38:00 uwe Exp $")
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/*
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@ -72,50 +72,50 @@ NENTRY(sh_vector_generic)
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__INTR_MASK(r0, r1)
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/* Identify exception cause */
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MOV (EXPEVT, r0)
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mov.l @r0, r0
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mov.l r0, @(TF_EXPEVT, r14) /* trapframe->tf_expevt = EXPEVT */
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mov.l @r0, r0
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mov.l r0, @(TF_EXPEVT, r14) /* trapframe->tf_expevt = EXPEVT */
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/* Get curlwp */
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mov.l _L.curlwp, r1
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mov.l @r1, r4 /* 1st arg */
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mov.l @r1, r4 /* 1st arg */
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/* Get TEA */
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MOV (TEA, r1)
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mov.l @r1, r6 /* 3rd arg */
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MOV (TEA, r1)
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mov.l @r1, r6 /* 3rd arg */
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/* Check TLB exception or not */
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mov.l _L.TLB_PROT_ST, r1
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cmp/hi r1, r0
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cmp/hi r1, r0
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bt 1f
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/* tlb_exception(curlwp, trapframe, TEA); */
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__EXCEPTION_UNBLOCK(r0, r1)
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mov.l _L.tlb, r0
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jsr @r0
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mov r14, r5 /* 2nd arg */
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mov r14, r5 /* 2nd arg */
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bra 2f
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nop
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/* general_exception(curlwp, trapframe, TEA); */
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1: mov r4, r8
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1: mov r4, r8
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#ifdef DDB
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mov #0, r2
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mov #0, r2
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MOV (BBRA, r1)
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mov.w r2, @r1 /* disable UBC */
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mov.l r2, @(TF_UBC, r14) /* clear trapframe->tf_ubc */
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mov.w r2, @r1 /* disable UBC */
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mov.l r2, @(TF_UBC, r14) /* clear trapframe->tf_ubc */
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#endif /* DDB */
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__EXCEPTION_UNBLOCK(r0, r1)
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mov.l _L.general, r0
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jsr @r0
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mov r14, r5 /* 2nd arg */
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mov r14, r5 /* 2nd arg */
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/* Check for ASTs on exit to user mode. */
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mov r8, r4
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mov.l _L.ast, r0
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mov r8, r4
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mov.l _L.ast, r0
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jsr @r0
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mov r14, r5
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mov r14, r5
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#ifdef DDB /* BBRA = trapframe->tf_ubc */
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__EXCEPTION_BLOCK(r0, r1)
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mov.l @(TF_UBC, r14), r0
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MOV (BBRA, r1)
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mov.w r0, @r1
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mov.w r0, @r1
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#endif /* DDB */
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2: __EXCEPTION_RETURN
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/* NOTREACHED */
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@ -145,48 +145,48 @@ VECTOR_END_MARKER(sh_vector_generic_end)
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NENTRY(sh3_vector_tlbmiss)
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__EXCEPTION_ENTRY
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mov #(SH3_TEA & 0xff), r0
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mov.l @r0, r6 /* 3rd arg: va = TEA */
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mov.l @r0, r6 /* 3rd arg: va = TEA */
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#if !defined(P1_STACK)
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/* Load kernel stack */
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mov.l __L.VPN_MASK, r0
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and r6, r0
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tst r0, r0 /* check VPN == 0 */
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and r6, r0
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tst r0, r0 /* check VPN == 0 */
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bt 6f
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mov.l _L.CURUPTE, r1
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mov.l @r1, r1
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mov #UPAGES,r3
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mov #1, r2
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4: mov.l @r1+, r7
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cmp/eq r7, r0 /* md_upte.addr: u-area VPN */
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mov.l @r1, r1
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mov #UPAGES, r3
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mov #1, r2
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4: mov.l @r1+, r7
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cmp/eq r7, r0 /* md_upte.addr: u-area VPN */
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bt 5f
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add #4, r1 /* skip md_upte.data */
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cmp/eq r2, r3
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add #4, r1 /* skip md_upte.data */
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cmp/eq r2, r3
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bf/s 4b
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add #1, r2
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add #1, r2
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bra 7f /* pull insn at 6f into delay slot */
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mov #(SH3_EXPEVT & 0xff), r0
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5: mov.l @r1, r2 /* md_upte.data: u-area PTE */
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5: mov.l @r1, r2 /* md_upte.data: u-area PTE */
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mov #(SH3_PTEL & 0xff), r1
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mov.l r2, @r1
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mov.l r2, @r1
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mov #(SH3_PTEH & 0xff), r1
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mov.l @r1, r2
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mov.l @r1, r2
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mov.l __L.VPN_MASK, r0
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and r2, r0
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mov.l r0, @r1 /* ASID 0 */
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and r2, r0
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mov.l r0, @r1 /* ASID 0 */
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ldtlb
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bra 3f
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mov.l r2, @r1 /* restore ASID */
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mov.l r2, @r1 /* restore ASID */
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#endif /* !P1_STACK */
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6: mov #(SH3_EXPEVT & 0xff), r0
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7: mov.l @r0, r0
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mov.l r0, @(TF_EXPEVT, r14) /* trapframe->tf_expevt = EXPEVT */
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mov.l 2f, r0
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mov.l @r0, r4 /* 1st arg */
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7: mov.l @r0, r0
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mov.l r0, @(TF_EXPEVT, r14) /* trapframe->tf_expevt = EXPEVT */
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mov.l 2f, r0
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mov.l @r0, r4 /* 1st arg */
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__INTR_MASK(r0, r1)
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__EXCEPTION_UNBLOCK(r0, r1)
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mov.l 1f, r0
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mov.l 1f, r0
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jsr @r0
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mov r14, r5 /* 2nd arg */
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mov r14, r5 /* 2nd arg */
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3: __EXCEPTION_RETURN
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.align 2
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2: .long _C_LABEL(curlwp)
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@ -211,17 +211,17 @@ VECTOR_END_MARKER(sh3_vector_tlbmiss_end)
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NENTRY(sh4_vector_tlbmiss)
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__EXCEPTION_ENTRY
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mov.l _L.TEA4, r0
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mov.l @r0, r6
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mov.l @r0, r6
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mov.l _L.EXPEVT4, r0
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mov.l @r0, r0
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mov.l r0, @(TF_EXPEVT, r14) /* trapframe->tf_expevt = EXPEVT */
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mov.l 2f, r0
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mov.l @r0, r4 /* 1st arg */
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mov.l @r0, r0
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mov.l r0, @(TF_EXPEVT, r14) /* trapframe->tf_expevt = EXPEVT */
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mov.l 2f, r0
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mov.l @r0, r4 /* 1st arg */
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__INTR_MASK(r0, r1)
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__EXCEPTION_UNBLOCK(r0, r1)
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mov.l 1f, r0
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mov.l 1f, r0
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jsr @r0
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mov r14, r5 /* 2nd arg */
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mov r14, r5 /* 2nd arg */
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__EXCEPTION_RETURN
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.align 2
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1: .long _C_LABEL(tlb_exception)
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@ -243,27 +243,27 @@ VECTOR_END_MARKER(sh4_vector_tlbmiss_end)
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*/
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NENTRY(sh_vector_interrupt)
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__EXCEPTION_ENTRY
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xor r0, r0
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mov.l r0, @(TF_EXPEVT, r14) /* (for debug) */
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stc r0_bank,r6 /* ssp */
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xor r0, r0
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mov.l r0, @(TF_EXPEVT, r14) /* (for debug) */
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stc r0_bank, r6 /* ssp */
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/* Enable exception for P3 access */
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__INTR_MASK(r0, r1)
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__EXCEPTION_UNBLOCK(r0, r1)
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/* uvmexp.intrs++ */
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mov.l __L.uvmexp.intrs, r0
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mov.l @r0, r1
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add #1 r1
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mov.l r1, @r0
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mov.l @r0, r1
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add #1 r1
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mov.l r1, @r0
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/* Dispatch interrupt handler */
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mov.l __L.intc_intr, r0
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jsr @r0 /* intc_intr(ssr, spc, ssp) */
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nop
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/* Check for ASTs on exit to user mode. */
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mov.l 1f, r0
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mov.l @r0, r4 /* 1st arg */
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mov.l 1f, r0
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mov.l @r0, r4 /* 1st arg */
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mov.l __L.ast, r0
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jsr @r0
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mov r14, r5 /* 2nd arg */
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mov r14, r5 /* 2nd arg */
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__EXCEPTION_RETURN
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.align 2
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1: .long _C_LABEL(curlwp)
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