Add PCIe CRS Software Visibility bit.

This commit is contained in:
msaitoh 2014-11-24 07:53:43 +00:00
parent 7839e5ad38
commit 6712ad7081
2 changed files with 5 additions and 3 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: pci_subr.c,v 1.132 2014/10/23 13:44:37 msaitoh Exp $ */
/* $NetBSD: pci_subr.c,v 1.133 2014/11/24 07:53:43 msaitoh Exp $ */
/*
* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.132 2014/10/23 13:44:37 msaitoh Exp $");
__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.133 2014/11/24 07:53:43 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_pci.h"
@ -1634,6 +1634,7 @@ pci_conf_print_pcie_cap(const pcireg_t *regs, int capoff)
/* Root Capability Register */
printf(" Root Capability Register: %04x\n",
reg >> 16);
onoff("CRS Software Visibility", reg, PCIE_RCR_CRS_SV);
/* Root Status Register */
reg = regs[o2i(capoff + PCIE_RSR)];

View File

@ -1,4 +1,4 @@
/* $NetBSD: pcireg.h,v 1.99 2014/10/23 13:45:41 msaitoh Exp $ */
/* $NetBSD: pcireg.h,v 1.100 2014/11/24 07:53:43 msaitoh Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@ -976,6 +976,7 @@ typedef u_int8_t pci_revision_t;
#define PCIE_RCR_SERR_FER __BIT(2) /* SERR on Fatal Error Enable */
#define PCIE_RCR_PME_IE __BIT(3) /* PME Interrupt Enable */
#define PCIE_RCR_CRS_SVE __BIT(4) /* CRS Software Visibility En */
#define PCIE_RCR_CRS_SV __BIT(16) /* CRS Software Visibility */
#define PCIE_RSR 0x20 /* Root Status Register */
#define PCIE_RSR_PME_REQESTER __BITS(15, 0) /* PME Requester ID */
#define PCIE_RSR_PME_STAT __BIT(16) /* PME Status */