While am79c930 controller allows unaligned access, bus_space_read/write
must be aligned. So awi_read/write_2/4 issues multiple bsr1/bsw1 when unaligned.
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@ -1,4 +1,4 @@
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/* $NetBSD: am79c930.c,v 1.4 2000/03/22 11:22:22 onoe Exp $ */
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/* $NetBSD: am79c930.c,v 1.5 2000/03/23 13:57:58 onoe Exp $ */
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/*-
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* Copyright (c) 1999 The NetBSD Foundation, Inc.
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@ -290,7 +290,16 @@ static void mem_write_2 (sc, off, val)
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u_int32_t off;
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u_int16_t val;
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{
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bus_space_write_2(sc->sc_memt, sc->sc_memh, off, val);
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bus_space_tag_t t = sc->sc_memt;
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bus_space_handle_t h = sc->sc_memh;
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/* could be unaligned */
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if ((off & 0x1) == 0)
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bus_space_write_2(t, h, off, val);
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else {
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bus_space_write_1(t, h, off, val & 0xff);
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bus_space_write_1(t, h, off+1, (val >> 8) & 0xff);
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}
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}
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static void mem_write_4 (sc, off, val)
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@ -298,7 +307,18 @@ static void mem_write_4 (sc, off, val)
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u_int32_t off;
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u_int32_t val;
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{
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bus_space_write_4(sc->sc_memt, sc->sc_memh, off, val);
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bus_space_tag_t t = sc->sc_memt;
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bus_space_handle_t h = sc->sc_memh;
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/* could be unaligned */
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if ((off & 0x3) == 0)
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bus_space_write_4(t, h, off, val);
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else {
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bus_space_write_1(t, h, off, val & 0xff);
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bus_space_write_1(t, h, off+1, (val >> 8) & 0xff);
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bus_space_write_1(t, h, off+2, (val >> 16) & 0xff);
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bus_space_write_1(t, h, off+3, (val >> 24) & 0xff);
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}
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}
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static void mem_write_bytes (sc, off, ptr, len)
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@ -322,14 +342,28 @@ static u_int16_t mem_read_2 (sc, off)
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struct am79c930_softc *sc;
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u_int32_t off;
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{
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/* could be unaligned */
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if ((off & 0x1) == 0)
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return bus_space_read_2(sc->sc_memt, sc->sc_memh, off);
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else
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return
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bus_space_read_1(sc->sc_memt, sc->sc_memh, off ) |
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(bus_space_read_1(sc->sc_memt, sc->sc_memh, off+1) << 8);
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}
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static u_int32_t mem_read_4 (sc, off)
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struct am79c930_softc *sc;
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u_int32_t off;
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{
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/* could be unaligned */
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if ((off & 0x3) == 0)
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return bus_space_read_4(sc->sc_memt, sc->sc_memh, off);
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else
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return
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bus_space_read_1(sc->sc_memt, sc->sc_memh, off ) |
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(bus_space_read_1(sc->sc_memt, sc->sc_memh, off+1) << 8) |
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(bus_space_read_1(sc->sc_memt, sc->sc_memh, off+2) <<16) |
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(bus_space_read_1(sc->sc_memt, sc->sc_memh, off+3) <<24);
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}
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