Simplify cpu option checks now that multiple CPU types are supported in a
single kernel.
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.12 1997/01/26 01:56:20 mark Exp $ */
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/* $NetBSD: cpu.h,v 1.13 1997/02/04 06:10:48 mark Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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@ -60,10 +60,14 @@
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* This reduces the overheads of LDR/STR aborts and no correction is required.
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*/
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#if (defined(CPU_ARM7) || defined(CPU_ARM7500)) && !defined(CPU_LATE_ABORT)
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#if defined(CPU_ARM7) && !defined(CPU_LATE_ABORT)
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#error "option CPU_LATE_ABORT is required for ARM7 configurations"
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#endif
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#if defined(CPU_ARM7500) && !defined(CPU_ARM7)
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#error "option CPU_ARM7 is required with CPU_ARM7500"
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#endif
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#ifdef CPU_ARM7500
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#ifdef CPU_ARM6
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#error "CPU options CPU_ARM6 and CPU_ARM7500 are not compatible"
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@ -76,21 +80,6 @@
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#endif
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#endif /* CPU_ARM7500 */
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#ifdef CPU_SA110
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#ifdef CPU_ARM6
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#error "CPU options CPU_SA110 and CPU_ARM6 are not compatible"
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#endif
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#ifdef CPU_ARM7
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#error "CPU options CPU_SA110 and CPU_ARM7 are not compatible"
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#endif
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#ifdef CPU_ARM8
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#error "CPU options CPU_SA110 and CPU_ARM8 are not compatible"
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#endif
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#ifdef CPU_LATE_ABORT
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#error "cpu options CPU_SA110 and CPU_LATE_ABORT are not compatible"
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#endif
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#endif /* CPU_SA110 */
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#define COPY_SIGCODE /* copy sigcode above user stack in exec */
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/*
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@ -137,7 +126,7 @@
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#define ID_ARM700 0x00007000
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#define ID_ARM710 0x00007100
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#define ID_ARM810 0x00008100
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#define ID_SARM110 0x0000a100
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#define ID_SA110 0x0000a100
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#define CPU_ID_REVISION_MASK 0x0000000f
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#define CPU_CONTROL_MMU_ENABLE 0x0001
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@ -230,7 +219,6 @@
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#define cpu_wait(p) /* nothing */
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#ifndef _LOCORE
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void tlbflush __P((void));
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void need_resched __P((void));
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void need_proftick __P((struct proc *p));
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@ -243,7 +231,7 @@ extern int current_intr_depth;
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*/
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#define signotify(p) setsoftast()
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#endif /* !_ARM32_CPU_H_ */
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/* End of cpu.h */
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