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Force write-back of D-cache after doing DDB writes on mips3. Flushing

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the Icache is not sufficient: a mips3 can write a new insn into
writeback L1 Dcache, leaving stale instructions in the mixed L2 cache.
This commit is contained in:
jonathan 1997-07-07 04:55:27 +00:00
parent 919bc0ce92
commit 65e2c70353
1 changed files with 5 additions and 3 deletions
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8
sys/arch/mips/mips/db_interface.c
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@ -1,4 +1,4 @@
/* $NetBSD: db_interface.c,v 1.1 1997/07/07 03:54:37 jonathan Exp $ */
/* $NetBSD: db_interface.c,v 1.2 1997/07/07 04:55:27 jonathan Exp $ */
/*
* Mach Operating System
@ -84,6 +84,7 @@ kdbpoke(vm_offset_t addr, int newval)
wbflush();
if (CPUISMIPS3) {
#ifdef MIPS3
mips3_HitFlushDCache((vm_offset_t) addr, sizeof(int));
mips3_FlushICache((vm_offset_t) addr, sizeof(int));
#endif
} else {
@ -197,9 +198,10 @@ db_write_bytes(addr, size, data)
register size_t size;
register char *data;
{
/*XXX*/ printf("db_write_bytes(%lx, %d, %p, val %x)\n", addr, size, data,
#ifdef DEBUG_DDB
printf("db_write_bytes(%lx, %d, %p, val %x)\n", addr, size, data,
(addr &3 ) == 0? *(u_int*)addr: -1);
#endif
while (size >= 4)
kdbpoke(addr++, *(int*)data), addr += 4, size -= 4;