x86 atomic ops.
This commit is contained in:
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parent
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65728ed419
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@ -0,0 +1,7 @@
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# $NetBSD: Makefile.inc,v 1.2 2007/11/28 01:33:47 ad Exp $
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.if defined(LIB) && (${LIB} == "kern")
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SRCS+= atomic.S
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.endif
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@ -0,0 +1,268 @@
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/* $NetBSD: atomic.S,v 1.1 2007/11/28 01:33:47 ad Exp $ */
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/*-
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* Copyright (c) 2007 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe, and by Andrew Doran.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
|
||||
* are met:
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by the NetBSD
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||||
* Foundation, Inc. and its contributors.
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||||
* 4. Neither the name of The NetBSD Foundation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
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||||
*
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||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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#ifdef _KERNEL
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#define LOCK(n) .Lpatch/**/n: lock
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#define ALIAS(f, t) STRONG_ALIAS(f,t)
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#define END(a,b) .align b; LABEL(a)
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#else
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#define LOCK(n) lock
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#define ALIAS(f, t) WEAK_ALIAS(f,t)
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#define END(a,b) /* nothing */
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#endif
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.text
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NENTRY(_atomic_add_32)
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movl 4(%esp), %edx
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movl 8(%esp), %eax
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LOCK(1)
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addl %eax, (%edx)
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ret
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NENTRY(_atomic_add_32_nv)
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movl 4(%esp), %edx
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movl 8(%esp), %eax
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movl %eax, %ecx
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LOCK(2)
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xaddl %eax, (%edx)
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addl %ecx, %eax
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ret
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NENTRY(_atomic_and_32)
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movl 4(%esp), %edx
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movl 8(%esp), %eax
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LOCK(3)
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andl %eax, (%edx)
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ret
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NENTRY(_atomic_and_32_nv)
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movl 4(%esp), %edx
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movl (%edx), %eax
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1:
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movl %eax, %ecx
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andl 8(%esp), %ecx
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LOCK(4)
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cmpxchgl %ecx, (%edx)
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jnz 1b
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movl %ecx, %eax
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ret
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NENTRY(_atomic_dec_32)
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movl 4(%esp), %edx
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LOCK(5)
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decl (%edx)
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ret
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NENTRY(_atomic_dec_32_nv)
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movl 4(%esp), %edx
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movl $-1, %eax
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LOCK(6)
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xaddl %eax, (%edx)
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decl %eax
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ret
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NENTRY(_atomic_inc_32)
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movl 4(%esp), %edx
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LOCK(7)
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incl (%edx)
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ret
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NENTRY(_atomic_inc_32_nv)
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movl 4(%esp), %edx
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movl $1, %eax
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LOCK(8)
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xaddl %eax, (%edx)
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incl %eax
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ret
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NENTRY(_atomic_or_32)
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movl 4(%esp), %edx
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movl 8(%esp), %eax
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LOCK(9)
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orl %eax, (%edx)
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ret
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NENTRY(_atomic_or_32_nv)
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movl 4(%esp), %edx
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movl (%edx), %eax
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1:
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movl %eax, %ecx
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orl 8(%esp), %ecx
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LOCK(10)
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cmpxchgl %ecx, (%edx)
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jnz 1b
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movl %ecx, %eax
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ret
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NENTRY(_atomic_swap_32)
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movl 4(%esp), %edx
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movl 8(%esp), %eax
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LOCK(11)
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xchgl %eax, (%edx)
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ret
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NENTRY(_atomic_cas_32)
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movl 4(%esp), %edx
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movl 8(%esp), %eax
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movl 12(%esp), %ecx
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LOCK(12)
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cmpxchgl %ecx, (%edx)
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/* %eax now contains the old value */
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ret
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NENTRY(_membar_consumer)
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LOCK(13)
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addl $0, -4(%esp)
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ret
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END(membar_consumer_end, 8)
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NENTRY(_membar_producer)
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/* A store is enough */
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movl $0, -4(%esp)
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ret
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END(membar_producer_end, 8)
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NENTRY(_membar_enter)
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/* A store is enough */
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movl $0, -4(%esp)
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ret
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END(membar_enter_end, 8)
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NENTRY(_membar_exit)
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/* A store is enough */
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movl $0, -4(%esp)
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ret
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END(membar_exit_end, 8)
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NENTRY(_membar_sync)
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LOCK(14)
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addl $0, -4(%esp)
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ret
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END(membar_sync_end, 8)
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#ifdef _KERNEL
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NENTRY(membar_nop)
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/* Nothing */
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ret
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END(membar_nop_end, 8)
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NENTRY(sse2_lfence)
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lfence
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ret
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END(sse2_lfence_end, 8)
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NENTRY(sse2_mfence)
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mfence
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ret
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END(sse2_mfence_end, 8)
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atomic_lockpatch:
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.globl atomic_lockpatch
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.long .Lpatch1, .Lpatch2, .Lpatch3, .Lpatch4, .Lpatch5
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.long .Lpatch6, .Lpatch7, .Lpatch8, .Lpatch9, .Lpatch10
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.long .Lpatch11, .Lpatch12, .Lpatch13, .Lpatch14, 0
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#endif /* _KERNEL */
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ALIAS(atomic_add_32,_atomic_add_32)
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ALIAS(atomic_add_uint,_atomic_add_32)
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ALIAS(atomic_add_ulong,_atomic_add_32)
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ALIAS(atomic_add_ptr,_atomic_add_32)
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ALIAS(atomic_add_32_nv,_atomic_add_32_nv)
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ALIAS(atomic_add_uint_nv,_atomic_add_32_nv)
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ALIAS(atomic_add_ulong_nv,_atomic_add_32_nv)
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ALIAS(atomic_add_ptr_nv,_atomic_add_32_nv)
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ALIAS(atomic_and_32,_atomic_and_32)
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ALIAS(atomic_and_uint,_atomic_and_32)
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ALIAS(atomic_and_ulong,_atomic_and_32)
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ALIAS(atomic_and_ptr,_atomic_and_32)
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ALIAS(atomic_and_32_nv,_atomic_and_32_nv)
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ALIAS(atomic_and_uint_nv,_atomic_and_32_nv)
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ALIAS(atomic_and_ulong_nv,_atomic_and_32_nv)
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ALIAS(atomic_and_ptr_nv,_atomic_and_32_nv)
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ALIAS(atomic_dec_32,_atomic_dec_32)
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ALIAS(atomic_dec_uint,_atomic_dec_32)
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ALIAS(atomic_dec_ulong,_atomic_dec_32)
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ALIAS(atomic_dec_ptr,_atomic_dec_32)
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ALIAS(atomic_dec_32_nv,_atomic_dec_32_nv)
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ALIAS(atomic_dec_uint_nv,_atomic_dec_32_nv)
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ALIAS(atomic_dec_ulong_nv,_atomic_dec_32_nv)
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ALIAS(atomic_dec_ptr_nv,_atomic_dec_32_nv)
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ALIAS(atomic_inc_32,_atomic_inc_32)
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ALIAS(atomic_inc_uint,_atomic_inc_32)
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ALIAS(atomic_inc_ulong,_atomic_inc_32)
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ALIAS(atomic_inc_ptr,_atomic_inc_32)
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ALIAS(atomic_inc_32_nv,_atomic_inc_32_nv)
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ALIAS(atomic_inc_uint_nv,_atomic_inc_32_nv)
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ALIAS(atomic_inc_ulong_nv,_atomic_inc_32_nv)
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ALIAS(atomic_inc_ptr_nv,_atomic_inc_32_nv)
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ALIAS(atomic_or_32,_atomic_or_32)
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ALIAS(atomic_or_uint,_atomic_or_32)
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ALIAS(atomic_or_ulong,_atomic_or_32)
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ALIAS(atomic_or_ptr,_atomic_or_32)
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ALIAS(atomic_or_32_nv,_atomic_or_32_nv)
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ALIAS(atomic_or_uint_nv,_atomic_or_32_nv)
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ALIAS(atomic_or_ulong_nv,_atomic_or_32_nv)
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ALIAS(atomic_or_ptr_nv,_atomic_or_32_nv)
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ALIAS(atomic_swap_32,_atomic_swap_32)
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ALIAS(atomic_swap_uint,_atomic_swap_32)
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ALIAS(atomic_swap_ulong,_atomic_swap_32)
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ALIAS(atomic_swap_ptr,_atomic_swap_32)
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ALIAS(atomic_cas_32,_atomic_cas_32)
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ALIAS(atomic_cas_uint,_atomic_cas_32)
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ALIAS(atomic_cas_ulong,_atomic_cas_32)
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ALIAS(atomic_cas_ptr,_atomic_cas_32)
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ALIAS(membar_consumer,_membar_consumer)
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ALIAS(membar_producer,_membar_producer)
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ALIAS(membar_enter,_membar_enter)
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ALIAS(membar_exit,_membar_exit)
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ALIAS(membar_sync,_membar_sync)
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@ -0,0 +1,7 @@
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# $NetBSD: Makefile.inc,v 1.2 2007/11/28 01:33:48 ad Exp $
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.if defined(LIB) && (${LIB} == "kern")
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SRCS+= atomic.S
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.endif
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@ -0,0 +1,350 @@
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/* $NetBSD: atomic.S,v 1.1 2007/11/28 01:33:49 ad Exp $ */
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/*-
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* Copyright (c) 2007 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe, and by Andrew Doran.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
|
||||
* are met:
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
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||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by the NetBSD
|
||||
* Foundation, Inc. and its contributors.
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||||
* 4. Neither the name of The NetBSD Foundation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
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||||
*
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||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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#ifdef _KERNEL
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#define LOCK(n) .Lpatch/**/n: lock
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#define ALIAS(f, t) STRONG_ALIAS(f,t)
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#define END(a,b) .align b; LABEL(a)
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#else
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#define LOCK(n) lock
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#define ALIAS(f, t) WEAK_ALIAS(f,t)
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#define END(a,b) /* nothing */
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#endif
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.text
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/* 32-bit */
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NENTRY(_atomic_add_32)
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LOCK(1)
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addl %esi, (%rdi)
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ret
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NENTRY(_atomic_add_32_nv)
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movl %esi, %eax
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LOCK(2)
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xaddl %eax, (%rdi)
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addl %esi, %eax
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ret
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NENTRY(_atomic_and_32)
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LOCK(3)
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andl %esi, (%rdi)
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ret
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NENTRY(_atomic_and_32_nv)
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movl (%rdi), %eax
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1:
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movl %eax, %ecx
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andl %esi, %ecx
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LOCK(4)
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cmpxchgl %ecx, (%rdi)
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jnz 1b
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movl %ecx, %eax
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ret
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NENTRY(_atomic_dec_32)
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LOCK(5)
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decl (%rdi)
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ret
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NENTRY(_atomic_dec_32_nv)
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movl $-1, %eax
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LOCK(6)
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xaddl %eax, (%rdi)
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decl %eax
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ret
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NENTRY(_atomic_inc_32)
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LOCK(7)
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incl (%rdi)
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ret
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NENTRY(_atomic_inc_32_nv)
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movl $1, %eax
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LOCK(8)
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xaddl %eax, (%rdi)
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incl %eax
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ret
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NENTRY(_atomic_or_32)
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LOCK(9)
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orl %esi, (%rdi)
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ret
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NENTRY(_atomic_or_32_nv)
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movl (%rdi), %eax
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1:
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movl %eax, %ecx
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orl %esi, %ecx
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LOCK(10)
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cmpxchgl %ecx, (%rdi)
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jnz 1b
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movl %ecx, %eax
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ret
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NENTRY(_atomic_swap_32)
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LOCK(11)
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xchgl %esi, (%rdi)
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ret
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NENTRY(_atomic_cas_32)
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movl %esi, %eax
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LOCK(12)
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cmpxchgl %edx, (%rdi)
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/* %eax now contains the old value */
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ret
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/* 64-bit */
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NENTRY(_atomic_add_64)
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LOCK(13)
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addq %rsi, (%rdi)
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ret
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NENTRY(_atomic_add_64_nv)
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movq %rsi, %rax
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LOCK(14)
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xaddq %rax, (%rdi)
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addq %rsi, %rax
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ret
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NENTRY(_atomic_and_64)
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LOCK(15)
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andq %rsi, (%rdi)
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ret
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NENTRY(_atomic_and_64_nv)
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movq (%rdi), %rax
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1:
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movq %rax, %rcx
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andq %rsi, %rcx
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LOCK(16)
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cmpxchgq %rcx, (%rdi)
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jnz 1b
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movq %rcx, %rax
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ret
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NENTRY(_atomic_dec_64)
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LOCK(17)
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decq (%rdi)
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ret
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NENTRY(_atomic_dec_64_nv)
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movq $-1, %rax
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LOCK(18)
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xaddq %rax, (%rdi)
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decq %rax
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ret
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NENTRY(_atomic_inc_64)
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LOCK(19)
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incq (%rdi)
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ret
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NENTRY(_atomic_inc_64_nv)
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movq $1, %rax
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LOCK(20)
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xaddq %rax, (%rdi)
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incq %rax
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ret
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NENTRY(_atomic_or_64)
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LOCK(21)
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orq %rsi, (%rdi)
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ret
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NENTRY(_atomic_or_64_nv)
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movq (%rdi), %rax
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1:
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movq %rax, %rcx
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orq %rsi, %rcx
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LOCK(22)
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cmpxchgq %rcx, (%rdi)
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jnz 1b
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movq %rcx, %rax
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ret
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||||
NENTRY(_atomic_swap_64)
|
||||
LOCK(23)
|
||||
xchgq %rsi, (%rdi)
|
||||
ret
|
||||
|
||||
NENTRY(_atomic_cas_64)
|
||||
movq %rsi, %rax
|
||||
LOCK(24)
|
||||
cmpxchgl %edx, (%rdi)
|
||||
/* %eax now contains the old value */
|
||||
ret
|
||||
|
||||
/* memory barriers */
|
||||
|
||||
NENTRY(_membar_consumer)
|
||||
LOCK(25)
|
||||
addq $0, -8(%rsp)
|
||||
ret
|
||||
END(membar_consumer_end, 8)
|
||||
|
||||
NENTRY(_membar_producer)
|
||||
/* A store is enough */
|
||||
movq $0, -8(%rsp)
|
||||
ret
|
||||
END(membar_producer_end, 8)
|
||||
|
||||
NENTRY(_membar_enter)
|
||||
/* A store is enough */
|
||||
movq $0, -8(%rsp)
|
||||
ret
|
||||
END(membar_enter_end, 8)
|
||||
|
||||
NENTRY(_membar_exit)
|
||||
/* A store is enough */
|
||||
movq $0, -8(%rsp)
|
||||
ret
|
||||
END(membar_exit_end, 8)
|
||||
|
||||
NENTRY(_membar_sync)
|
||||
LOCK(26)
|
||||
addq $0, -8(%rsp)
|
||||
ret
|
||||
END(membar_sync_end, 8)
|
||||
|
||||
#ifdef _KERNEL
|
||||
NENTRY(membar_nop)
|
||||
/* Nothing */
|
||||
ret
|
||||
END(membar_nop_end, 8)
|
||||
|
||||
NENTRY(sse2_lfence)
|
||||
lfence
|
||||
ret
|
||||
END(sse2_lfence_end, 8)
|
||||
|
||||
NENTRY(sse2_mfence)
|
||||
mfence
|
||||
ret
|
||||
END(sse2_mfence_end, 8)
|
||||
|
||||
atomic_lockpatch:
|
||||
.globl atomic_lockpatch
|
||||
.long .Lpatch1, .Lpatch2, .Lpatch3, .Lpatch4, .Lpatch5
|
||||
.long .Lpatch6, .Lpatch7, .Lpatch8, .Lpatch9, .Lpatch10
|
||||
.long .Lpatch11, .Lpatch12, .Lpatch13, .Lpatch14, .Lpatch15
|
||||
.long .Lpatch16, .Lpatch17, .Lpatch18, .Lpatch19, .Lpatch20
|
||||
.long .Lpatch21, .Lpatch22, .Lpatch23, .Lpatch24, .Lpatch25
|
||||
.long .Lpatch26, 0
|
||||
#endif /* _KERNEL */
|
||||
|
||||
ALIAS(atomic_add_32,_atomic_add_32)
|
||||
ALIAS(atomic_add_64,_atomic_add_64)
|
||||
ALIAS(atomic_add_uint,_atomic_add_32)
|
||||
ALIAS(atomic_add_ulong,_atomic_add_64)
|
||||
ALIAS(atomic_add_ptr,_atomic_add_64)
|
||||
|
||||
ALIAS(atomic_add_32_nv,_atomic_add_32_nv)
|
||||
ALIAS(atomic_add_64_nv,_atomic_add_64_nv)
|
||||
ALIAS(atomic_add_uint_nv,_atomic_add_32_nv)
|
||||
ALIAS(atomic_add_ulong_nv,_atomic_add_64_nv)
|
||||
ALIAS(atomic_add_ptr_nv,_atomic_add_64_nv)
|
||||
|
||||
ALIAS(atomic_and_32,_atomic_and_32)
|
||||
ALIAS(atomic_and_64,_atomic_and_64)
|
||||
ALIAS(atomic_and_uint,_atomic_and_32)
|
||||
ALIAS(atomic_and_ulong,_atomic_and_64)
|
||||
ALIAS(atomic_and_ptr,_atomic_and_64)
|
||||
|
||||
ALIAS(atomic_and_32_nv,_atomic_and_32_nv)
|
||||
ALIAS(atomic_and_64_nv,_atomic_and_64_nv)
|
||||
ALIAS(atomic_and_uint_nv,_atomic_and_32_nv)
|
||||
ALIAS(atomic_and_ulong_nv,_atomic_and_64_nv)
|
||||
ALIAS(atomic_and_ptr_nv,_atomic_and_64_nv)
|
||||
|
||||
ALIAS(atomic_dec_32,_atomic_dec_32)
|
||||
ALIAS(atomic_dec_64,_atomic_dec_64)
|
||||
ALIAS(atomic_dec_uint,_atomic_dec_32)
|
||||
ALIAS(atomic_dec_ulong,_atomic_dec_64)
|
||||
ALIAS(atomic_dec_ptr,_atomic_dec_64)
|
||||
|
||||
ALIAS(atomic_dec_32_nv,_atomic_dec_32_nv)
|
||||
ALIAS(atomic_dec_64_nv,_atomic_dec_64_nv)
|
||||
ALIAS(atomic_dec_uint_nv,_atomic_dec_32_nv)
|
||||
ALIAS(atomic_dec_ulong_nv,_atomic_dec_64_nv)
|
||||
ALIAS(atomic_dec_ptr_nv,_atomic_dec_64_nv)
|
||||
|
||||
ALIAS(atomic_inc_32,_atomic_inc_32)
|
||||
ALIAS(atomic_inc_64,_atomic_inc_64)
|
||||
ALIAS(atomic_inc_uint,_atomic_inc_32)
|
||||
ALIAS(atomic_inc_ulong,_atomic_inc_64)
|
||||
ALIAS(atomic_inc_ptr,_atomic_inc_64)
|
||||
|
||||
ALIAS(atomic_inc_32_nv,_atomic_inc_32_nv)
|
||||
ALIAS(atomic_inc_64_nv,_atomic_inc_64_nv)
|
||||
ALIAS(atomic_inc_uint_nv,_atomic_inc_32_nv)
|
||||
ALIAS(atomic_inc_ulong_nv,_atomic_inc_64_nv)
|
||||
ALIAS(atomic_inc_ptr_nv,_atomic_inc_64_nv)
|
||||
|
||||
ALIAS(atomic_or_32,_atomic_or_32)
|
||||
ALIAS(atomic_or_uint,_atomic_or_32)
|
||||
ALIAS(atomic_or_ulong,_atomic_or_64)
|
||||
ALIAS(atomic_or_ptr,_atomic_or_64)
|
||||
|
||||
ALIAS(atomic_or_32_nv,_atomic_or_32_nv)
|
||||
ALIAS(atomic_or_64_nv,_atomic_or_64_nv)
|
||||
ALIAS(atomic_or_uint_nv,_atomic_or_32_nv)
|
||||
ALIAS(atomic_or_ulong_nv,_atomic_or_64_nv)
|
||||
ALIAS(atomic_or_ptr_nv,_atomic_or_64_nv)
|
||||
|
||||
ALIAS(atomic_swap_32,_atomic_swap_32)
|
||||
ALIAS(atomic_swap_64,_atomic_swap_64)
|
||||
ALIAS(atomic_swap_uint,_atomic_swap_32)
|
||||
ALIAS(atomic_swap_ulong,_atomic_swap_64)
|
||||
ALIAS(atomic_swap_ptr,_atomic_swap_64)
|
||||
|
||||
ALIAS(atomic_cas_32,_atomic_cas_32)
|
||||
ALIAS(atomic_cas_64,_atomic_cas_64)
|
||||
ALIAS(atomic_cas_uint,_atomic_cas_32)
|
||||
ALIAS(atomic_cas_ulong,_atomic_cas_64)
|
||||
ALIAS(atomic_cas_ptr,_atomic_cas_64)
|
||||
|
||||
ALIAS(membar_consumer,_membar_consumer)
|
||||
ALIAS(membar_producer,_membar_producer)
|
||||
ALIAS(membar_enter,_membar_enter)
|
||||
ALIAS(membar_exit,_membar_exit)
|
||||
ALIAS(membar_sync,_membar_sync)
|
||||
Loading…
Reference in New Issue