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Pull code that maps the kernel segment table cache invalidated for 040/060,

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to reduce diffs from other m68k ports.

Tested on HP362 (030) and HP382 (040), and no visible performance difference.
(what should we do per "for the 68040 not strictly necessary but
 recommended by Motorola" comment?)
This commit is contained in:
tsutsui 2011-01-02 05:18:04 +00:00
parent 3822046d71
commit 65021e823c
1 changed files with 21 additions and 4 deletions
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25
sys/arch/hp300/hp300/pmap_bootstrap.c
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@ -1,4 +1,4 @@
/* $NetBSD: pmap_bootstrap.c,v 1.47 2010/12/25 14:43:00 tsutsui Exp $ */
/* $NetBSD: pmap_bootstrap.c,v 1.48 2011/01/02 05:18:04 tsutsui Exp $ */
/*
* Copyright (c) 1991, 1993
@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pmap_bootstrap.c,v 1.47 2010/12/25 14:43:00 tsutsui Exp $");
__KERNEL_RCSID(0, "$NetBSD: pmap_bootstrap.c,v 1.48 2011/01/02 05:18:04 tsutsui Exp $");
#include <sys/param.h>
@ -365,11 +365,11 @@ pmap_bootstrap(paddr_t nextpa, paddr_t firstpa)
}
/*
* Validate PTEs for kernel data/bss, dynamic data allocated
* by us so far (nextpa - firstpa bytes), and pages for lwp0
* by us so far (kstpa - firstpa bytes), and pages for lwp0
* u-area and page table allocated below (RW).
*/
epte = (pt_entry_t *)kptpa;
epte = &epte[m68k_btop(nextpa - firstpa)];
epte = &epte[m68k_btop(kstpa - firstpa)];
protopte = (protopte & ~PG_PROT) | PG_RW;
/*
* Enable copy-back caching of data pages
@ -380,6 +380,23 @@ pmap_bootstrap(paddr_t nextpa, paddr_t firstpa)
*pte++ = protopte;
protopte += PAGE_SIZE;
}
/*
* map the kernel segment table cache invalidated for
* these machines (for the 68040 not strictly necessary, but
* recommended by Motorola; for the 68060 mandatory)
*/
epte = (pt_entry_t *)kptpa;
epte = &epte[m68k_btop(nextpa - firstpa)];
protopte = (protopte & ~PG_PROT) | PG_RW;
if (RELOC(mmutype, int) == MMU_68040) {
protopte &= ~PG_CCB;
protopte |= PG_CIN;
}
while (pte < epte) {
*pte++ = protopte;
protopte += PAGE_SIZE;
}
/*
* Finally, validate the internal IO space PTEs (RW+CI).
* We do this here since the 320/350 MMU registers (also