From Enami Tsugutomo: Busify and split the aic6360 driver.
This commit is contained in:
christos
parent
c01d3eb597
commit
64ff55911c
@ -1,4 +1,4 @@
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# $NetBSD: files,v 1.144 1997/09/21 18:17:44 veego Exp $
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# $NetBSD: files,v 1.145 1997/10/06 19:51:12 christos Exp $
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# @(#)files.newconf 7.5 (Berkeley) 5/10/93
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@ -61,6 +61,10 @@ file ipkdb/ipkdb_ppp.c ipkdbppp needs-flag
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# "Chipset" drivers. These are the bus-independent routines which
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# contain the cfdrivers. Attachments are provided by files.<bus>
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# Adaptec AIC-6[32]60 ICs
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device aic: scsi
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file dev/ic/aic6360.c aic
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# Adaptec 2[789]4X, 394X, aic7770 and aic78[5678]0 SCSI controllers
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device ahc: scsi
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file dev/ic/aic7xxx.c ahc
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File diff suppressed because it is too large
Load Diff
339
sys/dev/ic/aic6360reg.h
Normal file
339
sys/dev/ic/aic6360reg.h
Normal file
@ -0,0 +1,339 @@
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/* $NetBSD: aic6360reg.h,v 1.1 1997/10/06 19:49:18 christos Exp $ */
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/*
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* Copyright (c) 1994, 1995, 1996 Charles M. Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles M. Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* Copyright (c) 1994 Jarle Greipsland
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
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||||
* 3. The name of the author may not be used to endorse or promote products
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||||
* derived from this software without specific prior written permission.
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||||
*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Acknowledgements: Many of the algorithms used in this driver are
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* inspired by the work of Julian Elischer (julian@tfs.com) and
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* Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
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*/
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/* Definitions, most of them has turned out to be unneccesary, but here they
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* are anyway.
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*/
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/* AIC6360 definitions */
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#define SCSISEQ 0x00 /* SCSI sequence control */
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#define SXFRCTL0 0x01 /* SCSI transfer control 0 */
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#define SXFRCTL1 0x02 /* SCSI transfer control 1 */
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#define SCSISIG 0x03 /* SCSI signal in/out */
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#define SCSIRATE 0x04 /* SCSI rate control */
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#define SCSIID 0x05 /* SCSI ID */
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#define SELID 0x05 /* Selection/Reselection ID */
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#define SCSIDAT 0x06 /* SCSI Latched Data */
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#define SCSIBUS 0x07 /* SCSI Data Bus*/
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#define STCNT0 0x08 /* SCSI transfer count */
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#define STCNT1 0x09
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#define STCNT2 0x0a
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#define CLRSINT0 0x0b /* Clear SCSI interrupts 0 */
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#define SSTAT0 0x0b /* SCSI interrupt status 0 */
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#define CLRSINT1 0x0c /* Clear SCSI interrupts 1 */
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#define SSTAT1 0x0c /* SCSI status 1 */
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#define SSTAT2 0x0d /* SCSI status 2 */
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#define SCSITEST 0x0e /* SCSI test control */
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#define SSTAT3 0x0e /* SCSI status 3 */
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#define CLRSERR 0x0f /* Clear SCSI errors */
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#define SSTAT4 0x0f /* SCSI status 4 */
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#define SIMODE0 0x10 /* SCSI interrupt mode 0 */
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#define SIMODE1 0x11 /* SCSI interrupt mode 1 */
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#define DMACNTRL0 0x12 /* DMA control 0 */
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#define DMACNTRL1 0x13 /* DMA control 1 */
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#define DMASTAT 0x14 /* DMA status */
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#define FIFOSTAT 0x15 /* FIFO status */
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#define DMADATA 0x16 /* DMA data */
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#define DMADATAL 0x16 /* DMA data low byte */
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#define DMADATAH 0x17 /* DMA data high byte */
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#define BRSTCNTRL 0x18 /* Burst Control */
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#define DMADATALONG 0x18
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#define PORTA 0x1a /* Port A */
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#define PORTB 0x1b /* Port B */
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#define REV 0x1c /* Revision (001 for 6360) */
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#define STACK 0x1d /* Stack */
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#define TEST 0x1e /* Test register */
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#define ID 0x1f /* ID register */
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#define IDSTRING "(C)1991ADAPTECAIC6360 "
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/* What all the bits do */
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/* SCSISEQ */
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#define TEMODEO 0x80
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#define ENSELO 0x40
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#define ENSELI 0x20
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#define ENRESELI 0x10
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#define ENAUTOATNO 0x08
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#define ENAUTOATNI 0x04
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#define ENAUTOATNP 0x02
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#define SCSIRSTO 0x01
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/* SXFRCTL0 */
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#define SCSIEN 0x80
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#define DMAEN 0x40
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#define CHEN 0x20
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#define CLRSTCNT 0x10
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#define SPIOEN 0x08
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#define CLRCH 0x02
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/* SXFRCTL1 */
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#define BITBUCKET 0x80
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#define SWRAPEN 0x40
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#define ENSPCHK 0x20
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#define STIMESEL1 0x10
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#define STIMESEL0 0x08
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#define STIMO_256ms 0x00
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#define STIMO_128ms 0x08
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#define STIMO_64ms 0x10
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#define STIMO_32ms 0x18
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#define ENSTIMER 0x04
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#define BYTEALIGN 0x02
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/* SCSISIG (in) */
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#define CDI 0x80
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#define IOI 0x40
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#define MSGI 0x20
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#define ATNI 0x10
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#define SELI 0x08
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#define BSYI 0x04
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#define REQI 0x02
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#define ACKI 0x01
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/* Important! The 3 most significant bits of this register, in initiator mode,
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* represents the "expected" SCSI bus phase and can be used to trigger phase
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* mismatch and phase change interrupts. But more important: If there is a
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* phase mismatch the chip will not transfer any data! This is actually a nice
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* feature as it gives us a bit more control over what is happening when we are
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* bursting data (in) through the FIFOs and the phase suddenly changes from
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* DATA IN to STATUS or MESSAGE IN. The transfer will stop and wait for the
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* proper phase to be set in this register instead of dumping the bits into the
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* FIFOs.
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*/
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/* SCSISIG (out) */
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#define CDO 0x80
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#define IOO 0x40
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#define MSGO 0x20
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#define ATNO 0x10
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#define SELO 0x08
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#define BSYO 0x04
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#define REQO 0x02
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#define ACKO 0x01
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/* Information transfer phases */
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#define PH_DATAOUT (0)
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#define PH_DATAIN (IOI)
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#define PH_CMD (CDI)
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#define PH_STAT (CDI | IOI)
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#define PH_MSGOUT (MSGI | CDI)
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#define PH_MSGIN (MSGI | CDI | IOI)
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#define PH_MASK (MSGI | CDI | IOI)
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#define PH_INVALID 0xff
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/* SCSIRATE */
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#define SXFR2 0x40
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#define SXFR1 0x20
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#define SXFR0 0x10
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#define SOFS3 0x08
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#define SOFS2 0x04
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#define SOFS1 0x02
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#define SOFS0 0x01
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/* SCSI ID */
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#define OID2 0x40
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#define OID1 0x20
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#define OID0 0x10
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#define OID_S 4 /* shift value */
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#define TID2 0x04
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#define TID1 0x02
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#define TID0 0x01
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#define SCSI_ID_MASK 0x7
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/* SCSI selection/reselection ID (both target *and* initiator) */
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#define SELID7 0x80
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#define SELID6 0x40
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#define SELID5 0x20
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#define SELID4 0x10
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#define SELID3 0x08
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#define SELID2 0x04
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#define SELID1 0x02
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#define SELID0 0x01
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/* CLRSINT0 Clears what? (interrupt and/or status bit) */
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#define SETSDONE 0x80
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#define CLRSELDO 0x40 /* I */
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#define CLRSELDI 0x20 /* I+ */
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#define CLRSELINGO 0x10 /* I */
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#define CLRSWRAP 0x08 /* I+S */
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#define CLRSDONE 0x04 /* I+S */
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#define CLRSPIORDY 0x02 /* I */
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#define CLRDMADONE 0x01 /* I */
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/* SSTAT0 Howto clear */
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#define TARGET 0x80
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#define SELDO 0x40 /* Selfclearing */
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#define SELDI 0x20 /* Selfclearing when CLRSELDI is set */
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#define SELINGO 0x10 /* Selfclearing */
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#define SWRAP 0x08 /* CLRSWAP */
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#define SDONE 0x04 /* Not used in initiator mode */
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#define SPIORDY 0x02 /* Selfclearing (op on SCSIDAT) */
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#define DMADONE 0x01 /* Selfclearing (all FIFOs empty & T/C */
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/* CLRSINT1 Clears what? */
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#define CLRSELTIMO 0x80 /* I+S */
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#define CLRATNO 0x40
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#define CLRSCSIRSTI 0x20 /* I+S */
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#define CLRBUSFREE 0x08 /* I+S */
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#define CLRSCSIPERR 0x04 /* I+S */
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#define CLRPHASECHG 0x02 /* I+S */
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#define CLRREQINIT 0x01 /* I+S */
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/* SSTAT1 How to clear? When set?*/
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#define SELTO 0x80 /* C select out timeout */
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#define ATNTARG 0x40 /* Not used in initiator mode */
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#define SCSIRSTI 0x20 /* C RST asserted */
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#define PHASEMIS 0x10 /* Selfclearing */
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#define BUSFREE 0x08 /* C bus free condition */
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#define SCSIPERR 0x04 /* C parity error on inbound data */
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#define PHASECHG 0x02 /* C phase in SCSISIG doesn't match */
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#define REQINIT 0x01 /* C or ACK asserting edge of REQ */
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/* SSTAT2 */
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#define SOFFSET 0x20
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#define SEMPTY 0x10
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#define SFULL 0x08
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#define SFCNT2 0x04
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#define SFCNT1 0x02
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#define SFCNT0 0x01
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/* SCSITEST */
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#define SCTESTU 0x08
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#define SCTESTD 0x04
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#define STCTEST 0x01
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/* SSTAT3 */
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#define SCSICNT3 0x80
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#define SCSICNT2 0x40
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#define SCSICNT1 0x20
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#define SCSICNT0 0x10
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#define OFFCNT3 0x08
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#define OFFCNT2 0x04
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#define OFFCNT1 0x02
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#define OFFCNT0 0x01
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/* CLRSERR */
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#define CLRSYNCERR 0x04
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#define CLRFWERR 0x02
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#define CLRFRERR 0x01
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/* SSTAT4 */
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#define SYNCERR 0x04
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#define FWERR 0x02
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#define FRERR 0x01
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/* SIMODE0 */
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#define ENSELDO 0x40
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#define ENSELDI 0x20
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#define ENSELINGO 0x10
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#define ENSWRAP 0x08
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#define ENSDONE 0x04
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#define ENSPIORDY 0x02
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#define ENDMADONE 0x01
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/* SIMODE1 */
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#define ENSELTIMO 0x80
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#define ENATNTARG 0x40
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#define ENSCSIRST 0x20
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#define ENPHASEMIS 0x10
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#define ENBUSFREE 0x08
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#define ENSCSIPERR 0x04
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#define ENPHASECHG 0x02
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#define ENREQINIT 0x01
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/* DMACNTRL0 */
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#define ENDMA 0x80
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#define B8MODE 0x40
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#define DMA 0x20
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#define DWORDPIO 0x10
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#define WRITE 0x08
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#define INTEN 0x04
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#define RSTFIFO 0x02
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#define SWINT 0x01
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/* DMACNTRL1 */
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#define PWRDWN 0x80
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#define ENSTK32 0x40
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#define STK4 0x10
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#define STK3 0x08
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#define STK2 0x04
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#define STK1 0x02
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#define STK0 0x01
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/* DMASTAT */
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#define ATDONE 0x80
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#define WORDRDY 0x40
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#define INTSTAT 0x20
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#define DFIFOFULL 0x10
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#define DFIFOEMP 0x08
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#define DFIFOHF 0x04
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#define DWORDRDY 0x02
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/* BRSTCNTRL */
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#define BON3 0x80
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#define BON2 0x40
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#define BON1 0x20
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#define BON0 0x10
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#define BOFF3 0x08
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#define BOFF2 0x04
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#define BOFF1 0x02
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#define BOFF0 0x01
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/* TEST */
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#define BOFFTMR 0x40
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#define BONTMR 0x20
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#define STCNTH 0x10
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#define STCNTM 0x08
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#define STCNTL 0x04
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#define SCSIBLK 0x02
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#define DMABLK 0x01
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208
sys/dev/ic/aic6360var.h
Normal file
208
sys/dev/ic/aic6360var.h
Normal file
@ -0,0 +1,208 @@
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/* $NetBSD: aic6360var.h,v 1.1 1997/10/06 19:49:19 christos Exp $ */
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/*
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* Copyright (c) 1994, 1995, 1996 Charles M. Hannum. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Charles M. Hannum.
|
||||
* 4. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* Copyright (c) 1994 Jarle Greipsland
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Acknowledgements: Many of the algorithms used in this driver are
|
||||
* inspired by the work of Julian Elischer (julian@tfs.com) and
|
||||
* Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
|
||||
*/
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typedef u_long physaddr;
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typedef u_long physlen;
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struct aic_dma_seg {
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physaddr seg_addr;
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physlen seg_len;
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};
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#define AIC_NSEG 16
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/*
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* ACB. Holds additional information for each SCSI command Comments: We
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* need a separate scsi command block because we may need to overwrite it
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* with a request sense command. Basicly, we refrain from fiddling with
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* the scsipi_xfer struct (except do the expected updating of return values).
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* We'll generally update: xs->{flags,resid,error,sense,status} and
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* occasionally xs->retries.
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*/
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struct aic_acb {
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struct scsi_generic scsipi_cmd;
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int scsipi_cmd_length;
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u_char *data_addr; /* Saved data pointer */
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int data_length; /* Residue */
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||||
|
||||
u_char target_stat; /* SCSI status byte */
|
||||
|
||||
#ifdef notdef
|
||||
struct aic_dma_seg dma[AIC_NSEG]; /* Physical addresses+len */
|
||||
#endif
|
||||
|
||||
TAILQ_ENTRY(aic_acb) chain;
|
||||
struct scsipi_xfer *xs; /* SCSI xfer ctrl block from above */
|
||||
int flags;
|
||||
#define ACB_ALLOC 0x01
|
||||
#define ACB_NEXUS 0x02
|
||||
#define ACB_SENSE 0x04
|
||||
#define ACB_ABORT 0x40
|
||||
#define ACB_RESET 0x80
|
||||
int timeout;
|
||||
};
|
||||
|
||||
/*
|
||||
* Some info about each (possible) target on the SCSI bus. This should
|
||||
* probably have been a "per target+lunit" structure, but we'll leave it at
|
||||
* this for now.
|
||||
*/
|
||||
struct aic_tinfo {
|
||||
int cmds; /* #commands processed */
|
||||
int dconns; /* #disconnects */
|
||||
int touts; /* #timeouts */
|
||||
int perrs; /* #parity errors */
|
||||
int senses; /* #request sense commands sent */
|
||||
ushort lubusy; /* What local units/subr. are busy? */
|
||||
u_char flags;
|
||||
#define DO_SYNC 0x01 /* (Re)Negotiate synchronous options */
|
||||
#define DO_WIDE 0x02 /* (Re)Negotiate wide options */
|
||||
u_char period; /* Period suggestion */
|
||||
u_char offset; /* Offset suggestion */
|
||||
u_char width; /* Width suggestion */
|
||||
} tinfo_t;
|
||||
|
||||
struct aic_softc {
|
||||
struct device sc_dev;
|
||||
|
||||
bus_space_tag_t sc_iot;
|
||||
bus_space_handle_t sc_ioh;
|
||||
void *sc_ih;
|
||||
|
||||
struct scsipi_link sc_link; /* prototype for subdevs */
|
||||
|
||||
TAILQ_HEAD(, aic_acb) free_list, ready_list, nexus_list;
|
||||
struct aic_acb *sc_nexus; /* current command */
|
||||
struct aic_acb sc_acb[8];
|
||||
struct aic_tinfo sc_tinfo[8];
|
||||
|
||||
/* Data about the current nexus (updated for every cmd switch) */
|
||||
u_char *sc_dp; /* Current data pointer */
|
||||
size_t sc_dleft; /* Data bytes left to transfer */
|
||||
u_char *sc_cp; /* Current command pointer */
|
||||
size_t sc_cleft; /* Command bytes left to transfer */
|
||||
|
||||
/* Adapter state */
|
||||
u_char sc_phase; /* Current bus phase */
|
||||
u_char sc_prevphase; /* Previous bus phase */
|
||||
u_char sc_state; /* State applicable to the adapter */
|
||||
#define AIC_INIT 0
|
||||
#define AIC_IDLE 1
|
||||
#define AIC_SELECTING 2 /* SCSI command is arbiting */
|
||||
#define AIC_RESELECTED 3 /* Has been reselected */
|
||||
#define AIC_CONNECTED 4 /* Actively using the SCSI bus */
|
||||
#define AIC_DISCONNECT 5 /* MSG_DISCONNECT received */
|
||||
#define AIC_CMDCOMPLETE 6 /* MSG_CMDCOMPLETE received */
|
||||
#define AIC_CLEANING 7
|
||||
u_char sc_flags;
|
||||
#define AIC_DROP_MSGIN 0x01 /* Discard all msgs (parity err detected) */
|
||||
#define AIC_ABORTING 0x02 /* Bailing out */
|
||||
#define AIC_DOINGDMA 0x04 /* The FIFO data path is active! */
|
||||
u_char sc_selid; /* Reselection ID */
|
||||
|
||||
/* Message stuff */
|
||||
u_char sc_msgpriq; /* Messages we want to send */
|
||||
u_char sc_msgoutq; /* Messages sent during last MESSAGE OUT */
|
||||
u_char sc_lastmsg; /* Message last transmitted */
|
||||
u_char sc_currmsg; /* Message currently ready to transmit */
|
||||
#define SEND_DEV_RESET 0x01
|
||||
#define SEND_PARITY_ERROR 0x02
|
||||
#define SEND_INIT_DET_ERR 0x04
|
||||
#define SEND_REJECT 0x08
|
||||
#define SEND_IDENTIFY 0x10
|
||||
#define SEND_ABORT 0x20
|
||||
#define SEND_SDTR 0x40
|
||||
#define SEND_WDTR 0x80
|
||||
#define AIC_MAX_MSG_LEN 8
|
||||
u_char sc_omess[AIC_MAX_MSG_LEN];
|
||||
u_char *sc_omp; /* Outgoing message pointer */
|
||||
u_char sc_imess[AIC_MAX_MSG_LEN];
|
||||
u_char *sc_imp; /* Incoming message pointer */
|
||||
|
||||
/* Hardware stuff */
|
||||
int sc_initiator; /* Our scsi id */
|
||||
int sc_freq; /* Clock frequency in MHz */
|
||||
int sc_minsync; /* Minimum sync period / 4 */
|
||||
int sc_maxsync; /* Maximum sync period / 4 */
|
||||
};
|
||||
|
||||
#if AIC_DEBUG
|
||||
#define AIC_SHOWACBS 0x01
|
||||
#define AIC_SHOWINTS 0x02
|
||||
#define AIC_SHOWCMDS 0x04
|
||||
#define AIC_SHOWMISC 0x08
|
||||
#define AIC_SHOWTRACE 0x10
|
||||
#define AIC_SHOWSTART 0x20
|
||||
#define AIC_DOBREAK 0x40
|
||||
extern int aic_debug; /* AIC_SHOWSTART|AIC_SHOWMISC|AIC_SHOWTRACE; */
|
||||
#define AIC_PRINT(b, s) do {if ((aic_debug & (b)) != 0) printf s;} while (0)
|
||||
#define AIC_BREAK() do {if ((aic_debug & AIC_DOBREAK) != 0) Debugger();} while (0)
|
||||
#define AIC_ASSERT(x) do {if (x) {} else {printf("%s at line %d: assertion failed\n", sc->sc_dev.dv_xname, __LINE__); Debugger();}} while (0)
|
||||
#else
|
||||
#define AIC_PRINT(b, s)
|
||||
#define AIC_BREAK()
|
||||
#define AIC_ASSERT(x)
|
||||
#endif
|
||||
|
||||
#define AIC_ACBS(s) AIC_PRINT(AIC_SHOWACBS, s)
|
||||
#define AIC_INTS(s) AIC_PRINT(AIC_SHOWINTS, s)
|
||||
#define AIC_CMDS(s) AIC_PRINT(AIC_SHOWCMDS, s)
|
||||
#define AIC_MISC(s) AIC_PRINT(AIC_SHOWMISC, s)
|
||||
#define AIC_TRACE(s) AIC_PRINT(AIC_SHOWTRACE, s)
|
||||
#define AIC_START(s) AIC_PRINT(AIC_SHOWSTART, s)
|
||||
|
||||
#define AIC_ISA_IOSIZE 0x20 /* XXX */
|
||||
|
||||
void aicattach __P((struct aic_softc *));
|
||||
int aicintr __P((void *));
|
||||
int aic_find __P((bus_space_tag_t, bus_space_handle_t));
|
||||
void aic_isa_attach __P((struct device *, struct device *, void *));
|
||||
File diff suppressed because it is too large
Load Diff
147
sys/dev/isa/aic_isa.c
Normal file
147
sys/dev/isa/aic_isa.c
Normal file
@ -0,0 +1,147 @@
|
||||
/* $NetBSD: aic_isa.c,v 1.1 1997/10/06 19:49:41 christos Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1994, 1995, 1996 Charles M. Hannum. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Charles M. Hannum.
|
||||
* 4. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* Copyright (c) 1994 Jarle Greipsland
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Acknowledgements: Many of the algorithms used in this driver are
|
||||
* inspired by the work of Julian Elischer (julian@tfs.com) and
|
||||
* Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
|
||||
*/
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/errno.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <sys/device.h>
|
||||
#include <sys/buf.h>
|
||||
#include <sys/proc.h>
|
||||
#include <sys/user.h>
|
||||
#include <sys/queue.h>
|
||||
|
||||
#include <machine/intr.h>
|
||||
#include <machine/pio.h>
|
||||
|
||||
#include <dev/scsipi/scsi_all.h>
|
||||
#include <dev/scsipi/scsipi_all.h>
|
||||
#include <dev/scsipi/scsiconf.h>
|
||||
|
||||
#include <dev/isa/isavar.h>
|
||||
#include <dev/ic/aic6360reg.h>
|
||||
#include <dev/ic/aic6360var.h>
|
||||
|
||||
int aic_isa_probe __P((struct device *, void *, void *));
|
||||
|
||||
struct cfattach aic_isa_ca = {
|
||||
sizeof(struct aic_softc), aic_isa_probe, aic_isa_attach
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* INITIALIZATION ROUTINES (probe, attach ++)
|
||||
*/
|
||||
|
||||
/*
|
||||
* aic_isa_probe: probe for AIC6360 SCSI-controller
|
||||
* returns non-zero value if a controller is found.
|
||||
*/
|
||||
int
|
||||
aic_isa_probe(parent, match, aux)
|
||||
struct device *parent;
|
||||
void *match, *aux;
|
||||
{
|
||||
struct isa_attach_args *ia = aux;
|
||||
bus_space_tag_t iot = ia->ia_iot;
|
||||
bus_space_handle_t ioh;
|
||||
int rv;
|
||||
|
||||
if (bus_space_map(iot, ia->ia_iobase, AIC_ISA_IOSIZE, 0, &ioh))
|
||||
return (0);
|
||||
|
||||
AIC_TRACE(("aic_isa_probe: port 0x%x\n", ia->ia_iobase));
|
||||
rv = aic_find(iot, ioh);
|
||||
|
||||
bus_space_unmap(iot, ioh, AIC_ISA_IOSIZE);
|
||||
|
||||
if (rv) {
|
||||
ia->ia_msize = 0;
|
||||
ia->ia_iosize = AIC_ISA_IOSIZE;
|
||||
}
|
||||
return rv;
|
||||
}
|
||||
|
||||
void
|
||||
aic_isa_attach(parent, self, aux)
|
||||
struct device *parent, *self;
|
||||
void *aux;
|
||||
{
|
||||
struct isa_attach_args *ia = aux;
|
||||
struct aic_softc *sc = (void *)self;
|
||||
bus_space_tag_t iot = ia->ia_iot;
|
||||
bus_space_handle_t ioh;
|
||||
isa_chipset_tag_t ic = ia->ia_ic;
|
||||
|
||||
printf("\n");
|
||||
|
||||
if (bus_space_map(iot, ia->ia_iobase, AIC_ISA_IOSIZE, 0, &ioh))
|
||||
panic("aic_isa_attach: bus_space_map failed");
|
||||
|
||||
sc->sc_iot = iot;
|
||||
sc->sc_ioh = ioh;
|
||||
AIC_TRACE(("aic_isa_attach: port 0x%x\n", ia->ia_iobase));
|
||||
if (!aic_find(iot, ioh))
|
||||
panic("aic_isa_attach: aic_find failed");
|
||||
|
||||
sc->sc_ih = isa_intr_establish(ic, ia->ia_irq, IST_EDGE, IPL_BIO,
|
||||
aicintr, sc);
|
||||
if (sc->sc_ih == NULL) {
|
||||
printf("%s: couldn't establish interrupt\n",
|
||||
sc->sc_dev.dv_xname);
|
||||
return;
|
||||
}
|
||||
|
||||
aicattach(sc);
|
||||
}
|
||||
@ -1,4 +1,4 @@
|
||||
# $NetBSD: files.isa,v 1.37 1997/08/27 11:25:09 bouyer Exp $
|
||||
# $NetBSD: files.isa,v 1.38 1997/10/06 19:49:42 christos Exp $
|
||||
#
|
||||
# Config file and device description for machine-independent ISA code.
|
||||
# Included by ports that need it. Requires that the SCSI files be
|
||||
@ -72,9 +72,9 @@ attach aha at isa with aha_isa: isadma
|
||||
file dev/isa/aha_isa.c aha_isa
|
||||
|
||||
# Adaptec AIC-6[32]60 ICs
|
||||
device aic: scsi, isadma
|
||||
attach aic at isa
|
||||
file dev/isa/aic6360.c aic
|
||||
# device declaration in sys/conf/files
|
||||
attach aic at isa with aic_isa: isadma
|
||||
file dev/isa/aic_isa.c aic_isa
|
||||
|
||||
# Qlogic ESP406/FAS408 boards
|
||||
# ncr53c9x device declaration in sys/conf/files
|
||||
|
||||
Loading…
Reference in New Issue
Block a user