Add support for 16650's prescaler from Frank Wille. Tested with

IOblix on Amiga.
This commit is contained in:
jklos 2010-07-20 06:17:20 +00:00
parent c0c4b308d5
commit 644246af8b
2 changed files with 7 additions and 4 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: com.c,v 1.297 2010/04/19 18:24:26 dyoung Exp $ */
/* $NetBSD: com.c,v 1.298 2010/07/20 06:17:20 jklos Exp $ */
/*-
* Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc.
@ -66,7 +66,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: com.c,v 1.297 2010/04/19 18:24:26 dyoung Exp $");
__KERNEL_RCSID(0, "$NetBSD: com.c,v 1.298 2010/07/20 06:17:20 jklos Exp $");
#include "opt_com.h"
#include "opt_ddb.h"
@ -465,6 +465,8 @@ com_attach_subr(struct com_softc *sc)
sc->sc_fifolen = 0;
} else {
SET(sc->sc_hwflags, COM_HW_FLOW);
SET(sc->sc_mcr, MCR_PRESCALE);
sc->sc_frequency /= 4;
sc->sc_fifolen = 32;
}
} else
@ -1477,8 +1479,8 @@ com_loadchannelregs(struct com_softc *sc)
KASSERT(sc->sc_type != COM_TYPE_AU1x00);
KASSERT(sc->sc_type != COM_TYPE_16550_NOERS);
/* no EFR on alchemy */
CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr);
CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr);
}
if (sc->sc_type == COM_TYPE_AU1x00) {
/* alchemy has single separate 16-bit clock divisor register */

View File

@ -1,4 +1,4 @@
/* $NetBSD: comreg.h,v 1.15 2008/04/28 22:00:01 matt Exp $ */
/* $NetBSD: comreg.h,v 1.16 2010/07/20 06:17:20 jklos Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@ -98,6 +98,7 @@
#define LCR_5BITS 0x00 /* 5 bits */
/* modem control register */
#define MCR_PRESCALE 0x80 /* 16650/16950: Baud rate prescaler select */
#define MCR_TCR_TLR 0x40 /* OMAP: enables access to the TCR & TLR regs */
#define MCR_XONENABLE 0x20 /* OMAP XON_EN */
#define MCR_LOOPBACK 0x10 /* Loop test: echos from TX to RX */