fix ID_AA64ISAR0_EL1.ATOMIC field definition
This commit is contained in:
parent
62e7294679
commit
63bdacd840
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: armreg.h,v 1.59 2021/10/26 16:58:46 ryo Exp $ */
|
||||
/* $NetBSD: armreg.h,v 1.60 2022/01/05 19:53:32 ryo Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2014 The NetBSD Foundation, Inc.
|
||||
|
@ -290,7 +290,7 @@ AARCH64REG_READ_INLINE(id_aa64isar0_el1)
|
|||
#define ID_AA64ISAR0_EL1_RDM_SQRDML 1
|
||||
#define ID_AA64ISAR0_EL1_ATOMIC __BITS(23,20)
|
||||
#define ID_AA64ISAR0_EL1_ATOMIC_NONE 0
|
||||
#define ID_AA64ISAR0_EL1_ATOMIC_SWP 1
|
||||
#define ID_AA64ISAR0_EL1_ATOMIC_SWP 2
|
||||
#define ID_AA64ISAR0_EL1_CRC32 __BITS(19,16)
|
||||
#define ID_AA64ISAR0_EL1_CRC32_NONE 0
|
||||
#define ID_AA64ISAR0_EL1_CRC32_CRC32X 1
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: aarch64.c,v 1.15 2021/05/17 18:43:18 riastradh Exp $ */
|
||||
/* $NetBSD: aarch64.c,v 1.16 2022/01/05 19:53:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2018 Ryo Shimizu <ryo@nerv.org>
|
||||
|
@ -29,7 +29,7 @@
|
|||
#include <sys/cdefs.h>
|
||||
|
||||
#ifndef lint
|
||||
__RCSID("$NetBSD: aarch64.c,v 1.15 2021/05/17 18:43:18 riastradh Exp $");
|
||||
__RCSID("$NetBSD: aarch64.c,v 1.16 2022/01/05 19:53:32 ryo Exp $");
|
||||
#endif /* no lint */
|
||||
|
||||
#include <sys/types.h>
|
||||
|
@ -303,7 +303,7 @@ struct fieldinfo id_aa64isar0_fieldinfo[] = {
|
|||
.bitpos = 20, .bitwidth = 4, .name = "Atomic",
|
||||
.info = (const char *[16]) { /* 16=4bit */
|
||||
[0] = "No Atomic",
|
||||
[1] = "LDADD/LDCLR/LDEOR/LDSET/LDSMAX/LDSMIN"
|
||||
[2] = "LDADD/LDCLR/LDEOR/LDSET/LDSMAX/LDSMIN"
|
||||
"/LDUMAX/LDUMIN/CAS/CASP/SWP",
|
||||
}
|
||||
},
|
||||
|
|
Loading…
Reference in New Issue